AMSCO AS2701A

AS2701A (ISA3+)
AS-Interface Slave IC
Data Sheet
Rev. C, October 2000
AS-Interface Slave IC
AS2701A (ISA3+)
Key Features
•
•
•
•
•
•
•
•
•
•
Simple two-wire bus (AS-Interface line)
Transmission of both power and signal on the AS-Interface line
Decoupling of power and signal by the IC without additional external devices
Transmitting protocol for using the IC and the AS-Interface master in the transmit/receive modes
Switching of max. 31 AS-Interface slave ICs on one bus possible
Power supply of peripheral devices from the AS-Interface slave IC of up to [email protected]
Only few external devices necessary for operation (quartz, 4 capacitors, E2PROM)
Storing of the configuration data and the slave address in one E2PROM
Quartz oscillator for 5.333 MHz without external capacitances
Standards: AS-Interface–Spec V2.0 and EN 50295
General Description
The signal transmission between the master and the slaves in the AS-Interface system is
performed by a parallel two-line wire (AS-Interface line) to which the IC is connected only via a
polarity protection diode and a suppressor diode. The line is powered by a direct dc voltage of
up to 33.1 V, on which data pulses with signal amplitudes of (3...8) Vpp are superimposed.
The IC extracts its own power and the power for peripherals from the line and detects the bus
signals.
The AS-Interface slave IC consists of the following blocks:
• Receive Block
• Transmit Block
• Digital Logic Block
• Emergency Control Block
• Internal and External Power Supply with Signal decoupling
• Oscillator
• Power on Reset
• High Voltage I/O
Block Diagram
TEST
LTGP
switch
CDC
Transmit Block
Internal Power
Supply
Signal Decoupling
UOUT
Ext. Power Supply
U5R
Emergency and
Temperature
Control Block
E2-Interface
Receive Block
SCL
SDA
imp_pos, imp_neg
D0...D3
Oscillator
Rev. C, October 2000
OSC2
Power-On
Reset
OSC1
LTGN
Digital
Block
HVI/O
DSTBn
P0...P3
PSTBn
Page 2 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Package
SOIC20
Pin Description
D3
D2
D1
D0
DSTBn
U5R
TEST
SCL
SDA
LTGN
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
P3
P2
P1
P0
PSTBn
OSC2
OSC1
UOUT
CDC
LTGP
Pin
1
2
3
4
5
Name
D3
D2
D1
D0
DSTBn
Type
I/O
I/O
I/O
I/O
I/O
6
U5R
Voltage OUT
7
8
9
10
11
12
13
14
15
16
TEST
SCL
SDA
LTGN
LTGP
CDC
UOUT
OSC1
OSC2
PSTBn
IN
OUT
I/O
SUPPLY
SUPPLY
Voltage OUT
Voltage OUT
IN
OUT
OUT
17
18
19
20
P0
P1
P2
P3
OUT
OUT
OUT
OUT
Rev. C, October 2000
Description
Data input/output 3, configurable
Data input/output 2, configurable
Data input/output 1, configurable
Data input/output 0, configurable
Strobe output for the data port,
input for a reset signal (active low)
Supply voltage of the E2PROM,
Blocking capacitor CU5R
Connection to the capacitor CTEST
Serial two-wire bus, puls wire
Serial two-wire bus, address and data wire
AS-Interface wire, negative supply
AS-Interface wire, positive supply
Blocking capacitor CCDC
Peripherals
Quartz connection
Quartz connection
Strobe output for the parameter port, test mode
(without importance for users)
Parameter output 0
Parameter output 1
Parameter output 2
Parameter output 3
Page 3 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Functional Description
The IC identifies and decodes the supply voltage overlapping signals of the master telegram. If
the slave address contained within the master telegram coincides with the stored information
in the E2PROM of the slave address, the corresponding master command of the addressed
AS-Interface slave IC is executed.
After decoding of the master telegram the addressed AS-Interface slave IC responds with a
corresponding slave answer on the AS-Interface line.
The AS-Interface slave IC extracts its own supply voltage and the supply voltage for the
E2PROM from the AS-Interface line. At the same time, the IC provides a direct voltage for the
peripheral UOUT which results from ULTGP-UDROP for a maximum current of 35 mA.
The receive block detects the signal on the AS-Interface wire LTGP. The reference voltages of
the signal comparators are (52.5 ± 5) % of the maximum signal value and are controlled by a
peak value detector in the following mode: The comparator level is set to its default value by
Reset or if a non-correct signal is received.
If a line pause is detected, the level reset is released and the IC is able to adapt itself to
different signal levels. If the IC is not synchronized yet, the level adaption is faster (smaller
attack and decay time constants) as in the synchronous case.
The output information of the receive blocks are the signals: "imp_pos" and "imp_neg".
The transmit block drives the output level for the modulated transmit signal edges. The
transmit block consists of the NMOS transistor (transmit transistor), DAC for transmit signal
formation and a Jabber-Inhibit Circuitry. The DAC is addressed by the digital block. If the
transmitter is active more than typ. 300µs the Jabber-Inhibit circuit separates the IC from the
AS-Interface line. This condition can only be left by a Power-On-Reset.
0
1
0
A2
A1
A0
1
ACK
ACK
Byte-Address
Data
P
0
1
0
A2
A1
Byte Read Cycle
A0
0
1
0
1
0
A2
A1
A0
Data
ACK
ACK
Device-Address
S
P
1
R/W
Device-Address
S
ACK
Byte Write Cycle
SDA
Byte-Address
0
R/W
1
ACK
Device-Address
S
R/W
SDA
ACK
In the digital block the received signal is analyzed, the transmit signal is generated and the
data and parameter ports as well as the E2PROM interface are driven. The E2PROM interface
acts as a serial two-wire interface with the following transmission streams:
After the AS-Interface slave IC has sent the START condition, the device address is
transmitted. This address would allow the selection of a maximum of 8 possible E2PROM ICs,
is however fixed to 000 by the AS-Interface slave IC. Therefore in the application pins AO...A2
of the E2PROM are connected to Uss.
Rev. C, October 2000
Page 4 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Write Cycle
After the device address, the write cycle R/W-Bit=0, necessary for the identification of the write
cycle, is sent. The E2PROM acknowledges the correct receipt with the acknowledge bit ACK.
Then the data byte which should be written into the E2PROM reacknowledges with an ACK
signal of the E2PROM. The STOP condition ends the cycle.
Read Cycle
The read cycle is similar to the herein described write cycle. In this case the R/W-Bit = 1 which
causes the E2PROM to place read data for the received Byte address on the bus after the
acknowledge.
SDA
SCL
START
Condition
STOP
Condition
The START condition is recognized by the E2PROM when a H/L edge arises on the dataline
SDA during the high phase of the clock.
The STOP condition is present when a L/H edge arises on the dataline SDA during the high
phase of the clock SCL. The timing of the E2PROM interface is derived from the AS-Interface
quartz frequency of 5.333 MHz.
Rev. C, October 2000
Page 5 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Functional, electrical and timing characteristics
All voltages are referenced to LTGN = 0V, timing is valid for a clock frequency of 5.333 MHz.
a) Absolute Maximum Ratings
Symbol
VLTGP
VLTGPOV
Vin1
Vin2
Iin
H
ESD
Parameter
Positive Voltage
Positive Impulse Voltage
Voltage at D0… D3, P0… P3,
DSTBn, PSTBn, CDC, UOUT,
TEST
Voltage at OSC1, OSC2, SDA,
SCL, U5R
Input Current on every Pin
Non-Condensated Humidity
Electrostatic Discharge
Storing Temperature
Soldering Temperature
Power Dissipation
Min
- 0.3
VLTGN - 0.3
Max
40
50
VLTGP + 0.3
Unit
V
V
V
VLTGN - 0.3
7
V
-25
25
mA
1000
125
260
1
θSTG
θlead
Ptot
Notes:
1 A polarity protection diode is to be used externally
2 Impulse width: ≤ 50 µs; repetition rate: ≤ 0.5 Hz
3 Defined in DIN 40040 cond. F
4 HBM; R = 1.5 kΩ ; C = 100pF
5 260 °C for 10 s (reflow and wave soldering), 360 °C for 3 s (manual soldering)
6 SOIC 20: Rthja = 64.5 °K/W typ.
-55
V
°C
°C
W
Note
1
2
Vin ≤ 40V
3
4
5
6
b) Recommended Operating Conditions
Symbol
VLTGP1
VLTGP2
ILTG
IOL
IOL
Parameter
Positive Voltage
Positive Voltage for Sensor
Applications
Operating Current @ VLTG = 30 V
Max. Operating Current @ D0… D3,
DSTBn
Max. Output Current @ P0… P3,
PSTBn
Quartz Frequency
Operating Temperature
Min
26.9
17.5
max
33.1
33.1
Unit
V
V
Note
1
2
6
10
mA
mA
3
6
mA
fC
5.333
-25
85
θamb
Notes:
1 DC Parameter; VLTGP1min = VUOUTmin + VDROPmax;
VLTGPmax = VUOUTmax + VDROPmin
2 DC Parameter; VLTGP2min = VCOMOFFmax + VDROPmax
3 fC = 5.333 MHz, no load on UOUT and U5R, IC in idle mode
4 “AS-Interface-Quartz”
Rev. C, October 2000
MHz
°C
4
Page 6 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
c) Power Supply Pins LTGP and LTGN (LTGN = 0 V-reference)
The AS-Interface Slave IC's input at LTGP behaves as if a resistor RP and a (non-linear)
parallel capacitor CP connect LTGP to LTGN.
LTGP input impedance over frequency is as follows:
RP
≥ 10 kOhm
≥ 10 kOhm
≥ 10 kOhm
≥ 10 kOhm
≥ 10 kOhm
≥ 10 kOhm
CP
≤ 35 pF
≤ 45 pF
≤ 48 pF
≤ 51 pF
≤ 54 pF
≤ 60 pF
F
50 kHz
100 kHz
125 kHz
160 kHz
200 kHz
300 kHz
d) Data and Parameter Ports (D0...D3, DSTBn; P0...P3, PSTBn)
These pins are equipped with both an input and output channel as well as a current source
based pull-up structure; the I/O-circuit at these pins and their DC-characteristics @ output
channel 'Off' are described below.
The AS-Interface slave system concept requires D0...D3 and DSTBn to be bidirectional pins
and P0...P3 and PSTBn to be outputs.
The input channel on pins P0...P3 and PSTBn is only implemented to simplify the AS-Interface
Slave IC's device test, and is not intended to be used in AS-Interface Slave system applications.
U5R
11 µA typ
0
D0..D3
DSTBn
P0..P3
PSTBn
II[µA]
-5
-10
-15
-20
LTGN
0
4
10
20
30
40
VI[V]
Rev. C, October 2000
Page 7 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Symbol
VIL
VIH
VHYST
VOL11
Parameter
Input Voltage “Low”
Input Voltage “High”
Input Hysteresis
Output Voltage
min
0
3.5
0.25
0
max
1.5
VUOUT
0.5
1
Unit
V
V
V
V
VOL12
Output Voltage
0
1
V
VOL2
IIL
IIH
Output Voltage
Input Current
Input Current
0
-20
-10
0.4
-5
10
µA
µA
CDL
Loading Capacitance
on DSTBn
10
pF
Note
1
IOL11 = 10mA
D0… D3, DSTBn
IOL12 = 6mA
P0… P3, PSTBn
IOL2 = 2mA
VIL = 1V, Output “off”
VU5R ≤ VIH ≤ 40V
Output “off”
2
Notes:
1 Switching points approx. 2.5 V, i.e. 2.5 V ± VHYST
2 For larger capacitive loads an external Pull-Up-Resistor to UOUT must be used, so that
the beginning of the DSTB = LOW impulse of VIH ≤ 3.5 V to DSTBn is reached in less than
35 µs, otherwise a reset is the result.
Timing characteristics
Symbol
t DSTBL
min
t DATA
Parameter
DSTBn to D0… D3, Direction OUT,
Output Data LOW
DSTBn to D0… D3, Direction OUT,
Output Data HIGH
DSTBn to D0… D3, High Resistive
max
1
Unit
µs
1.5
µs
6.2
7
µs
t DSTB
DSTBn Pulse Width
6
6.8
µs
t DINon
6.5
7.7
µs
t DINoff
DSTBn to D0… D3, Direction IN, Valid
Input Data
DSTBn to D0… D3, End of Direction IN
12.5
t CYCLE
µs
t CYCLE
Next Cycle
150
t ALM1
Extension DSTBn to D0… D3, High
Resistive
Extension DSTBn (No Reset)
t DSTBH
t ALM2
1
µs
44
35
Note
µs
µs
Note 1: Data valid until DSTBn L/H-edge
Rev. C, October 2000
Page 8 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
tDINoff
D0..D3
HI-Z
data in
Direction of Input
tDINon
tDSTBL
HI-Z
D0..D3
data out LOW
Direction of Output
HI-Z
data out HIGH
D0..D3
tDSTBH
tDSTBL
D0..D3
data out
HI-Z
data in
HI-Z
tDATA
tDINon
Bidirectional
tDINoff
tDSTBH
D0..D3
data out
HI-Z
data in
HI-Z
tDSTB
DSTBn
tCYCLE
DSTB
(ext. LOW)
tALM2
tALM1
Rev. C, October 2000
(tRESET1 )
Page 9 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
e) Interface to the ext. E 2PROM (U5R, SCL, SDA) / functional,
electrical and timing characteristics
Symbol
Parameter
min
max
Unit
Note
VU5R
Output Voltage to E2PROM
4.5
5.5
V
IU5R ≤ 3 mA
CU5R
Load Capacity to U5R
10
220
nF
Ceramics capacitor
IU5R
Output Current to U5R
3
mA
VOL
Output Voltage “Low”
0
0.2 * VU5R
V
IOL = 10 µA
VOH
Output Voltage “High”
0.8 * VU5R
VU5R
V
-IOH = 10 µA
VIL
Input Voltage “Low” (only SDA)
-0.3
0.3 * VU5R
V
-IIL = 1.5… 0.2mA
VIH
Input Voltage “High” (only SDA)
0.7 * VU5R
VU5R + 0.3
V
IIH = -1… 1 µA
tDATAinSU
Set-up Time for Data Input
0.25
µs
tDATAinHO
Hold Time for Data Input
0
µs
tAA
tDATAoutHO
Time from SCK Low to SDA
Data Out and ACK Out
Hold Time for Data Output
0.3
µs
tSTARTSU
Set-up Time for Start Condition
4.7
µs
tSTARTHO
Hold Time for Start Condition
4
µs
tSTOPSU
Set-up Time for Stop Condition
4.7
µs
tBUF
4.7
µs
tR
Time which has to be Free for
Bus: Before Next Transmission
Rise Time
tF
Fall Time
tLOW
Impulse LOW Time
tHIGH
Impuls HIGH Time
tSCL
3.5
ns
300
ns
ns
4000
ns
Clock Frequency for E PROM
tLOW
1000
4700
2
tF
µs
100
kHz
fc = 5.333 MHz
tHIGH
SCL
tSTARTSU
tR
tDATAinHO
tDATAinSU
tSTARTHO
tSTOPSU
tBUF
SDA in
tF
tAA
tDATAoutHO
tR
SDA out
The U5R supply pin provides a typically 5V supply voltage to the external E2PROM, and has a
biasing capability only for this purpose.
Programming of the E2PROM is possible with the E2PROM soldered-in into the AS-Interface
Slave unit's pc-board by accessing the SCL / SDA serial bus with an external programming
hardware.
Rev. C, October 2000
Page 10 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
For successful programming the programmer hardware must have sink/source capability of at
least 5 mA, and the AS-Interface Slave IC's supply voltage LTGP has to be in the range of
26.65 V ...33.35 V.
The only E2PROM address locations which can be programmed through the AS-Interface
Slave IC (hence over the AS-Interface Bus and by the AS-Interface Master), are locations 0
and 1, which both have been reserved for the AS-Interface Slave unit's address.
The E2PROM has to be programmed in the following way:
E2PROM
Address
0
1
2
3
D7
0
0
D6
D5
D4
D3
0
0
0
0
ID Code
ID Code
D2
D1
D0
AS-Interface address
AS-Interface address
IO Configuration
IO Configuration
Initialization Data
0
0
Custom Specific Data
Custom Specific Data
Recommended E2PROM types:
Supplier
Philips
ST
Catalyst
Xicor
Catalyst
Xicor
Type
PCA8581P
ST24C01
CAT24LC02(Z)IP
X24LC02PI
CAT24LC04(Z)IP
X24(L)C04PI
Organization
128 x 8
128 x 8
256 x 8
256 x 8
512 x 8
512 x 8
f) Sensor / actuator supply pin UOUT / Functional and electrical
characteristics
Symbol
VUOUT
Parameter
Output Voltage at UOUT
VUOUTp
Overswing of the Output
Voltage
Overswing Impulse Width
tUOUTP
VDROP
min
VLTGP –
VDROP min
max
VLTGP –
VDROPmin
1.5
Unit
V
Note
IUOUT = 35 mA
V
CUOUT = 10 µF:
Switching 0-35 mA - 0
2.
ms
5.5
6.7
V
IUOUT
Voltage Drop from LTGP
to UOUT
Output Current UOUT
0
35
mA
CUOUT
Load Capacity UOUT
10
470
µF
11.0 V < VUOUT < 27.6 V
The interface is intended for the supply voltage to actuators, sensors as well as external
circuits with a power supply of <35mA without overloading the AS-Interface line in the range of
the signal frequency. The AS-Interface slave IC has an internal circuit protector which limits the
current during the charging of the load capacitor and which effects a power down at thermal
overload, e.g. at too high output currents.
In the case of a current break down on the AS-Interface line of less than 1ms, the internally
stored information is retained. The supply voltage of the IC during this time is extracted from
the capacitor Pin UOUT which is disconnected from the AS-Interface line.
Rev. C, October 2000
Page 11 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Reset Behaviour
The AS-Interface Slave IC can be in reset condition or reset by the following events:
• at power-up of VLTGP: as long as VUOUT has not yet reached the treshold voltage
9 V ≤ VCOMOFF ≤ 11 V;
• at power-down of VLTGP: as soon as U5R drops below the treshold voltage
3.5 V ≤ VPOR ≤ 4 V;
• by a 'L' input level to DSTBn for more than 44 µs;
• resulting from a “Reset AS-Interface Slave“- command by the AS-Interface Master
over the AS-Interface BUS.
The different levels of VCOMOFF and VPOR as per a) and b) and the fact that the U5R supply
voltage results from a down-regulation of the VUOUT supply assure a desirable hysteresis in
the order of several volts between the VUOUT power-on-reset and power-down-reset
threshold. Whereas at power-up the AS-Interface Slave IC is released from reset by VUOUT
reaching a level of between 9 V and 11 V, at power-down VUOUT has to come down to a level
in the order of 5 V for U5R to drop into the reset-triggering window between 3.5 V and 4 V.
Some different power-down events are illustrated below:
tLoff
VLTGP
18 V
1
VUOUT
VCOMOFF
VUOUT
VCOMOFF
2
3
neither receive
nor transmit
VU5R
VPOR
0V
(reset)
(no reset)
POR
(internal signal)
Notes:
as to (1):
as to (2):
as to (3):
No reset will be triggered, if VLTGP is lower than 18 V for less than 1 ms
If VUOUT < VCOMOFF but still U5R > VPOR, communication over the Data
Port is inhibited, but no reset triggered
If U5R < VPOR (resulting from VUOUT << VCOMOFF), a reset is triggered.
Reset is overcome as soon as VUOUT > VCOMOFF (implying U5R > VPOR)
In reset condition internal registers are cleared and data port D0...D3 is switched into highimpedant condition. After release from reset the AS-Interface Slave automatically performs a
first read cycle to clear the E2PROM from any previously interrupted communication state and
a second one to load the AS-Interface address, IO Configuration and ID Code into its internal
registers.
Symbol
t reset
t reset2
t reset3
t Loff
VCOMMoff
VPOR
Parameter
Reset Time after the Master
Command “Reset AS-Interface Slave”
or DSTBn = ext. L/H-Edge
Reset Time after Power On
Reset Time after Power On with great
Load Capacity
Voltage Breakdown Time
Voltage for “Communication OFF”
Voltage for Internal Reset
Rev. C, October 2000
min
9
3.5
max
2
Unit
ms
30
1000
ms
ms
1
11
4
ms
V
V
Note
CUOUT = 470 µF
CUOUT > 10 µF
Page 12 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Application Example 1:
Sensor/actuator circuit supplied by the AS-Interface Slave IC (UOUT) for supply current needs
≤ 35 mA.
A0
A1
A2
VSS
1
U5R
TEST
SCL
SDA
E2PROM
C2
D1
D2
D3
P2
P3
D0
P1
U5R
DSTBn
SCL
V2
V1
P0
PSTBn
OSC2
OSC1
UOUT
CDC
ASI-Slave-IC
LTGP
ASI Line
TEST
SDA
LTGN
1
Customer Interface
C4
ASI-N
ASI-P
C1
C3
G1
C5
C1 = 22...470 nF / max. AS-Interface BUS DC voltage
C2 = 10...220 nF / max VU5R = 5.5 V
C3 = 10...470 µF / max. (VUOUT + VUOUTp) = 29.1 V
C4 = 22...100 nF / max. (VUOUT + VUOUTp + 1.4 V) = 30.5 V
C5 = 10...100 nF (close to the IC) / max. (VUOUT + VUOUTp) = 29.1 V
V1 = 1N4002 or equivalent
V2 = TGL 41-39A or equivalent
G1 = AS-Interface Crystal 5.333 MHz
For V2 a limiter diode with a small capacitance value should be selected, to ensure that the
AS-Interface Bus can be operated with the maximum number of Slave units connected.
In a more general sense care should be taken that the pc board tracks and the external
components between the AS-Interface Bus and LTGP / LTGN contribute to the AS-Interface
Slave unit's input impedance inductively and highly resistively, rather than capacitively.
Rev. C, October 2000
Page 13 of 16
AS-Interface Slave IC
AS2701A (ISA3+)
Application Example 2:
Sensor / actuator circuit supplied from the AS-Interface Bus for supply current needs > 35 mA.
It is recommended to protect the AS-Interface Bus by a fuse in this set-up, if there is a high risk
of excessive current extraction due to component failure (e.g.: MC1747 or other components in
the sensor / actuator circuitry).
4
ASI-P
2,2mH
2,2mH
U+
5
100n
-
100n
7
ST24C01
5
100n100n
7
100n
11
12
5
16
14
15
17
18
19
20
LTGN
6
LTGP
1
CDC
DSTBn
PSTBn
OSC1
OSC2
P0
SDA
ASI-Slave-IC
10
SCL
TEST
U5R
UOUT
D0
P1
D1
P2
D2
P3
D3
9
10
U-
VCC
MC1747
VSS
SDA
MODE
2
4
11
RF
E PROM
8
ASI-N
8
+
SCL
E0
2 E1
8
3
7
E2
6
C
13
A
4
K
E
3
2
1
U1
130k
10µ
100n
130k
12k
100n
2,2mH
2,2mH
AS-Interface Quartz 5.333 MHz
AS2701A works fine with the following crystal types:
Citizen CM 309
Philips SQ 4849
AS-Interface quartz crystals are available from:
Endrich GmbH
Contact: Axel Gensler
Hauptstr. 56
D-72202 Nagold
Tel.: +49-7452-6007-31
Fax: +49-7452-6007-70
Email: [email protected]
Rev. C, October 2000
Geyer electronic
Contact: Jürgen Blank
Camerloherstr. 71
D-80689 München
Tel.: +49-89-546868-13
Fax: +49-89-546868-90
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AS-Interface Slave IC
AS2701A (ISA3+)
Kinseki Europe GmbH
Contact: Dirk Holstein
Schirmer Str. 76
D-40211 Düsseldorf
Tel.: +49-211-36815-33
Fax: +49-211-36815-10
Email: [email protected]
Rutronik Elektronische Bauelemente GmbH
Contact: Jürgen Tischhauser
Industriestraße 2
D-75228 Ispringen / Pforzheim
Tel.: +49-7231-801543
Fax: +49-7231-801633
Email: [email protected]
Application Support
a) For general information and documentation on the AS-Interface concept you may contact
one of the following AS-Interface Associations:
AS-International Association
Contact: Rolf Becker
Zum Taubengarten 52
D-63571 Gelnhausen
Tel.: +49-6051-473212
Fax: +49-6051-473282
Email: [email protected]
AS-Interface Switzerland
Contact: Rainer Schnaidt
Bittertenstraße 15
CH-4702 Oensingen
Tel.: +41-62-388-2567
Fax: +41-62-388-2525
Email: [email protected]
AS-Interface France
Contact: Gilles Mazet
5 rue Nadar
F-92566 Rueil Malmaison cedex
Tel.: +33-1-41-298294
Fax: +33-1-41-298482
Email: [email protected]
AS-Interface Italy
Contact: Maurizio Ghizzoni
Via G.B. Barinetti, 1
I-20145 Milano
Tel.: +39-02-66761
Fax: +39-02-6676-3491
Email: [email protected]
AS-Interface The Nederlands
Contact: Andre Braakman
Boerhaavelaan 40
NL-2700 AD Zoetermeer
Tel.: +31-79-353-1269
Fax: +31-79-353-1365
Email: [email protected]
AS-Interface Great Britain
Contact: Geoff Hodgkinson
1 West Street
GB-PO 14 4DH Titchfield, Hampshire
Tel.: +44-1329-511882
Fax: +44-1329-512063
Email: [email protected]
AS-Interface USA
Contact: Michael Bryant
16101 N. 82nd Street, Suite 3B
USA-85260 Scottsdale, Arizona
Tel.: +1-480-368-9091
Fax: +1-480-483-7202
Email: [email protected]
Rev. C, October 2000
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AS-Interface Slave IC
AS2701A (ISA3+)
AS-Interface Belgium
Contact: Maurice de Smedt
Avenue Paul Hymanslaan 47
B-1200 Bruxelles-Brussel
Tel.: +32-2-771-3912
Fax: +32-2-771-1264
Email: [email protected]
AS-Interface Sweden
Contact: Lars Mattsson
Karl Nordströms väg 31
SE-43253 Varberg
Tel.: +46-3406-29270
Fax: +46-3406-77190
Email: [email protected]
b) A demoboard, equipped with AS2701A and supporting discrete components, is available
from:
Bihl & Wiedemann GmbH
Mr. Bihl
Käfertaler Straße 164
D-68167 Mannheim
Tel.: +49-621-339-2723
Fax: +49-621-339-2239
Leuze electronic GmbH
Mr. Keller
In der Braike 1
D-73277 Owen/Teck
Tel.: +49-7021-573-248
Fax: +49-8021-573-200
c) Technical hotline assistance is provided by:
Bihl & Wiedemann GmbH (see above)
Bibliography
ASI: The Actuator-Sensor-Interface for Automation
Edts.: Werner Kriesel, Otto W. Madelung
Carl Hanser Verlag, Munich and Vienna, 1995
ISBN: 3-446-18265-9
Ordering Information
AS2701A
AS2701AT
Package: SOIC 20
Package: SOIC 20
Delivery: Tubes
Delivery: Tape & Reel
Copyright  2000, Austria Mikro Systeme International AG, Schloß Premstätten, 8141 Unterpremstätten, Austria.
Telefon +43-(0)3136-500-0, Telefax +43-(0)3136-52501, E-Mail [email protected]
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any
means, without the prior permission in writing by the copyright holder. To the best of its knowledge, Austria Mikro Systeme International
asserts that the information contained in this publication is accurate and correct.
Rev. C, October 2000
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