TI TL750M05CKC

TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
FEATURES
•
•
•
Very Low Dropout Voltage, Less Than 0.6 V
at 750 mA
Low Quiescent Current
TTL- and CMOS-Compatible Enable on
TL751M Series
•
•
•
•
60-V Load-Dump Protection
Overvoltage Protection
Internal Thermal-Overload Protection
Internal Overcurrent-Limiting Circuitry
(1)
TL750M...KC PACKAGE
(TOP VIEW)
TL750M...KTP PACKAGE
(TOP VIEW)
COMMON
OUTPUT
COMMON
INPUT
OUTPUT
COMMON
INPUT
TL750M...KTT PACKAGE(1)
(TOP VIEW)
COMMON
TL750M...KTE PACKAGE(1)
(TOP VIEW)
(1)
OUTPUT
COMMON
INPUT
TL751M...KTG PACKAGE
(TOP VIEW)
OUTPUT
COMMON
INPUT
(1)
NC
OUTPUT
COMMON
INPUT
ENABLE
NC - No inter nal connection
(1) The common terminal is in electrical contact with the mounting base.
DESCRIPTION/ORDERING INFORMATION
The TL750M and TL751M series are low-dropout positive voltage regulators specifically designed for
battery-powered systems. The TL750M and TL751M series incorporate onboard overvoltage and current-limiting
protection circuitry to protect the devices and the regulated system. Both series are fully protected against 60-V
load-dump and reverse-battery conditions. Extremely low quiescent current, even during full-load conditions,
makes the TL750M and TL751M series ideal for standby power systems.
The TL750M and TL751M series offers 5-V, 8-V, 10-V, and 12-V options. The TL751M series has the addition of
an enable (ENABLE) input. The ENABLE input gives the designer complete control over power up, allowing
sequential power up or emergency shutdown. When ENABLE is high, the regulator output is placed in the
high-impedance state. The ENABLE input is TTL and CMOS compatible.
The TL750MxxC and TL751MxxC are characterized for operation over the virtual junction temperature range
0°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerFLEX is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1988–2006, Texas Instruments Incorporated
TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
ORDERING INFORMATION
TJ
5V
0°C to 125°C
(1)
(2)
PACKAGE (1)
VO TYP
ORDERABLE PART NUMBER (2)
TOP-SIDE MARKING
PowerFLEX™ – KTE
Reel of 2000
TL750M05CKTER
TL750M05C
PowerFLEX – KTG
Reel of 2000
TL751M05CKTGR
TL751M05C
PowerFLEX – KTP
Reel of 3000
TL750M05CKTPR
750M05C
TO-220 – KC
Tube of 50
TL750M05CKC
TL750M05C
TO-263 – KTT
Reel of 500
TL750M05CKTTR
TL750M05C
10 V
TO-220 – KC
Tube of 50
TL750M10CKC
TL750M10C
12 V
TO-220 – KC
Tube of 50
TL750M12CKC
TL750M12C
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
For the most current ordering information, see the Package Option Addendum at the end of this data sheet.
TL751Mxx FUNCTIONAL BLOCK DIAGRAM
INPUT
ENABLE
Current
Limiting
Enable
28 V
_
+
Bandgap
OUTPUT
Overvoltage/
Thermal
Shutdown
COMMON
DEVICE COMPONENT COUNT
2
Transistors
46
Diodes
14
Resistors
44
Capacitors
4
JFETs
1
Tunnels (emitter R)
2
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
Absolute Maximum Ratings
(1)
over virtual junction temperature range (unless otherwise noted)
MIN
V
Transient input voltage (see Figure 3)
60
V
–15
V
–50
V
Transient reverse input voltage
t = 100 ms
Package thermal impedance (2) (3)
KC package
22
KTE package
23
KTG package
23
KTP package
28
KTT package
TJ
(1)
(2)
(3)
°C/W
25.3
Virtual junction temperature range
0
Lead temperature
Tstg
UNIT
26
Continuous reverse input voltage
θJA
MAX
Continuous input voltage
1,6 mm (1/16 in) from case for 10 s
Storage temperature range
–65
150
°C
260
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. Due to variation in
individual device electrical characteristics and thermal resistance, the built-in thermal-overload protection may be activated at power
levels slightly above or below the rated dissipation.
The package thermal impedance is calculated in accordance with JESD 51.
Recommended Operating Conditions
MIN
MAX
6
26
TL75xM08
9
26
TL75xM10
11
26
TL75xM05
VI
Input voltage
TL75xM12
13
26
VIH
High-level ENABLE input voltage
TL751Mxx
2
15
VIL
Low-level ENABLE input voltage
TL751Mxx
0
IO
Output current
TL75xMxxC
TJ
Operating virtual junction temperature
TL75xMxxC
0
UNIT
V
V
0.8
V
750
mA
125
°C
TL751MxxC Switching Characteristics
VI = 14 V, IO = 300 mA, TJ = 25°C (unless otherwise noted)
PARAMETER
tr
Response time, ENABLE to output
TL751MxxC
TYP
50
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UNIT
µs
3
TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
TL75xM05C Electrical Characteristics (1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M05, TJ = 25°C (unless otherwise noted)
PARAMETER
Output voltage
Input voltage regulation
TJ = 0°C to 125°C
(1)
4.95
5
5.05
5.1
25
VI = 6 V to 26 V, IO = 250 mA
12
50
IO = 5 mA to 750 mA
Bias current (TL751Mxx only)
MAX
10
VI = 8 V to 18 V, f = 120 Hz
Bias current
TYP
VI = 9 V to 16 V, IO = 250 mA
Output regulation voltage
Output noise voltage
UNIT
MIN
4.9
Ripple rejection
Dropout voltage
TL750M05C
TL751M05C
TEST CONDITIONS
50
55
20
0.5
IO = 750 mA
0.6
60
IO = 10 mA
75
5
ENABLE ≥ 2 V
mV
V
µV
500
IO = 750 mA
mV
dB
50
IO = 500 mA
f = 10 Hz to 100 kHz
V
200
mA
µA
Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
TL75xM08C Electrical Characteristics (1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M08, TJ = 25°C (unless otherwise noted)
PARAMETER
Output voltage
Input voltage regulation
(1)
MAX
7.92
8
8.08
8.16
12
40
VI = 9 V to 26 V, IO = 250 mA
15
68
IO = 5 mA to 750 mA
Bias current (TL751Mxx only)
TYP
VI = 10 V to 17 V, IO = 250 mA
VI = 11 V to 21 V, f = 120 Hz
Bias current
UNIT
MIN
7.84
Output regulation voltage
Output noise voltage
4
TJ = 0°C to 125°C
Ripple rejection
Dropout voltage
TL750M08C
TL751M08C
TEST CONDITIONS
50
55
24
0.5
IO = 750 mA
0.6
IO = 750 mA
IO = 10 mA
75
5
ENABLE ≥ 2 V
mV
V
µV
500
60
mV
dB
80
IO = 500 mA
f = 10 Hz to 100 kHz
V
200
mA
µA
Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
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SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
TL75xM10C Electrical Characteristics
(1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M10, TJ = 25°C (unless otherwise noted)
PARAMETER
Output voltage
Input voltage regulation
TJ = 0°C to 125°C
(1)
9.9
10
10.1
10.2
43
VI = 11 V to 26 V, IO = 250 mA
20
75
IO = 5 mA to 750 mA
Bias current (TL751Mxx only)
MAX
15
VI = 13 V to 23 V, f = 120 Hz
Bias current
TYP
VI = 12 V to 18 V, IO = 250 mA
Output regulation voltage
Output noise voltage
UNIT
MIN
9.8
Ripple rejection
Dropout voltage
TL750M10C
TL751M10C
TEST CONDITIONS
50
55
30
0.5
IO = 750 mA
0.6
60
IO = 10 mA
75
5
ENABLE ≥ 2 V
mV
V
µV
1000
IO = 750 mA
mV
dB
100
IO = 500 mA
f = 10 Hz to 100 kHz
V
200
mA
µA
Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
TL75xM12C Electrical Characteristics (1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M12, TJ = 25°C (unless otherwise noted)
PARAMETER
Output voltage
Input voltage regulation
TJ = 0°C to 125°C
(1)
11.88
12
12.12
12.24
15
43
20
78
IO = 5 mA to 750 mA
Bias current (TL751Mxx only)
MAX
VI = 13 V to 26 V, IO = 250 mA
VI = 13 V to 23 V, f = 120 Hz
Bias current
TYP
VI = 14 V to 19 V, IO = 250 mA
Output regulation voltage
Output noise voltage
UNIT
MIN
11.76
Ripple rejection
Dropout voltage
TL750M12C
TL751M12C
TEST CONDITIONS
50
55
30
0.5
IO = 750 mA
0.6
IO = 750 mA
IO = 10 mA
75
5
ENABLE ≥ 2 V
mV
V
µV
1000
60
mV
dB
120
IO = 500 mA
f = 10 Hz to 100 kHz
V
200
mA
µA
Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
PARAMETER MEASUREMENT INFORMATION
The TL750Mxx is a low-dropout regulator. This means that the capacitance loading is important to the
performance of the regulator because it is a vital part of the control loop. The capacitor value and the equivalent
series resistance (ESR) both affect the control loop and must be defined for the load range and the temperature
range. Figure 1 and Figure 2 can establish the capacitance value and ESR range for the best regulator
performance.
Figure 1 shows the recommended range of ESR for a given load with a 10-µF capacitor on the output. This
figure also shows a maximum ESR limit of 2 Ω and a load-dependent minimum ESR limit.
For applications with varying loads, the lightest load condition should be chosen because it is the worst case.
Figure 2 shows the relationship of the reciprocal of ESR to the square root of the capacitance with a minimum
capacitance limit of 10 µF and a maximum ESR limit of 2 Ω. This figure establishes the amount that the
minimum ESR limit shown in Figure 1 can be adjusted for different capacitor values.
For example, where the minimum load needed is 200 mA, Figure 1 suggests an ESR range of 0.8 Ω to 2 Ω for
10 µF. Figure 2 shows that changing the capacitor from 10 µF to 400 µF can change the ESR minimum by
greater than 3/0.5 (or 6). Therefore, the new minimum ESR value is 0.8/6 (or 0.13 Ω ). This allows an ESR
range of 0.13 Ω to 2 Ω , achieving an expanded ESR range by using a larger capacitor at the output. For better
stability in low-current applications, a small resistance placed in series with the capacitor (see Table 1) is
recommended, so that ESRs better approximate those shown in Figure 1 and Figure 2.
Table 1. Compensation for Increased Stability at Low Currents
MANUFACTURER
CAPACITANCE
ESR
TYP
PART
NUMBER
ADDITIONAL
RESISTANCE
15 µF
0.9 Ω
TAJB156M010S
1Ω
<br/>
AVX
∆IL
Applied Load
Current
Load
Voltage
<br/>
<br/>
33 µF
KEMET
0.6 Ω
0.5 Ω
T491D336M010AS
∆VL = ∆IL × ESR
∆VL
<br/>
OUTPUT CAPACITOR
EQUIVALENT SERIES RESISTANCE (ESR)
vs
LOAD CURRENT RANGE
<br/>
STABILITY
vs
EQUIVALENT SERIES RESISTANCE (ESR)
0.04
3
CL = 10 µF
CI = 0.1 µF
f = 120 Hz
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏ
ÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏ
ÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏ
ÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
2.6
2.4
0.03
Max ESR Boundary
1.8
1.6
Region of Best Stability
1.4
1.2
CL
2.2
2
Not Recommended
Recommended Min ESR
Potential Instability
0.035
This Region Not
Recommended for
Operation
Stability −
Equivalent Series Resistance (ESR) − Ω
2.8
Min ESR
Boundary
0.6
0.4
Potential Instability Region
0.2
0
0
0.1
0.2
0.3
0.4
IL − Load Current Range − A
0.5
400 µF
0.02
200 µF
0.015
100 µF
0.01
0.005
0
0
Figure 1.
6
1000 µF
Region of
Best Stability
0.025
1
0.8
ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÏÏÏ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÏÏÏ
ÏÏÏ
ÏÏÏ
22 µF
10 µF
0.5
1
1.5
2
2.5
1/ESR
Figure 2.
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3
3.5
4
4.5
5
TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Transient input voltage vs Time
3
Output voltage vs Input voltage
Input current vs Input voltage
4
IO = 10 mA
5
IO = 100 mA
6
Dropout voltage vs Output current
7
Quiescent voltage vs Output current
8
Load transient response
9
Line transient response
10
TRANSIENT INPUT VOLTAGE
vs
TIME
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
14
TJ = 25°C
VI = 14 V + 46e(−t/0.230)
for t ≥ 5 ms
50
IO = 10 mA
TJ = 25°C
12
VO − Output Voltage − V
V I − Transient Input Voltage − V
60
40
30
tr = 1 ms
20
10
TL75xM12
10
TL75xM10
8
TL75xM08
6
TL75xM05
4
2
0
0
100
200
300
400
500
600
0
0
2
4
6
8
10
t − Time − ms
VI − Input Voltage − V
Figure 3.
Figure 4.
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12
14
7
TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
INPUT CURRENT
vs
INPUT VOLTAGE
INPUT CURRENT
vs
INPUT VOLTAGE
200
350
IO = 10 mA
TJ = 25°C
180
IO = 100 mA
TJ = 25°C
300
TL75_M10
40
TL75_M08
60
TL75_M12
150
TL75_M12
80
200
TL75_M10
100
TL75_M08
120
250
TL75_M05
I I − Input Current − mA
140
TL75_M05
I I − Input Current − mA
160
100
50
20
0
0
2
4
6
8
10
12
0
14
0
2
4
6
8
10
VI − Input Voltage − V
VI − Input Voltage − V
Figure 5.
Figure 6.
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
QUIESCENT CURRENT
vs
OUTPUT CURRENT
250
12
14
250
350
12
TJ = 25°C
TJ = 25°C
VI = 14 V
225
IQ − Quiescent Current − mA
Dropout Voltage − mV
10
200
175
150
125
100
8
6
4
2
75
50
0
50
100
150
200
250
300
0
0
IO − Output Current − mA
40
60
80
100
150
IO − Output Current − mA
Figure 7.
8
20
Figure 8.
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
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SLVS021K – JANUARY 1988 – REVISED OCTOBER 2006
VO − Output Voltage − mV
20 mV/DIV
LINE TRANSIENT RESPONSE
200
100
0
− 100
− 200
150
VI(NOM) = VO + 1 V
ESR = 2
CL = 10 µF
TJ = 25°C
100
50
0
0
50
100 150 200
t − Time − µs
VI(NOM) = VO + 1 V
ESR = 2
IL = 20 mA
CL = 10 µF
TJ = 25°C
VIN − Input Voltage − V
1 V/DIV
IO − Output Current − mA
VO − Output Voltage − mV
LOAD TRANSIENT RESPONSE
250
300
350
0
20
40
60
80
100
150
250
350
t − Time − µs
Figure 9.
Figure 10.
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9
PACKAGE OPTION ADDENDUM
www.ti.com
18-Mar-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
TL750M05CKC
OBSOLETE
TO-220
KC
3
TBD
Call TI
Call TI
TL750M05CKCE3
OBSOLETE
TO-220
KC
3
TBD
Call TI
Call TI
TL750M05CKCSE3
ACTIVE
TO-220
KCS
3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750M05CKTER
OBSOLETE
PFM
KTE
3
TBD
Call TI
Call TI
50
TL750M05CKTPR
OBSOLETE
PFM
KTP
2
TBD
Call TI
Call TI
TL750M05CKTPRG3
OBSOLETE
PFM
KTP
2
TBD
Call TI
Call TI
TL750M05CKTTR
ACTIVE
DDPAK/
TO-263
KTT
3
500
Green (RoHS &
no Sb/Br)
CU SN
Level-3-245C-168 HR
TL750M05CKTTRG3
ACTIVE
DDPAK/
TO-263
KTT
3
500
Green (RoHS &
no Sb/Br)
CU SN
Level-3-245C-168 HR
TL750M05CKVURG3
ACTIVE
PFM
KVU
3
2500 Green (RoHS &
no Sb/Br)
CU SN
Level-3-260C-168 HR
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750M08CKCE3
OBSOLETE
TO-220
KC
3
TL750M08CKCSE3
ACTIVE
TO-220
KCS
3
TL750M08CKTPRG3
OBSOLETE
PFM
KTP
2
TL750M08CKVURG3
ACTIVE
PFM
KVU
3
50
TBD
2500 Green (RoHS &
no Sb/Br)
Call TI
Call TI
CU SN
Level-3-260C-168 HR
TL750M10CKC
OBSOLETE
TO-220
KC
3
TBD
Call TI
Call TI
TL750M10CKCE3
OBSOLETE
TO-220
KC
3
TBD
Call TI
Call TI
TL750M10CKCSE3
ACTIVE
TO-220
KCS
3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750M10CKTER
OBSOLETE
PFM
KTE
3
TBD
Call TI
Call TI
TL750M10CKTPR
OBSOLETE
PFM
KTP
2
TBD
Call TI
Call TI
TL750M10CKTPRG3
OBSOLETE
PFM
KTP
2
TL750M10CKVURG3
ACTIVE
PFM
KVU
3
50
TBD
2500 Green (RoHS &
no Sb/Br)
Call TI
Call TI
CU SN
Level-3-260C-168 HR
TL750M12CKC
OBSOLETE
TO-220
KC
3
TBD
Call TI
Call TI
TL750M12CKCE3
OBSOLETE
TO-220
KC
3
TBD
Call TI
Call TI
TL750M12CKCSE3
ACTIVE
TO-220
KCS
3
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
TL750M12CKTPRG3
OBSOLETE
PFM
KTP
2
TL750M12CKVURG3
ACTIVE
PFM
KVU
3
TL751M05CKTGR
OBSOLETE
PFM
KTG
5
50
TBD
2500 Green (RoHS &
no Sb/Br)
TBD
Call TI
Call TI
CU SN
Level-3-260C-168 HR
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Mar-2008
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TL750M05CKTTR
DDPAK/
TO-263
KTT
3
500
330.0
24.4
10.6
15.8
4.9
16.0
24.0
Q2
TL750M05CKVURG3
PFM
KVU
3
2500
TL750M08CKVURG3
PFM
KVU
3
2500
330.0
16.4
6.9
10.5
2.7
8.0
16.0
Q2
330.0
16.4
6.9
10.5
2.7
8.0
16.0
TL750M10CKVURG3
PFM
KVU
3
Q2
2500
330.0
16.4
6.9
10.5
2.7
8.0
16.0
Q2
TL750M12CKVURG3
PFM
KVU
3
2500
330.0
16.4
6.9
10.5
2.7
8.0
16.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TL750M05CKTTR
DDPAK/TO-263
KTT
3
500
340.0
340.0
38.0
TL750M05CKVURG3
PFM
KVU
3
2500
340.0
340.0
38.0
TL750M08CKVURG3
PFM
KVU
3
2500
340.0
340.0
38.0
TL750M10CKVURG3
PFM
KVU
3
2500
340.0
340.0
38.0
TL750M12CKVURG3
PFM
KVU
3
2500
340.0
340.0
38.0
Pack Materials-Page 2
MECHANICAL DATA
MPFM001E – OCTOBER 1994 – REVISED JANUARY 2001
KTE (R-PSFM-G3)
PowerFLEX PLASTIC FLANGE-MOUNT
0.375 (9,52)
0.080 (2,03)
0.070 (1,78)
0.365 (9,27)
0.360 (9,14)
0.050 (1,27)
0.040 (1,02)
0.350 (8,89)
0.220 (5,59)
NOM
0.010 (0,25) NOM
Thermal Tab
(See Note C)
0.360 (9,14)
0.350 (8,89)
0.295 (7,49)
NOM
0.320 (8,13)
0.310 (7,87)
0.420 (10,67)
0.410 (10,41)
1
3
0.025 (0,63)
0.031 (0,79)
0.100 (2,54)
Seating Plane
0.004 (0,10)
0.010 (0,25) M
0.005 (0,13)
0.001 (0,03)
0.200 (5,08)
0.041 (1,04)
0.031 (0,79)
0.010 (0,25)
NOM
Gage Plane
3°– 6°
0.010 (0,25)
4073375/F 12/00
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC MO-169
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
KTP (R-PSFM-G2)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.080 (2,03)
0.070 (1,78)
0.243 (6,17)
0.233 (5,91)
0.228 (5,79)
0.218 (5,54)
0.050 (1,27)
0.040 (1,02)
0.010 (0,25) NOM
0.130 (3,30) NOM
0.215 (5,46)
NOM
0.247 (6,27)
0.237 (6,02)
Thermal Tab
(See Note C)
0.287 (7,29)
0.277 (7,03)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.090 (2,29)
0.180 (4,57)
0.004 (0,10)
0.005 (0,13)
0.001 (0,02)
0.031 (0,79)
0.025 (0,63)
0.010 (0,25) M
0.010 (0,25) NOM
Gage Plane
0.047 (1,19)
0.037 (0,94)
0.010 (0,25)
2°–ā6°
4073388/M 01/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MPFM003F – OCTOBER 1994 – REVISED MARCH 2002
KTG (R-PSFM-G5)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.375 (9,52)
0.365 (9,27)
0.080 (2,03)
0.070 (1,78)
0.360 (9,14)
0.350 (8,89)
0.050 (1,27)
0.040 (1,02)
0.220 (5,59)
NOM
0.010 (0,25) NOM
0.360 (9,14)
0.350 (8,89)
0.295 (7,49)
NOM
0.320 (8,13)
0.310 (7,87)
0.420 (10,67)
Thermal Tab
(See Note C)
0.410 (10,41)
1
0.067 (1,70)
5
Seating Plane
0.031 (0,79)
0.004 (0,10)
0.025 (0,63)
0.268 (6,81)
0.010 (0,25) M
0.005 (0,13)
0.001 (0,03)
0.041 (1,04)
0.010 (0,25)
NOM
0.031 (0,79)
Gage Plane
3°–ā6°
0.010 (0,25)
4073377/G 12/00
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
FAlls within JEDEC MO–169
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
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