NT3881D Dot Matrix LCD Controller and Driver Features ! Character Generator ROM (CG ROM): 3 kinds of CG ROM sizes: 192 characters: 160 5 X 8 dot patterns 32 5 X 10 dot patterns 240 characters: 192 5 X 8 dot patterns 48 5 X 10 dot patterns 256 characters: 192 5 X 8 dot patterns 64 5 X 10 dot patterns Custom CG ROM is also available ! Built-in power-on reset function ! Logic power supply: single +5V supply ! LCD driver power supply: V1 - V5 (VDD+0.3 - VDD-13.5) ! Three oscillator operations (Freq. = 250KHz - 270KHz): • Internal oscillation • Ceramic resonator • External clock ! CMOS Process ! Available in 80-pin QFP or in CHIP FORM ! Internal LCD drivers 16 common signal drivers 40 segment signal drivers (can be externally extended to 400 segments using NT3882) ! Maximum display dimensions 40 characters * 2 lines or 80 characters * 1 line ! Interfaces with 4-bit or 8-bit MPU ! Versatile display functions provided on chip: Display Clear, Cursor Home, Display ON/OFF, Cursor ON/OFF, Character Blinking, Cursor Shift, and Display Shift ! Three duty factors, selected by PROGRAM: 1/8, 11/11, and 1/16 ! Displays Data RAM (DD RAM): 80 X 8 bits (displays up to 80 characters) ! Character Generator RAM (CG RAM): 64 X 8 bits for general data, 8 5 X 8 programmable dot patterns, or 4 5 X 10 programmable dot patterns ! Low voltage reset ! NOVATEK Identification code ! Bonding option for A-type and B-type waveform General Description The NT3881D is a dot matrix LCD controller and driver LSI that can operate with either a 4-bit or an 8-bit microprocessor (MPU). NT3881D receives control character codes from the MPU, stores them in an internal RAM (up to 80 characters), transforms each character code into a 5 X 7, 5 X 8, or 5 X 10 dot matrix character pattern, and then displays the codes on the LCD panel. The built-in Character Generator ROM consists of 256 different character patterns. The NT3881D also contains Character Generator RAM where the user can store 8 different character patterns at run time. These memory features make character display flexible. NT3881D also provides many display instructions to achieve versatile LCD display functions. The NT3881D is fabricated on a single LSI chip using the CMOS process, resulting in very low power requirements. With several NT3882 driver ICs connected to the NT3881D, up to 80 characters can be displayed. 1 V2.4 NT3881D S E G 3 9 S E G 4 0 C O M 1 6 C O M 1 5 C O M 1 4 C O M 1 3 C O M 1 2 C O M 1 1 C O M 1 0 C O M 9 C O M 8 C O M 7 C O M 6 C O M 5 C O M 4 C O M 3 C O M 2 C O M 1 D B 7 D B 6 D B 5 D B 4 D B 3 D B 2 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 Pin Configuration SEG38 65 40 DB1 SEG37 66 39 DB0 SEG36 67 38 E SEG35 68 37 R/W SEG34 69 36 RS SEG33 70 35 D SEG32 71 34 M SEG31 72 33 VDD SEG30 73 32 CL2 SEG29 74 31 CL1 SEG28 75 30 V5 SEG27 76 29 V4 SEG26 77 28 V3 SEG25 78 27 V2 SEG24 79 26 V1 SEG23 80 25 OSC2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 UM3881DF NT3881DF S E G 2 2 S E G 2 1 S E G 2 0 S E G 1 9 S E G 1 8 S E G 1 7 S E G 1 6 S E G 1 5 S E G 1 4 S E G 1 3 S E G 1 2 S E G 1 1 S E G 1 0 S E G 9 S E G 8 S E G 7 S E G 6 S E G 5 S E G 4 S E G 3 S E G 2 S E G 1 G N D O S C 1 2 V2.4 NT3881D Pad Configuration S E G 2 3 S E G 2 4 S E G 2 5 S E G 2 6 S E G 2 7 S E G 2 8 S E G 2 9 S E G 3 0 S E G 3 1 S E G 3 2 S E G 3 3 S E G 3 4 S E G 3 5 S E G 3 6 S E G 3 7 S E G 3 8 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 SEG22 1 64 SEG39 SEG21 2 63 SEG40 SEG20 3 62 SEG19 4 61 SEG18 5 60 SEG17 6 59 SEG16 7 58 SEG15 8 57 SEG14 9 56 SEG13 10 SEG12 SEG11 NT3881DH COM1 6 COM1 5 COM1 4 COM1 3 COM1 2 COM1 1 COM1 0 55 COM9 11 54 COM8 12 53 COM7 SEG10 13 52 COM6 SEG9 14 51 COM5 SEG8 15 50 COM4 SEG7 16 49 COM3 SEG6 17 48 COM2 SEG5 18 47 COM1 SEG4 19 46 DB7 SEG3 20 45 DB6 SEG2 21 44 DB5 43 DB4 42 DB3 41 DB2 SEG1 22 GND 23 V D D B OSC1 24 33 25 26 27 28 29 30 31 32 O S C 2 V 1 V 2 V 3 V 4 C L 1 C L 2 V 5 81 V D D A 3 34 35 36 37 38 39 40 M D R S R / W E D B 0 D B 1 V2.4 NT3881D Block Diagram V1 V2 V3 V4 V5 VDD GND OSC1 OSC2 3 8 INSTRUCTION REGISTER (IR) 8 INSTRUCTION 7 ADDRESS COUNTER TIMING GENERATOR 7 7 DECODER 7 RS 7 R/W M CL1 CL2 7 DISPLAY DATA RAM (DD RAM) 80 X 8 BITS CUR50R ADDRESS COURTER 16-BIT SHIFT REGISTER 16 COMMON SIGNAL DRIVER 16 COM1 | COM16 SEGMENT SIGNAL DRIVER 40 SEG1 | SEG40 E I/O BUTTER 8 8 DATA REGISTER (DR) 8 7 8 CURSOR /BLINK CONTROLLER DB7~DB4 4 CHARACTER GENERATOR RAM (CG RAM) 64 X 8 BITS DB3~DB0 4 CHARACTER GENERATOR ROM (CG ROM) 40-BIT LATCH CIRCUIT 40 BUSY FLAG (BF) 5 5 PARALLEL-TO-SERIAL CONVERTER 4 40-BIT SHIFT REGISTER D V2.4 NT3881D Pin and Pad Descriptions Pin and Pad No. Designation I/O External Connection 1 - 22 SEG22 - SEG1 O LCD panel 24, 25 OSC1, OSC2 26 - 30 V1 - V5 P Power supply 31 CL1 O NT3882 Clock to latch serial data D sent to NT3882. 32 CL2 O NT3882 Clock to shift serial data D 33, 81 VDDB, VDDA P Power supply Description Segment signal output pins Pins connected to resistor or ceramic filter for internal clock oscillation. For external clock operation, clock inputs to OSC1. Power supply for LCD driver VDD: +5V A-Type waveform: VDD bond to VDDA B-Type waveform: VDD bond to VDDB 23 GND P Power supply 34 M O NT3882 Switch signal to convert LCD drive waveform to AC 35 D O NT3882 Character pattern data corresponding to each common signal is transmitted serially from this output. 0-Non selection, 1-selection. 36 RS I MPU Register select signal 0: Instruction register (write) Busy flag, address counter (read) 1: Data register (write, read) 37 R/W I MPU Read/Write control signal 0: Write 1: Read 38 E I MPU Read/Write start signal 39 - 42 DB0 - DB3 I/O MPU Lower 4 tri-state bi-directional data bus for transmitting data between MPU and NT3881D. Not used during 4-bit operation. 43 - 46 DB4 - DB7 I/O MPU Higher 4 tri-state bi-directional data bus for transmitting data between MPU and NT3881D. DB7 is also used as busy flag. 47 - 62 COM1 - COM16 O LCD panel Common signal output pins 63 - 80 SEG40 - SEG23 O LCD panel Segment signal output pins 5 GND: 0V V2.4 NT3881D Functional Description The NT3881D is a dot-matrix LCD controller and driver LSI. It operates with either a 4-bit or an 8-bit microprocessor (MPU). The NT3881D receives both instructions and data from the MPU. Some instructions set operation modes, such as the function mode, data entry mode, and display mode; as well as some control LCD display functions, such as clear display, restore display, shift display, and cursor. Other instructions include read and write both data and addresses. All instructions allow users convenient and powerful functions to control the LCD dot-matrix displays. character patterns. Character codes from E0H to FFH are assigned to generate 5 X 10 dot character patterns, and other codes are used to generate 5x8 dot character patterns. 2. 240 Characters: The CG ROM contains 192 5 X 8 dot character patterns and 48 5 X 10 dot character patterns. An example of this type is the NT3881D-02, in which the relation between the character codes and character patterns is shown in Table 2. The character codes from 00H to 0FH are used to get character patterns from the CG RAM. Character codes from 10H to 1FH and from E0H to FFH are assigned to generate 5 X 10 dot character patterns, and other codes to generate 5 X 8 dot character patterns. No null character pattern exists in this type. Note that the underlined cursor, displayed on the 8th duty may be obscure if the 8th row of a dot character pattern is coded. We recommend that users display the cursor in the blinking mode if they code 5x8 dot character patterns is their custom CG ROM. Data is written into and read from the Data Display RAM (DD RAM) or the Character Generator RAM (CG RAM). As display character codes, the data stored in the DD RAM decodes a set of dot-matrix character patterns that are built into the Character Generator ROM (CG ROM). The CG ROM, with many character patterns (up to 256 patterns), defines the character pattern fonts. The NT3881D regularly scans the character patterns through the segment drivers. The CG RAM stores character pattern fonts at run time if users intend to show character patterns that are not defined in the CG ROM. This feature makes character display flexible. Other unused bytes can be used as general-purpose data storage. 3. 256 Characters: The LCD driver circuit consists of 16 common signal drivers and 40 segment signal drivers allowing a variety of application configurations to be implemented. Additionally, the user can extend display size by cascading the segment driver LSI NT3882. The maximum display dimensions can be either 80 characters in a 1-line display or 40 characters in a 2-line display. The CG ROM contains 192 5 X 8 dot character patterns and 64 5 X 10 dot character patterns. No adequate example is presented here. The only difference between this type and the just mentioned second type is that the character codes from 00H to 0FH get character patterns from the CG ROM rather than from the CG RAM. These character codes are assigned to generate 5 X 10 dot character patterns. In this application, the CG RAM would be employed as a general-purpose data storage. Character Generator ROM (CG ROM) The character generator ROM generates LCD dot character patterns from the 8-bit character pattern codes. The NT3881D provides 3 CG ROM configurations: Custom character patterns are available by maskprogramming ROM. For convenience of character pattern development, NOVATEK has developed a user-friendly editor program for the NT3881D to help determine the character patterns users prefer. By executing the program on the computer, users can easily create and modify their character patterns. By transferring the resulting files generated by the program through a modem or some other communication method, the user and NOVATEK have established a reliable, fast link for programming the CG ROM. 1. 192 Characters: The CG ROM contains 160 5 X 8 dot character patterns and 32 5 X 10 dot character patterns. An example is the NT3881D-01, in which the relation between the character codes and character patterns is shown in Table 1. The character codes from 00H to 0FH are used to get character patterns from the CG RAM. Character codes from 10H to 1FH and from 80H to 9FH map to full 6 V2.4 NT3881D Absolute Maximum Ratings* *Comments Power Supply Voltage (VDD) . . . . . . . . . . -0.3V to +0.7V Power Supply Voltage(V1toV5).VDD -13.5V to VDD+0.3V Input Voltage (VI) . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Operating Temperature (TOPR) . . . . . . . . -20°C to +75°C Storage Temperature (TSTG) . . . . . . . -55°C to +125°C Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. ! All voltage values are referenced to GND = 0V ! V1 to V5, must maintain VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5. DC Electrical Characteristics (VDD = 5.0V, GND = VEE = 0V, TA = 25°C) Symbol Parameter Min. Typ. Max. Unit Conditions Applicable Pin VIH1 "H" Level Input Voltage (1) 2.2 - VDD V VIL1 "L" Level Input Voltage (1) -0.3 - 0.8 V VIH2 "H" Level Input Voltage (2) VDD -1.0 - VDD V VIL2 "L" Level Input Voltage (2) GND - 1.0 V VOH1 "H" Level Output Voltage (1) 2.4 - - V IOH = -0.25mA VOL1 "L" Level Output Voltage (1) - - 0.4 V IOL = 1.2mA VOH2 "H" Level Output Voltage (2) 0.9 VDD - - V IOH = -0.04mA VOL2 "L" Level Output Voltage (2) - - 0.1 VDD V IOL = 0.04mA VCOM Driver Voltage Descending (COM) - - 2.9 V ID = 0.05mA COM1 - 16 VSEG Driver Voltage Descending (SEG) - - 3.8 V ID = 0.05mA SEG1 - 40 IIL Input Leakage Current -1 - 1 µA VIN = 0 to VDD -IP Pull-up MOS Current 50 125 250 µA VDD = 5V IOP Supply Current Power Supply Current - 0.3 0.5 mA Rf oscillation, from external clock VDD=5V, fOSC = fCP = 270KHz 7 DB0 - DB7, RS, R/W, E OSC1 DB0 - DB7 (TTL) CL1, CL2, M, D (CMOS) RS, R/W, DB0-DB7 VDD V2.4 NT3881D DC Electrical Character (continued) Symbol Parameter Min. Typ. Max. Unit Conditions Applicable Pin External Clock Operation fCP External Clock Operating Frequency 125 270 350 KHz tDUTY External Clock Duty Cycle 45 50 55 % tRCP External Clock Rise Time 0.1 - 0.5 µs tFCP External Clock Fall Time 0.1 - 0.5 µs 190 270 350 KHz Rf = 91KΩ ± 2% Ceramic resonator Internal Clock Operation (RC Oscillator) fOSC Oscillator Frequency Internal Clock Operation (Ceramic Resonator Oscillator) fOSC Oscillator Frequency 245 250 255 KHz VLCD1 VLCD2 LCD Driving Voltage 4.6 3.0 - VDD V VDD- V5 1/5 bias 1/4bias AC Characteristics Read Cycle Symbol (VDD = 5.0V, GND = VEE = 0V, TA = 25°C) Parameter Min. Typ. Max. Unit Conditions tCYCE Enable Cycle Time 500 - - ns Figure 1 tWHE Enable "H" Level Pulse Width 300 - - ns Figure 1 - - 25 ns Figure 1 - - ns Figure 1 10 - - ns Figure 1 - - 190 ns Figure 1 20 - - ns Figure 1 tRE, tFE Enable Rise/Fall Time 1 60 tAS RS, R/W Setup Time tAH RS, R/W Address Hold Time tRD Read Data Output Delay tDHR Read Data Hold Time 2 100 8 V2.4 NT3881D AC Characteristics (continued) Write Cycle (VDD = 5.0V, GND = VEE = 0V, TA = 25°C) Symbol Parameter Min. Typ. Max. Unit Conditions tCYCE Enable Cycle Time 500 - - ns Figure 2 tWHE Enable "H" Level Pulse Width 300 - - ns Figure 2 - - 25 ns Figure 2 - - ns Figure 2 tRE, tFE Enable Rise/Fall Time 1 60 tAS RS, R/W Setup Time tAH RS, R/W Address Hold Time 10 - - ns Figure 2 tDS Data Output Delay 100 - - ns Figure 2 tDHR Data Hold Time 10 - - ns Figure 2 2 100 Notes: 1: 8-bit operation mode 2: 4-bit operation mode Timing Characteristics of Interface Signals with Segment Driver LSI NT3882 (VDD = 5V, GND = VEE = 0V, TA = 25°C) Symbol Parameter Min. Typ. Max. Unit Conditions tCWH Clock Pulse Width High 800 - - ns Figure 3 tCWL Clock Pulse Width Low 800 - - ns Figure 3 tSU Data Setup Time 300 - - ns Figure 3 tDH Data Hold Time 300 - - ns Figure 3 tCSU Clock Setup Time 500 - - ns Figure 3 tDM M Delay Time -1000 - 1000 ns Figure 3 Min. Typ. Max. Unit Conditions Power Supply Conditions Using Internal Reset Circuit Symbol Parameter tRON Power Supply Rise Time 0.1 - 10 ns Figure 4 tOFF Power Supply OFF Time 1 - - ms Figure 4 9 V2.4 NT3881D Timing Waveforms Read Operation RS VIH1 VIH1 VIL1 VIL1 tAH tAS VIH1 R/W tAH tWEM tFE VIH1 E VIL1 VIL1 VIL1 tRE tDHR tRD VIH1 DB0~DB7 VIH1 VALD DATA VIL1 VIL1 tCYCE Figure 1. Bus Read Operation Sequence (Reading out data from NT3881D to MPU) Write Operation RS VIH1 VIH1 VIL1 VIL1 tAS tAH R/W VIL1 VIL1 tAH tWEM tFE VIH1 VIH1 VIL1 E VIL1 VIL1 tRE tDS tDHW VIH1 DB0 ~ DB7 VIH1 VALD DATA VIL1 VIL1 tCYCE Figure 2. Bus Write Operation Sequence (Writing data from MPU to NT3881D) 10 V2.4 NT3881D Timing Waveforms (continued) Interface Signals with Segment Driver LSI 0.9 VDD CLK1 0.9 VDD tCWH tCSU tCWH 0.9 VDD 0.1 VDD CLK2 0.1 VDD 0.9 VDD tCSU D 0.1 VDD tCWL 0.9 VDD 0.9 VDD 0.1 VDD 0.1 VDD tSU tDH M 0.1 VDD tDM Figure 3. Sending Data to Segment Driver LSI NT3882 Interface Signals with Segment Driver LSI (continued) 4.5V 0.2V VDD 0.1ms > tRON > 10ms 0.2V tRON tOFF > 1ms 0.2V tOFF Figure 4. tOFF stipulates the time of power OFF for instantaneous power supply to or when power supply repeats ON and OFF. Note 1: The NT3881D has three clock options: A. Internal Oscillator Operation (With Ceramic Filter) Rf : 1MΩ ± 10% Rd : 3.3KΩ ± 5% C1 = C2 : 680pF ± 10% OSC2 OSC1 CERAMIC FILTER C1 C2 11 V2.4 NT3881D B. Internal Oscillator (With Rf Resistor) Only Rf may be connected between OSC1 and OSC2. The wire connection Rf must be as short as possible. OSC2 OSC1 Rf: 91kohm + 2% C. External Clock Operation OSC1 and OSC2. OSC1 OSC2 PULSE INPUT Note 2 : Input/Output Terminals: A. Input Terminal Applicable Terminal : E (No Pull Up MOS) VDD PMOS NMOS Applicable Terminals: RS, R/W (with Pull Up MOS) VDD VDD PULL UP MOS PMOS PMOS NMOS 12 V2.4 NT3881D B. Output Terminal Applicable Terminals: CL1, CL2, M, D VDD PMOS NMOS C. I/O Terminal Applicable Terminals: DB0 to DB7 VDD PULL UP MOS PMOS VDD PMOS VDD ENABLE PMOS NMOS DATA NMOS (OUTPUT CIRCUIT) (TRISTATE) 13 V2.4 NT3881D Table 1. Correspondence between Character Codes and Character Patterns (NOVATEK Standard NT3881D-01) 14 V2.4 NT3881D Table 2. Correspondence between Character Codes and Character Patterns (NOVATEK Standard NT3881D-02) 15 V2.4 NT3881D Instruction Set Instruction Display Clear Display/ Cursor Home Entry Mode Set Code Function RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 Execution time (max) (fOSC = 250KHz) Clear entire display area, restore display from shift, and load address counter with DD RAM address 00H. 1.64ms * Restore display from shift and load address counter with DD RAM address 00H. 1.64ms Specify direction of cursor movement and display shift mode. This operation takes place after each data transfer (read/write). 40µs Specify activation of display (D) cursor (C) and blinking of character at cursor position (B). 40µs 0 0 0 0 0 0 0 1 I/D S Display ON/OFF 0 0 0 0 0 0 1 D C B Display/ Cursor Shift 0 0 0 0 0 1 S/C R/L * * Shift display or move cursor. 40µs Function Set 0 0 0 0 1 DL N F * * Set interface data length (DL), number of display line (N), and character font (F). 40µs RAM Address Set 0 0 0 1 Load the address counter with a CG RAM address. Subsequent data access is for CG RAM data. 40µs DD RAM Address Set 0 0 1 Load the address counter with a DD RAM address. Subsequent data access is for DD RAM data. 40µs Read Busy Flag (BF) and contents of Address Counter (AC). 0µs ACG ADD Busy Flag/ Address Counter Read 0 1 CG RAM/ DD RAM Data Write 0 Write data Write data to CG RAM or DD RAM. 40µs 1 CG RAM/ DD RAM Data Read 1 Read data Read data from CG RAM or DD RAM. 40µs 1 BF AC Note 1: Symbol "*" signifies an insignificant bit (disregard). Note 2: Correct input value for "N" is predetermined for each model. 16 V2.4 NT3881D Instruction Set (continued) Instruction Code RS RW DB7 DB6 DB5 I/D = 1 : Increment S = 1 : Display Shift On D = 1 : Display On C = 1 : Cursor Display On B = 1 : Cursor Blink On S/C = 1 : Shift Display R/L = 1 : Shift Right DL = 1 : 8-Bit N = 1 : Dual Line F = 1 : 5x10 dots BF = 1 : Internal Operation BF = 0 : Ready for Instruction Function DB4 DB3 DB2 DB1 DB0 Execution time (max) (fOSC = 250KHz) I/D = 0 : Decrement DD RAM : Display Data RAM S/C R/L DL N F = 0 : Move Cursor = 0 : Shift Left = 0 : 4-Bit = 0 : Signal Line = 0 : 5x8 dots CG RAM : Character Generator RAM ACG : Character Generator RAM Address ADD : Display Data RAM Address AC : Address Counter Note 1: Symbol "*" signifies an insignificant bit (disregard). Note 2: Correct input value for "N" is predetermined for each model. 17 V2.4 NT3881D Interface to LCD (1) Character Font and Number of Lines The NT3881D provides a 5 X 7 dot character font 1-line mode, a 5 X 10 dot character font 1-line mode and a 5 X 7 dot character font 2-line mode, as shown in the table below. Three types of common signals are available as displayed in the table. The number of lines and the font type can be selected by the program. Number of Lines Character Font Number of Common Signals Duty Factor 1 5 X 7 dots + Cursor (or 5x8 dots) 8 1/8 1 5 X 10 dots + Cursor 11 1/11 2 5 X 7 dots + Cursor (or 5x8 dots) 16 1/16 (2) Connection to LCD The following 4 LCD connection examples show the various combinations between characters and lines. NT3881D can directly drive the following combinations: (a) 5 X 8 Font - 8 character X 1 line (1/8 duty cycle, 1/4 bias) LCD PANEL COM1 COM8 SEG1 NT3881D SEG40 18 V2.4 NT3881D (b) 5 X 10 Font - 8 character X 1 line (1/11 duty cycle, 1/4 bias) LCD PANEL COM1 COM8 NT3881D SEG1 SEG40 COM11 COM9 (c) 5 X 8 Font - 8 character X 2 lines (1/16 duty cycle, 1/5 bias) LCD PANEL COM1 COM8 NT3881D SEG1 SEG40 COM16 COM9 19 V2.4 NT3881D (d) 5 X 8 Font - 16 character X 1 line (1/16 duty cycle, 1/5 bias) LCD PANEL COM1 COM8 SEG1 NT3881D SEG40 COM16 COM9 20 V2.4 NT3881D (3) Bias Power Connection NT3881D provides 1/4 or 1/5 bias for various duty cycle applications. The power division voltage is described in the following table. The connection of NT3881D, power supply, and resistors are also shown as follows: Power Division 1/8, 1/11 Duty Cycle - 1/4 Bias 1/16 Duty Cycle - 1/5 Bias V1 VDD - 1/4 VLCD VDD - 1/5 VLCD V2 VDD - 1/2 VLCD VDD - 2/5 VLCD V3 VDD - 1/2 VLCD VDD - 3/5 VLCD V4 VDD - 3/4 VLCD VDD - 4/5 VLCD V5 VDD - VLCD VDD - VLCD VDD VDD VDD VDD R R V1 V1 R R V2 V2 VLCD NT3881D R NT3881D V3 VLCD V3 R R V4 V4 R R V5 V5 VR VR VEE VEE Note: The resistance value depends on the LCD panel size. 21 V2.4 NT3881D (4) LCD Waveform A-type, 1/8 Duty Cycle, 1/4 Bias 400 CLOCKS COM1 1 2 3 4 5 8 1 2 11 1 2 16 1 2 VDD V1 V2 (V3) V4 V5 1 FRAME A-type, 1/11 Duty Cycle, 1/4 Bias 400 CLOCKS COM1 1 2 3 4 5 VDD V1 V2 (V3) V4 V5 1 FRAME A-type, 1/16 Duty Cycle, 1/5 Bias 200 CLOCKS COM1 1 2 3 4 5 VDD V1 V2 (V3) V4 V5 1 FRAME 22 V2.4 NT3881D B-type, 1/8 Duty Cycle, 1/4 Bias 400 CLOCKS COM1 1 2 3 4 5 6 7 8 9 16 1 2 VDD V1 V2 (V3) V4 V5 1 Frame 1sec × 400 × 8 = 11.9ms 270K 1 Frame = Frame Frequency = 1 = 84.3Hz 11.9ms B-type, 1/11 Duty Cycle, 1/4 Bias 400 CLOCKS COM1 1 2 3 4 5 6 7 8 9 10 11 12 21 22 1 2 VDD V1 V2 (V3) V4 V5 1 Frame 1Frame = 1sec × 400 × 11 = 16.3ms 270K Frame Frequency = 1 = 61.4Hz 16.3ms B-type, 1/16 Duty Cycle, 1/5 Bias 200 CLOCKS COM1 1 2 3 4 5 13 14 15 16 17 31 32 1 2 VDD V1 V2 V3 V4 V5 1 Frame 1Frame = 1sec × 200 ×16 = 11.9ms 270K Frame Frequency = 23 1 = 84.3Hz 11.9ms V2.4 NT3881D Application Circuit (for reference only) LCD PANEL C1 - C16 S1 - S40 S1 D - S40 S1 - S40 DL1 DL1 DR2 CL2 DL2 CL1 DL2 DR1 NT3882 M DR2 CL2 CL1 NT3882 FCS DR1 M VDD SEL1 FCS VDD SEL1 SEL2 GND SEL2 GND V1 V2 V3 V4 V5 V6 V1 V2 V3 V4 V5 V6 CL2 CL1 NT3881D M VDD GND V1 V2 V3 V4 V5 VR R R C R C R C R C C GND or other negative voltage 24 V2.4 NT3881D Bonding Diagram 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 1 64 2 63 3 62 4 61 5 60 6 59 7 58 8 57 NT3881DH 56 9 10 55 Y 11 54 12 53 X (0, 0) 13 3861 µm 52 14 51 15 50 16 49 17 48 18 47 19 46 20 45 21 44 22 43 23 42 33 24 25 26 27 28 29 30 31 32 81 41 34 35 36 37 38 39 40 3175 µm * Substrate Connect to VDD or keep floating * Pad window area: 120 m X 110 m 25 V2.4 NT3881D Unit: µm Bonding Dimensions Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Designation SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 GND OSC1 OSC2 V1 V2 V3 V4 V5 CL1 CL2 VDDB M D RS R/W E DB0 DB1 X -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1469 -1183 -1033 -883 -733 -583 -433 -283 -133 76 268 418 568 719 870 1020 1170 Y 1743 1593 1443 1293 1143 993 843 693 543 393 243 93 -57 -207 -357 -507 -657 -807 -957 -1107 -1257 -1407 -1557 -1707 -1862 -1862 -1862 -1862 -1862 -1862 -1862 -1862 -1691 -1862 -1862 -1862 -1862 -1862 -1862 -1862 Pad No. 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 26 Designation DB2 DB3 DB4 DB5 DB6 DB7 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 VDDA X 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1469 1125 975 825 675 525 375 225 75 -75 -225 -375 -525 -675 -825 -975 -1125 76 Y -1707 -1557 -1407 -1257 -1107 -957 -807 -657 -507 -357 -207 -57 93 243 393 543 693 843 993 1143 1292 1443 1593 1743 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 1862 -1816 V2.4 NT3881D Ordering Information Part No. Package Remarks NT3881DH-01 CHIP FORM Refer to Table 1 NT3881DF-01 80L QFP/B-type waveform Refer to Table 1 NT3881DH-02 CHIP FORM Refer to Table 2 NT3881DF-02 80L QFP/B-type waveform Refer to Table 2 27 V2.4 NT3881D Package Information QFP 80L Outline Dimensions unit: inches/mm HD D 64 24 41 E 1 b 40 GD ~ ~ e c 25 GE 65 HE 80 D See Detail F Seating Plane y A L A1 A2 GD L1 Detail F Symbol Dimensions in inches Dimensions in mm 3.30 Max. A 0.130 Max. A1 0.004 Min. 0.10 Min. A2 0.112±0.005 2.85±0.13 b 0.014 +0.004 -0.002 0.35 +0.10 -0.05 c 0.006 +0.004 -0.002 0.15 +0.10 -0.05 D 0.551±0.005 14.00±0.13 E 0.787±0.005 20.00±0.13 e 0.031±0.006 0.80±0.15 GD 0.693 NOM. 17.60 NOM. GE 0.929 NOM. 23.60 NOM. HD 0.740±0.012 18.80±0.31 HE 0.976±0.012 24.79±0.31 L 0.047±0.008 1.19±0.20 L1 0.095±0.008 2.41±0.20 y 0.006 Max. 0.15 Max. θ 0° ~ 12° 0° ~ 12° Notes: 1. Dimensions D & E do not include resin fins. 2. Dimensions GD & GE are for PC Board surface mount pad pitch design reference only. 28 V2.4 NT3881D Product Spec. Change Notice NT3881 Specification Revision History Version Content Date 2.4 B-type waveform modified(Page 23 , Document mistake corrected) Apr.2002 2.3 PAD 33 VDDB,PAD 81 VDDA modified( Page 5, 24) Nov.2001 2.2 Updated Page 16. Nov.2001 2.1 Updated all diagrams. Nov.1999 2.0 Modified Page1 - 1.0 NEW SPEC - 29 V2.4