MCNIX MX23L1611MC-10

MX23L1611
3.3 Volt 16-Mbit (2M x 8 / 1M x 16) Mask ROM with Page Mode
FEATURES
ORDER INFORMATION
• Bit organization
- 2M x 8 (byte mode)
- 1M x 16 (word mode)
• Fast access time
- Random access: 100ns (max.)
- Page access: 30ns (max.)
• Page Size
- 8 words per page
• Current
- Operating:40mA
- Standby:15uA
• Supply voltage
- 100ns @3.0V ~ 3.6V
- 120ns @2.7V ~ 3.6V
• Package
- 44 pin SOP (500mil)
- 48 pin TSOP (12mm x 20mm)
Part No.
MX23L1611
Time
MX23L1611MC-10
100ns
30ns
44 pin SOP
MX23L1611MC-12
120ns
50ns
44 pin SOP
MX23L1611MI-12*
120ns
50ns
44 pin SOP
MX23L1611TC-10
100ns
30ns
48 pin TSOP
MX23L1611TC-12
120ns
50ns
48 pin TSOP
MX23L1611TI-12*
120ns
50ns
48 pin TSOP
PIN DESCRIPTION
44 SOP
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Time
*Note: Industrial grade's temperature is -40°C~85°C
PIN CONFIGURATION
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
Access Page Access Package
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
Symbol
Pin Function
A0~A19
Address Inputs
D0~D14
Data Outputs
D15/A-1
D15 (Word Mode)/ LSB Address
(Byte Mode)
CE
Chip Enable Input
OE
Output Enable Input
Byte
Word/ Byte Mode Selection
VCC
Power Supply Pin
VSS
Ground Pin
NC
No Connection
D0~D7
High Z
High Z
D0~D7
D0~D7
D8~D15
High Z
High Z
D8~D15
High Z
MODE SELECTION
CE
H
L
L
L
OE
X
H
L
L
Byte
X
X
H
L
D15/A-1
X
X
Output
Input
P/N:PM0449
Mode
Word
Byte
Power
Stand-by
Active
Active
Active
REV. 1.8, JUL. 18, 2001
1
MX23L1611
48 TSOP (Normal Type)
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
VSS
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23L1611
(Normal Type)
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
BLOCK DIAGRAM
A0/(A-1)
A2
A3
Address
Buffer
Memory
Array
Page
Decoder
Page
Buffer
Word/
Byte
D0
Output
Buffer
D15/(D7)
A19
CE
BYTE
OE
Note: Chip Enable active low input activates the chip's control logic, Address buffer and Page buffer.
P/N:PM0449
REV. 1.8, JUL. 18, 2001
2
MX23L1611
ABSOLUTE MAXIMUM RATINGS
Item
Voltage on any Pin Relative to VSS
Ambient Operating Temperature
Storage Temperature
Note:
Symbol
VIN
Topr
Tstg
Ratings
-1.3V to VCC+2.0V (Note)
-40°C to 85°C
-65°C to 125°C
Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to
-1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage
transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
DC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 3.0V~3.6V)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
2.4V
-
IOH = -0.4mA
Output Low Voltage
VOL
-
0.4V
IOL = 1.6mA
Input High Voltage
VIH
2.2V
VCC+0.3V
Input Low Voltage
VIL
-0.3V
0.2 x VCC
Input Leakage Current
ILI
-
5uA
0V, VCC
Output Leakage Current
ILO
-
5uA
0V, VCC
Operating Current
ICC1
-
40mA
tRC = 100ns, all output open
Standby Current (TTL)
ISTB1
-
1mA
CE = VIH
Standby Current (CMOS)
ISTB2
-
15uA
CE>VCC-0.2V
Input Capacitance
CIN
-
10pF
Ta = 25°C, f = 1MHZ
Output Capacitance
COUT
-
10pF
Ta = 25°C, f = 1MHZ
AC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 3.0V~3.6V)
Item
Symbol
Read Cycle Time
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
tRC
tAA
tACE
tPA
tOE
tOH
tHZ
23L1611-10
MIN.
MAX.
100ns
100ns
100ns
30ns
30ns
0ns
20ns
23L1611-12
MIN.
MAX.
120ns
120ns
120ns
50ns
50ns
0ns
20ns
Note:Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.
P/N:PM0449
REV. 1.8, JUL. 18, 2001
3
MX23L1611
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~ 2.6V
10ns
1.4V
1.4V
See Figure
IOH (load)=-0.4mA
DOUT
IOL (load)=1.6mA
C<100pF
Note:
No output loading is present in tester load board.
Active loading is used and under software programming control.
TIMING DIAGRAM
Output loading capacitance includes load board's and all stray capacitance.
RANDOM READ
ADD
ADD
ADD
ADD
tRC
tACE
CE
tOE
OE
tOH
tAA
VALID
DATA
VALID
tHZ
VALID
PAGE READ
VALID ADD
A3-A19
(A-1),A0,A1,A2
2'nd ADD
1'st ADD
tAA
DATA
3'rd ADD
tPA
VALID
VALID
VALID
Note: CE, OE are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
P/N:PM0449
REV. 1.8, JUL. 18, 2001
4
MX23L1611
PACKAGE INFORMATION
44-PIN PLASTIC SOP
P/N:PM0449
REV. 1.8, JUL. 18, 2001
5
MX23L1611
48-PIN PLASTIC TSOP
P/N:PM0449
REV. 1.8, JUL. 18, 2001
6
MX23L1611
REVISION HISTORY
REVISION
1.5
1.6
1.7
1.8
DESCRIPTION
Temperature range is revised as -10°C~70°C
Output hold after address (tOH) spec is revised as 0ns(min.)
120ns speed grade's voltage range is revised as 2.7V~3.6V
DC characteristics Standby current (ISTB2):5uA-->15uA
Modify Package Information
P/N:PM0449
PAGE
P3
P3
P1
P1,3
P5~6
DATE
NOV/27/1998
JAN/22/1999
Dec/30/1999
JUL/18/2001
REV. 1.8, JUL. 18, 2001
7
MX23L1611
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
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FAX:+1-408-453-8488
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TEL:+1-847-963-1900
FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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