DATA SHEET BiCMOS INTEGRATED CIRCUIT µ PC1933 DC-DC CONVERTER CONTROL IC DESCRIPTION The µ PC1933 is an IC that controls a low-voltage input DC-DC converter. This IC is suitable for an operation with3-V, 3.3-V input or a lithium ion secondary battery input, because the minimum operating supply voltage is 2.5 V. Because of its wide operating voltage range, it can also be used to control DC-DC converters that use an AC adapter for input. FEATURES • Low supply voltage: 2.5 V (MIN.) • Operating voltage range: 2.5 to 20 V (breakdown voltage: 30 V) • Timer latch circuit for short-circuit protection. • Ceramic capacitor with low capacitance (0.1 µ F) can be used for short-circuit protection. • Open drain output (1 cannel: This output can be used to control a step-down converter, a step-up converter.) • Dead time is internally fixed to 85 %. • Soft start function (with a circuit to convert the timer latch circuit.) ORDERING INFORMATION Part Number Package µ PC1933GR 8-pin plastic SOP (5.72 mm (225)) The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G13690EJ3V0DS00 (3rd edition) Date Published April 2000 NS CP (K) Printed in Japan The mark ★ shows major revised points. 1998 µ PC1933 BLOCK DIAGRAM FB RT GND OUT 8 7 6 5 Oscillation section MOS input – E/A – + + + Internal fixed voltage PWM MOS output Soft start select switch Timer latch for short-circuit protection section DTC Reference voltage section (Internal fixed) 2 1 2 3 4 II DLY VCC VREF Data Sheet G13690EJ3V0DS00 µ PC1933 PIN CONFIGURATION (Top View) 8-pin plastic SOP (5.72 mm (225)) • µ PC1933GR II 1 8 FB DLY 2 7 RT VCC 3 6 GND VREF 4 5 OUT PIN FUNCTIONS Pin No. Symbol Function Pin No. Symbol Function 1 II Error amplifier inverted input 5 OUT Open-drain output 2 DLY Short-circuit protection 6 GND Ground 3 VCC Power supply 7 RT Frequency setting resistor connection 4 VREF Reference voltage output 8 FB Error amplifier output Data Sheet G13690EJ3V0DS00 3 µ PC1933 CONTENTS 1. ELECTRICAL SPECIFICATIONS ................................................................................................................ 5 2. CONFIGURATION AND OPERATION OF EACH BLOCK.................................................................... 11 2.1 Reference Voltage Generator ...........................................................................................................................11 2.2 Oscillator ...........................................................................................................................................................11 2.3 Under Voltage Lock-out Circuit ........................................................................................................................11 2.4 Error Amplifier...................................................................................................................................................11 2.5 PWM Comparator..............................................................................................................................................12 2.6 Timer Latch-Method Short Circuit Protection Circuit ....................................................................................12 2.7 Output Circuit....................................................................................................................................................12 3. NOTES ON USE........................................................................................................................................ 13 3.1 Setting the Output Voltage ...............................................................................................................................13 3.2 Setting the Oscillation Frequency ...................................................................................................................13 3.3 Preventing Malfunction of the Timer Latch-Method Short Circuit Protection Circuit..................................13 3.4 ON/OFF Control.................................................................................................................................................14 3.5 Maximum Duty Limit .........................................................................................................................................15 3.6 Notes on Actual Pattern Wiring........................................................................................................................15 4. APPLICATION EXAMPLE ......................................................................................................................... 16 4.1 Application Example.........................................................................................................................................16 4.2 List of External Parts ........................................................................................................................................16 5. PACKAGE DRAWING ................................................................................................................................ 17 6. RECOMMENDED SOLDERING CONDITIONS ....................................................................................... 18 4 Data Sheet G13690EJ3V0DS00 µ PC1933 1. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (unless otherwise specified, TA = 25 °C) Parameter Symbol Ratings Unit Supply voltage VCC 30 V Output voltage VO 30 V Output current (open drain output) IO 21 mA Total power dissipation PT 480 mW Operating ambient temperature TA −20 to + 85 °C Storage temperature Tstg −55 to + 150 °C Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. Recommended Operating Conditions Parameter Symbol Ratings Unit Supply voltage VCC 2.5 20 V Output voltage VO 0 20 V Output current IO 20 mA Operating temperature TA −20 +85 °C Oscillation frequency fOSC 20 800 kHz Caution The recommended operating range may be exceeded without causing any problems provided that the absolute maximum ratings are not exceeded. However, if the device is operated in a way that exceeds the recommended operating conditions, the margin between the actual conditions of use and the absolute maximum ratings is small, and therefore thorough evaluation is necessary. The recommended operating conditions do not imply that the device can be used with all values at their maximum values. Data Sheet G13690EJ3V0DS00 5 µ PC1933 Electrical Characteristics (unless otherwise specified, TA = 25 °C, VCC = 3 V, fOSC = 100 kHz) Block Parameter Symbol Conditions MIN. TYP. MAX. Unit Under Start-up voltage VCC (L-H) IREF = 0.1 mA 1.57 V voltage Operation stop voltage VCC (H-L) IREF = 0.1 mA 1.5 V Lock-out Hysteresis voltage VH IREF = 0.1 mA 70 mV Reset voltage (timer latch) VCCR IREF = 0.1 mA 1.0 V Reference Reference voltage VREF IREF = 1 mA Voltage Line regulation REGIN section Load regulation section 30 2.1 2.2 V 2.5 V≤VCC≤20 V 2 12.5 mV REGL 0.1 mA≤IREF≤1 mA 2 7.5 mV Temperature coefficient ∆VREF/∆T −20 °C≤TA≤+85 °C, IREF = 0 A Oscillation fOSC setting accuracy ∆fOSC RT = 18 kΩ −20 +30 % section fOSC total stability ∆fOSC −20 °C≤TA≤+85 °C, −20 +50 % 2.5 V≤VCC≤20 2.0 0.5 V Maximum duty DMAX. Soft start time tSS Error Input threshold voltage VITH 0.285 Amplifier Input bias current IB −100 section Open loop gain Av Unity gain funity PWM comparator section Maximum output voltage (+) CDLY = 0.1 µ F VO = 0.3 V 70 VO = 0.3 V + VOM − % IO = −45 µ A 1.6 85 % 50 ms 0.3 0.315 V +100 nA 80 dB 1.5 MHz 2 V Maximum output voltage (−) VOM IO = 45 µ A Output sink current IOsink VFB = 0.5 V Output source current IOsource VFB = 1.6 V Output Drain cutoff current ILEAK VO = 30 V section Output ON voltage VOL RL = 150 Ω 0.2 Rise time tr RL = 150 Ω 50 ns Fall time tf RL = 150 Ω 60 ns Short-circuit Input sense voltage VTH Protection UV sense voltage VUV section Source current on short-circuiting IOUV Delay time tDLY CDLY = 0.1 µ F Circuit operation current ICC VCC = 3 V Overall 0.02 0.8 CREF = 0.01 to 10 µ F 6 6 Data Sheet G13690EJ3V0DS00 V mA −45 µA 100 µA 0.6 V 1.75 1.92 2.05 0.8 0.85 V 1.0 1.6 2.7 µA 50 1.4 4 µ PC1933 1.4 −70 Caution Connect a capacitor of 0.01 to 10 µ F to the VREF pin. 0.5 2.6 V ms 3.9 mA Timing Chart Soft start by CDLY Soft start by CDLY Detected finishing of soft- start, Switch Short-load DTC (internal fixed) Voltage of FB pin Pin voltage Voltage of DLY pin Voltage of DLY pin Data Sheet G13690EJ3V0DS00 OUT OFF ON Output oscillation is stopped µ PC1933 7 µ PC1933 Typical Characteristic Curves (unless otherwise specified, VCC = 3 V, fOSC = 100 kHz, TA = 25 °C) (Nominal) PT vs TA VREF vs VCC 2.5 IREF = 0 A Reference voltage VREF (V) Total power dissipation PT (W) 0.5 0.4 260.4 ° C/W 0.3 0.2 0.1 0 2.0 1.5 1.0 0.5 25 50 75 100 125 150 Operating ambient temperature TA (°C) 0 VREF vs TA 1 2 3 4 Supply voltage VCC (V) 5 fOSC vs RT 2.13 1000 Oscillation frequency fOSC (kHz) Reference voltage VREF (V) IREF = 0 A 2.12 2.11 2.10 2.09 2.08 100 10 2.07 –25 0 25 50 75 100 Operating ambient temperature TA (°C) 1 0.5 RT = 18 kΩ 4 2 0 –2 –4 0.4 0.3 0.2 0.1 –6 –25 0 25 50 75 100 Operating ambient temperature TA (°C) 8 100 VOL vs IO 6 Output ON voltage VOL (V) Oscillation frequency accuracy ∆fOSC (%) ∆fOSC vs TA 10 Timing resistance RT (kΩ) 0 Data Sheet G13690EJ3V0DS00 5 10 15 Output current IO (mA) 20 µ PC1933 DMAX. vs RT VOL vs TA 100 0.4 Channel maximum duty DMAX. (%) 0.3 0.2 0.1 0 –25 90 80 70 60 50 0 25 50 75 1 100 Channel soft start time tSS (ms) 500 400 300 200 100 0 0.2 0.4 0.6 0.8 1.0 DLY pin capacitor capacitance CDLY ( µ F) Short-circuit protection circuit delay time tDLY (ms) tSS vs CDLY tDLY vs CDLY 600 500 400 300 200 100 0 0.2 0.4 0.3 0.4 1.0 DLY pin capacitor capacitance CDLY ( µ F) Av, φ vs f tDLY vs TA 60 100 180 50 80 135 40 60 Gain Av (dB) Delay time tDLY (ms) 100 Timing resistance RT (kΩ) Operating ambient temperature TA (°C) 600 10 30 20 φ 90 40 45 Av 20 0 –45 0 10 Phase φ (deg) Output ON voltage VOL (V) IO = 20 mA CDLY = 0.1 µF 0 –25 0 25 50 75 100 –20 100 Operating ambient temperature TA (°C) Data Sheet G13690EJ3V0DS00 1k 10 k 100 k 1M –90 10 M Frequency f (Hz) 9 µ PC1933 ICC vs VCC ICC vs TA 2 1 0 10 4 Circuit operation ICC (mA) Circuit operation ICC (mA) 3 5 10 15 20 25 Supply voltage VCC (V) 30 3 2 1 0 –25 0 25 50 75 100 Operating ambient temperature TA (°C) Data Sheet G13690EJ3V0DS00 µ PC1933 2. CONFIGURATION AND OPERATION OF EACH BLOCK Figure 2-1 Block Diagram Oscillation section FB 8 II 1 Error amplifier 0.3 V 4 VCC 3 Reference voltage section SCP comparator S Q1 OUT 6 GND Soft start select switch Q Q2 1.92 V Q Timer latch for short-circuit protection section 2 CDLY 2.1 5 Under voltage lock-out section Dead time setting: 85 % (internally fixed) DLY RT Output section PWM comparator VREF 7 Reference Voltage Generator The reference voltage generator is comprised of a band-gap reference circuit, and outputs a temperature-compensated reference voltage (2.1 V). The reference voltage can be used as the power supply for internal circuits, or as a reference voltage, and can also be accessed externally via the VREF pin (pin 4). 2.2 Oscillator The oscillator self-oscillates if a timing resistor is attached to the RT pin (pin 7). This oscillator waveform is input to the inverted input pin of the PWM comparator to determine the oscillation frequency. 2.3 Under Voltage Lock-out Circuit The under voltage lock-out circuit prevents malfunctioning of the internal circuits when the supply voltage is low, such as when the supply voltage is first applied, or when the power supply is interrupted. When the voltage is low, the output transistor is cut off at the same time. 2.4 Error Amplifier The non-inverted input pin of the error amplifier is connected internally to 0.3 V (the input threshold voltage is 0.3 V (TYP.)). The first stage of the error amplifier is a P-channel MOS transistor input. Data Sheet G13690EJ3V0DS00 11 µ PC1933 2.5 PWM Comparator The output ON duty is controlled according to the outputs of the error amplifier. A triangular waveform is input to the inverted pin, and the error amplifier output and Dead Time Control pin voltage (fixed internally) are input to the non-inverted pins of the PWM comparator. Therefore, the output transistor ON period is the period when the triangular waveform is lower than the error amplifier output and Dead Time Control pin voltage (fixed internally) (refer to Timing Chart). 2.6 Timer Latch-Method Short Circuit Protection Circuit When the output of the converter drops, the non-inverted input pin (1 pin) voltage of the error amplifier drops, and the FB output of the error amplifier of the output goes high. If the FB output exceeds the timer latch input detection voltage (VTH = 1.92 V), then the output of the SCP comparator goes low, and Q1 goes off. When Q1 turns OFF, the constant-current supply charges CDLY via the DLY pin. The DLY pin is internally connected to a flip-flop. When the DLY pin voltage reaches the UV detection voltage (VUV = 0.7 V (TYP.)), the output Q of the flip-flop goes low, and the output stage is latched to OFF (refer to Figure 2-1 Block Diagram). Make the power supply voltage briefly less than the reset voltage (VCCR, 1.0 V TYP.) to reset the latch circuit when the short-circuit protection circuit has operated. 2.7 Output Circuit The output circuit has an N-channel open-drain output providing an output withstand voltage of 30 V (absolute maximum rating), and an output current of 21 mA (absolute maximum rating). 12 Data Sheet G13690EJ3V0DS00 µ PC1933 3. NOTES ON USE 3.1 Setting the Output Voltage Figure 3-1 illustrates the method of setting the output voltage. The output voltage is obtained using the formula shown in the figure. The input threshold value of the error amplifier is 0.3 V (TYP.) for the error amplifier. Therefore, select a resistor value that gives this voltage. Figure 3-1 Setting the Output Voltage VOUT (positive voltage) VOUT = 1 + R1 • 0.3 R2 R1 1 R2 E/A CNF RNF 8 0.3 V 3.2 Setting the Oscillation Frequency Choose RT according to the oscillation frequency (fOSC) vs timing resistor (RT) characteristics (refer to Typical Characteristics Curves fOSC vs RT.) The formula below (3-1) gives an approximation of fOSC. However, the result of formula 3-1 is only an approximation, and the value must be confirmed in actual operation, especially for high-frequency operation. fOSC[Hz] ≅ 1.856 x 10 /RT[Ω] 9 3.3 (3-1) Preventing Malfunction of the Timer Latch-Method Short Circuit Protection Circuit The timer latch short-circuit protection circuit operates when the error amplifier output (pin 8) exceed approximately 1.92 V, and cuts off the output. However, if the rise of the power supply voltage is fast, or if there is noise on the DLY pin (pin 2), the latch circuit may malfunction and cut the output off. To prevent this, lower the wiring impedance between the DLY pin and the GND pin (pin 6), and avoid applying noise to the DLY pin. Data Sheet G13690EJ3V0DS00 13 µ PC1933 3.4 ON/OFF Control The ON/OFF control method of the output oscillation is to input the ON/OFF signal from ON as shown in Figure 3-2. Soft start or timer latch (SCP) is internally selected. Soft start is executed when the first start signal is input. When the end of soft start is detected, the soft start select switch is turned OFF and the timer latch circuit operates. Figure 3-2 ON/OFF Control VO (Converter output voltage) FB R1 SCP comparator II – + R2 + Error amplifier Q – 0.3 V 0.63 V VREF D1 R Dead time setting: 85 % (internally fixed) ON Q1 To output stage + + – SW PWM comparator Oscillation section (common to each channel) CDLY DLY (1) When ON is high: OFF status Q1: ON → DLY pin: Low level → Output duty of PWM comparator: 0 % D1: ON → II pin: High level → FB output: Low level (2) When ON is low: ON status (start up) Q1: OFF → CDLY is charged in the sequence of [VREF → R1 → SW → DLY pin → CDLY] → Soft start D1: OFF → II pin: Low level → FB output: High level (3) When ON goes high again after start up (SW: OFF): OFF status Q1: ON → DLY pin: Low level (Nothing happens because SW is OFF.) D1: ON → II pin: High level → FB output: Low level → PWM comparator output duty: 0 % → Converter output voltage (VO) drops. Caution Even if start up is executed by making ON low again after (3), soft start is not executed because the soft start select switch (SW) remains OFF. To execute soft start again, drop VCC to 0 V once. 14 Data Sheet G13690EJ3V0DS00 µ PC1933 3.5 Maximum Duty Limit µ PC1933 is switched internally between Soft Start and Timer Latch. For this reason, the DTC voltage is fixed internally, and the maximum duty is limited to 85%. 3.6 Notes on Actual Pattern Wiring When actually carrying out the pattern wiring, it is necessary to separate control-related grounds and power-related grounds, and make sure that they do not share impedances as far as possible. In addition, make sure the high-frequency impedance is lowered using capacitors and other components to prevent noise input to the VREF pin. Data Sheet G13690EJ3V0DS00 15 µ PC1933 4. APPLICATION EXAMPLE 4.1 Application Example Figure 4-1 shows an example circuit for obtaining +5 V/50 mA from a +3 V power supply. Figure 4-1 Application Example COM VIN = 3 V C5 1 µF R2 47 kΩ 8 FB C1 3300 pF R1 30 kΩ 7 6 RT GND OUT VR4 1 kΩ Q1 C2 100 pF VO = + 5 V IO = 50 mA D1 R9 68 Ω Q3 C3 100 pF Q2 R8 7.5 kΩ C4 68 µ F R10 20 kΩ COM DLY VCC VREF 1 2 3 CDLY 0.1 µ F 4.2 R7 R3 20 kΩ 2.4 kΩ 5 µ PC1933 II R6 470 Ω R5 150 Ω RT 3.9 kΩ L1 47 µ H 4 C0 0.1 µ F List of External Parts The list below shows the external parts. Table 4-1 List of External Parts Symbol C4 Parameter 68 µ F D1 L1 47 µ H Function Part number Maker Output capacitor 20SA68M SANYO Schottkey diode D1FS4 SHINDENGEN Choke inductor 636FY-470M TOKO Q3 Switching transistor 2SD2403 NEC Q1 Buffer transistor 2SC1623 NEC Q2 Buffer transistor 2SA812 NEC Remark OS-CON, SA series D73F series Remarks 1. The capacitors that are not specified in the above list are multilayer ceramic capacitors. 2. The resistors that are not specified in the above list are 1/4W resistors. 16 Data Sheet G13690EJ3V0DS00 µ PC1933 5. PACKAGE DRAWING 8-PIN PLASTIC SOP (5.72 mm (225)) 8 5 detail of lead end P 4 1 A H F I G J S B C D M L N K S M E NOTE Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS A 5.2 +0.17 −0.20 B 0.78 MAX. C 1.27 (T.P.) D 0.42 +0.08 −0.07 E 0.1±0.1 F 1.59±0.21 G 1.49 H 6.5±0.3 I 4.4±0.15 J 1.1±0.2 K 0.17 +0.08 −0.07 L 0.6±0.2 M 0.12 N 0.10 P +7° 3° −3° S8GM-50-225B-6 Data Sheet G13690EJ3V0DS00 17 µ PC1933 6. RECOMMENDED SOLDERING CONDITIONS Recommended solder conditions for this product are described below. For details on recommended soldering conditions, refer to Information Document “Semiconductor Device Mounting Technology Manual” (C10535E). For soldering methods and conditions other than those recommended, consult NEC. Surface Mount Type µ PC1933GR: 8-pin plastic SOP (5.72 mm (225)) Soldering Method Soldering Conditions Symbol of Recommended Conditions Infrared reflow Package peak temperature: 235 °C, Time: 30 seconds MAX. (210 °C MIN.), IR35-00-3 Number of times: 3 MAX. VPS Package peak temperature: 215 °C, Time: 40 seconds MAX. (200 °C MIN.), VP15-00-3 Number of times: 3 MAX. Wave soldering Soldering bath temperature: 260 °C MAX., Time: 10 seconds MAX., Number of times: 1, Preheating temperature: 120 °C MAX. (package surface temperature) Caution Do not use two or more soldering methods in combination. 18 Data Sheet G13690EJ3V0DS00 WS60-00-1 µ PC1933 NOTES FOR BiCMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS Note: No connection for device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. Input levels of devices must be fixed high or low by using a pull-up or pulldown circuitry. Each unused pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF BiCMOS DEVICES Note: Power-on does not necessarily define initial status of device. Production process of BiCMOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. Data Sheet G13690EJ3V0DS00 19 µ PC1933 [MEMO] • The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. • NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. • Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. • While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. • NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. M7 98. 8