PM7385 FREEDM-84A672 PMC-Sierra,Inc. Frame Engine and Data Link Manager C1FPOUT C1FP FASTCLK REFCLK BLOCK DIAGRAM • Provides a 16 bit microprocessor interface for configuration and status monitoring. • Provides a standard five signal P1149.1 JTAG test port for boundary scan board test purposes. • Supports 3.3 Volt tolerant I/O. • 352 pin enhanced ball grid array (SBGA) package. APPLICATIONS • • • • • • PPP interfaces for routers. Internet/Edge Routers. Frame Relay/Multiservice Switches. Packet-based DSLAM equipment. Remote Access Concentrators. Multiservice Access Concentrators. RSTB SYSCLK PMCTEST • Single-chip multi-channel HDLC controller with a 50 MHz, 16 bit AnyPHY™ Packet Interface (APPI) for transfer of packet data using an external controller. • Supports up to 672 bi-directional HDLC channels assigned to a maximum of 84 channelised or unchannelised links conveyed via a 19.44 MHz Scalable Bandwidth Interconnect (SBI™) interface. • Data on the SBI interface is divided into three Synchronous Payload Envelopes (SPEs). Each SPE can be configured independently to carry data for either 28 T1/J1 links, 21 E1 links, or one unchannelised DS-3 link. • Supports three bi-directional HDLC channels each assigned to an unchannelised link with arbitrary rate link of up to 51.84 MHz when SYSCLK is running at 45 MHz. Each link may be configured individually to replace one of the SPEs conveyed on the SBI interface. • For each channel, the HDLC receiver supports programmable flag sequence detection, bit de-stuffing and frame check sequence validation. The receiver supports the validation of both CRC-CCITT and CRC-32 frame check sequences. • For each channel, the HDLC transmitter supports programmable flag sequence generation, bit stuffing and frame check sequence generation. The transmitter supports the generation of both CRC-CCITT and CRC-32 frame check sequences. The transmitter also aborts packets under the direction of the external controller or automatically when the channel underflows. • Provides 32 Kbytes of on-chip memory for partial packet buffering in both the transmit and the receive directions. This memory may be configured to support a variety of different channel configurations from a single channel with 32 Kbytes of buffering to 672 channels, each with a minimum of 48 bytes of buffering. SPE3_EN SPE2_EN SPE1_EN FEATURES RCLK[2:0] RD[2:0] DDATA[7:0] DPL DV5 DDP Receive HDLC Processor/ Partial Packet Buffer (RHDL672) Receive Channel Assigner (RCAS672) SBI Extract Receive AnyPHY Packet Interface (RAPI672) RXCLK RXADDR[2:0] RPA RENB RXDATA[15:0] RXPRTY RSX REOP RMOD RERR RVAL Transmit AnyPHY Packet Interface (TAPI672) TXCLK TXADDR[12:0] TPA1[2:0] TPA2[2:0] TRDY TXDATA[15:0] TXPRTY TSX TEOP TMOD TERR Performance Monitor (PMON) ADATA[7:0] APL AV5 ADP AJUST_REQ Transmit Channel Assigner (TCAS672) SBI Insert Transmit HDLC Processor/Partial Packet Buffer (THDL672) AACTIVE ADETECT[1:0] TD [2:0] TCLK[2:0] PMC-1991025 (r2) TD0 TD1 TCK TMS TRSTB RDB JTAG INTB WRB ALE CSB A[11:2] D[15:0] Microprocessor Interface PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 2001 PMC-Sierra, Inc. PM7385 FREEDM-84A672 Frame Engine and Data Link Manager TYPICAL APPLICATIONS T1/E1 CHANNELIZED 622 MBIT/S INTERFACE SBI Bus OC-12 Any-PHY (Packet) PM8316 TEMUX-84 PM7385 FREEDM84A672 PM8316 TEMUX-84 PM7385 FREEDM84A672 Any-PHY Interface TelecomBus PM5313 SPECTRA-622 PM8316 TEMUX-84 PM7385 FREEDM84A672 PM8316 TEMUX-84 PM7385 FREEDM84A672 Multilink FR Voice over FR FUNI + AAL5 SAR Backkplane Bus Interface ATM MULTISERVICE SWITCH PM7385 FREEDM84A672 PM8316 TEMUX-84 Any-PHY (Cell) Packet/Cell Internetworking Function PM7341 S/UNI-IMA-84 PM5313 SPECTRA622 PM7326 S/UNI-APEX PM73122 PM73122 AAL1gatorPM73122 AAL1gator32 AAL1gator32 32 PM8316 TEMUX-84 Any-PHY PM8316 TEMUX-84 OC-12 Any-PHY (Packet) SBI Bus APPI TelecomBus PM7324 S/UNI-ATLAS H-MVIP PM8316 TEMUX-84 Head Office: PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: [email protected] or contact the head office, Attn: Document Coordinator VoATM DSP All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: [email protected] PMC-1991025 (r2) 2001 PMC-Sierra, Inc. All rights reserved. August 2001. S/UNI is a registered trademark and AAL1gator-32, FREEDM, SBI, Any-PHY, TEMUX-84, FREEDM-84A672, SPECTRA-622, and PMCSierra are trademarks of PMC-Sierra, Inc. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE