® SP3220EB/EU High Speed +3.0V to +5.5V RS-232 Driver/Receiver Pair SP 32 20 EB /EU ■ Meets True RS-232 Protocol Operation From A +3.0V to +5.5V Power Supply ■ Minimum 250 Kbps Data Rate (SP3220EB) or 1Mbps Data Rate (SP3220EU) under Fully Load ■ 1µA Low-Power Shutdown With Receivers Active ■ Interoperable With EIA/TIA - 232 and adheres to EIA/TIA - 562 Down to +2.7V Power Source ■ Pin-Compatible With The MAX3221E Device Without The AUTO ON-LINE® Feature ■ ESD Specifications: +15kV Human Body Model +15kV IEC1000-4-2 Air Discharge +8kV IEC1000-4-2 Contact Discharge DESCRIPTION The SP3220EB/EU device is an RS-232 driver/receiver solution intended for portable or handheld applications such as notebook or palmtop computers. The SP3220EB/EU device has a highefficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This charge pump allows the SP3220EB/EU device to deliver true RS-232 performance from a single power supply ranging from +3.3V to +5.0V. The ESD tolerance of the SP3220EB/EUE device is over ±15kV for both Human Model and IEC1000-4-2 Air discharge test methods. The SP3220EB/EU device has a low-power shutdown mode where the driver outputs and charge pumps are disabled. During shutdown, the supply current falls to less than 1µA. VCC C5 C1 + 15 VCC 0.1µF 2 C1+ + V+ 3 0.1µF *C3 4 C15 C2+ C2 + 0.1µF LOGIC INPUTS LOGIC OUTPUTS SP3220EB/EU V- C4 T1OUT 9 R1OUT R1IN SHDN + 0.1µF 13 RS-232 OUTPUTS 8 RS-232 INPUTS 5kΩ 1 EN 0.1µF 7 6 C211 T1IN + 16 GND 14 Rev: A Date:12/11/03 *can be returned to either VCC or GND SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 1 © Copyright 2002 Sipex Corporation Input Voltages TxIN, EN .............................................. -0.3V to +6.0V RxIN ................................................................... +25V ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. Output Voltages TxOUT ............................................................. +13.2V RxOUT ......................................... -0.3V to (VCC+0.3V) Short-Circuit Duration TxOUT ...................................................... Continuous VCC.............................................................-0.3V to +6.0V V+ (NOTE 1)..............................................-0.3V to +7.0V V- (NOTE 1).............................................+0.3V to -7.0V V+ + |V-| (NOTE 1)...................................................+13V Storage Temperature ....................... -65°C to +150°C Power Dissipation Per Package 16-pin SSOP (derate 9.69mW/oCabove+70oC) ........ 775mW 16-pin TSSOP (derate 10.5mW/oC above +70oC) ..... 840mW 16-pin Wide SOIC (derate 11.2mW/oC above+70oC) 900mW ICC (DC VCC or GND current)..........................+100mA NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V. SPECIFICATIONS Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX. Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC, C1-4=0.1µF. PARAMETER MIN. TYP. MAX. UNITS CONDITIONS Supply Current 0.3 1.0 mA no load, TAMB = +25oC, VCC = 3.3V TxIN = GND or VCC Shutdown Supply Current 1.0 10 µA SHDN = GND, TAMB = +25oC, VCC = +3.3V TxIN = 0V or VCC 0.8 V TxIN, EN, SHDN, Note 2 DC CHARACTERISTICS LOGIC INPUTS AND RECEIVER OUTPUTS Input Logic Threshold LOW GND Input Logic Threshold HIGH 2.0 VCC V VCC = 3.3V, Note 2 or 5.0V, Note 2 Input Leakage Current ±0.01 ±1.0 µA TxIN, EN, SHDN, TAMB = +25oC VIN = 0V to VCC Output Leakage Current ±0.05 ±10 µA Receivers Disabled VOUT = 0V to VCC 0.4 V IOUT = 1.6mA Output Voltage LOW Output Voltage HIGH VCC-0.6 VCC-0.1 V IOUT = -1.0mA Output Voltage Swing ±5.0 ±5.4 V 3kΩ load to ground at all driver outputs, TAMB = +25oC Output Resistance 300 DRIVER OUTPUTS Output Short-Circuit Current Output Leakage Current Rev: A Date:12/11/03 Ω ±35 VCC = V+ = V- = 0V, TOUT = +2V ±60 mA VOUT = 0V ±25 µA VOUT = +12V,VCC= 0V to 5.5V,drivers disabled SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 2 © Copyright 2002 Sipex Corporation SPECIFICATIONS (continued) Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX. Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC, C1-4=0.1µF. PARAMETER MIN. TYP. MAX. UNITS +25 V CONDITIONS RECEIVER INPUTS Input Voltage Range -25 Input Threshold LOW 0.6 0.8 1.2 1.5 Input Threshold HIGH 1.5 1.8 Input Hysteresis 0.3 Input Resistance 3 5 2.4 2.4 V VCC=3.3V VCC=5.0V V VCC=3.3V VCC=5.0V V 7 kΩ TIMING CHARACTERISTICS Maximum Data Rate 250 Kbps RL=3kΩ, CL=1000pF (SP3220EB) Maximum Data Rate 1000 Kbps RL=3kΩ, CL= 250pF (SP3220EU) tPHL, RxIN to RxOUT, CL = 150pF tPHL, RxIN to RxOUT, CL = 150pF Receiverr Propagation Delay 0.15 0.15 µs µs Receiver Output Enable Time 200 ns Receiver Output Disable Time 200 ns Driver Skew 100 ns | tPHL - tPLH |, TAMB = 25oC Receiver Skew 50 ns | tPHL - tPLH | Transition-Region Slew Rate 30 V/µs 90 V/µs VCC = 3.3V, RL = 3KΩ, TAMB = 25oC, measurements taken from -3.0V to +3.0V or +3.0V to -3.0V (SP3220EB) (SP3220EU) NOTE 2: Driver input hysteresis is typically 250mV. Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 3 © Copyright 2002 Sipex Corporation TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rates, all drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C. 6 30 T1 at Full Data Rate T2 at 1/16 Full Data Rate T1+T2 Loaded with 3k/CLoad 125Kbps 20 60Kbps 15 20Kbps 10 4 Transmitter Output Voltage (V) Icc (mA) 25 5 TxOUT + 2 T1 at 250Kbps 0 -2 TxOUT - -4 0 0 1000 2000 3000 4000 -6 5000 Load Capacitance (pF) 3000 4000 5000 12 TxOUT + 10 4 Supply Current (mA) Transmitter Output Voltage (V) 2000 Figure 2. Transmiter Output Voltage vs Load Capacitance for the SP3220EB.. 6 2 0 -2 -4 TxOUT - -6 2.7 3 3.5 4 Supply Voltage (V) 4.5 8 6 4 2 0 5 T1 Loaded with 3K // 1000pf @ 250Kbps 2.7 3 3.5 4 4.5 5 Supply Voltage (V) Figure 4. Supply Current vs Supply Voltage for the SP3220EB. Figure 3. Transmitter Output Voltage vs Supply Voltage for the SP3220EB. 40 25 1Mbps - Slew + Slew 20 30 15 Icc (mA) Slew rate (V/µs) 1000 Load Capacitance (pF) Figure 1. ICC vs Load Capacitance for the SP3220EB. 10 2Mbps 500Kbps 20 10 5 0 0 0 500 1000 2000 3000 4000 0 5000 0 Load Capacitance (pF) 500 1000 2000 3000 4000 Load Capacitance (pF) Figure 4. Supply Current vs Supply Voltage for the SP3220EU. Figure 5. Slew Rate vs Load Capacitance for the SP3220EB. Rev: A Date:12/11/03 250 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 4 © Copyright 2002 Sipex Corporation TYPICAL PERFORMANCE CHARACTERISTICS: Continued Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rates, all drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C. 6 6 TxOUT + 1Mbps 4 Transmitter Output Voltage (V) Transmitter Output Voltage (V) 1.5Mbps 2Mbps 4 2 0 -2 1.5Mbps 2Mbps -4 2 0 -2 -4 1Mbps TxOUT - -6 -6 2.5 0 250 500 1000 1500 2.7 2000 3 3.5 4 Supply Voltage (V) 4.5 5 Load Capacitance (pF) Figure 8. Transmiter Output Voltage vs Supply Voltage for the SP3220EU. Figure 7. Transmitter Output Voltage vs Load Capacitance for the SP3220EU. Supply Current (mA) 16 14 12 10 8 6 4 T1 Loaded with 3K // 1000pf @1Mbps 2 0 2.7 3 3.5 4 4.5 5 Supply Voltage (V) Figure 9. Supply Current vs Supply Voltage for the SP3220EU. Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 5 © Copyright 2002 Sipex Corporation NAME FUNCTION PIN NUMBER EN Receiver Enable Control. Drive LOW for normal operation. Drive HIGH to TriState the receiver outputs (high-Z state). 1 C1+ Positive terminal of the voltage doubler charge-pump capacitor. 2 V+ +5.5V generated by the charge pump. 3 C1- Negative terminal of the voltage doubler charge-pump capacitor. 4 C2+ Positive terminal of the inverting charge-pump capacitor. 5 C2- Negative terminal of the inverting charge-pump capacitor. 6 V- -5.5V generated by the charge pump. 7 RS-232 receiver input. 8 TTL/CMOS reciever output. 9 R1IN R1OUT N.C. No Connect. T1IN TTL/CMOS driver input. 11 RS-232 driver output. 13 Ground. 14 +3.0V to +5.5V supply voltage 15 Shutdown Control Input. Drive HIGH for normal device operation. Drive LOW to shutdown the drivers (high-Z output) and the on-board charge pump power supply. 16 T1OUT GND VCC SHDN 10, 12 Table 1. Device Pin Description Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 6 © Copyright 2002 Sipex Corporation EN 16 SHDN 1 C1+ 2 V+ 3 C1- 4 15 VCC 14 GND SP3220EB/EU C2+ 5 13 T1OUT 12 No Connect C2- 6 11 T1IN V- 7 10 R1IN 8 9 No Connect R1OUT Figure 10. Pinout Configurations for the SP3220EB/EU Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 7 © Copyright 2002 Sipex Corporation VCC C5 C1 + 15 0.1µF VCC 2 C1+ + V+ 3 0.1µF *C3 4 C15 C2+ C2 + 0.1µF LOGIC INPUTS LOGIC OUTPUTS SP3220EB/EU V- 6 C2T1OUT 9 R1OUT R1IN SHDN + 0.1µF 13 RS-232 OUTPUTS 8 RS-232 INPUTS 5kΩ 1 EN 0.1µF 7 C4 11 T1IN + 16 GND 14 *can be returned to either VCC or GND Figure 11. SP3220EB/EU Typical Operating Circuits Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 8 © Copyright 2002 Sipex Corporation DESCRIPTION The SP3220EU drivers can guarantee a data rate of 1000Kbps fully loaded with 3 in parallel with 250pF. The SP3220EB/EU device meets the EIA/TIA232 and V.28/V.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. The SP3220EB/ EU device features Sipex's proprietary onboard charge pump circuitry that generates 2 x VCC for RS-232 voltage levels from a single +3.0V to +5.5V power supply. This series is ideal for +3.3V-only systems, mixed +3.0V to +5.5V systems, or +5.0V-only systems that require true RS-232 performance. The SP3220EB device has a driver that can operate at a data rate of 250Kbps fully loaded. The SP3220EU can Operate at 1000Kbps The slew rate of the SP3220EB output is internally limited to a maximum of 30V/µs in order to meet the EIA standards (EIA RS-232D 2.1.7, Paragraph 5). The transition of the loaded output from HIGH to LOW also meets the monotonicity requirements of the standard. Figure 12 shows a loopback circuit used to test the RS-232 driver. Figure 13 shows the test results of the loopback circuit with the SP3220EB driver active at 250Kbps with an RS-232 load in parallel with a 1000pF capacitor. Figure 14 shows the test results where the SP3220EU driver was active at 1000Kbps and loaded with an RS-232 receiver in parallel with a 250pF capacitor. A solid RS-232 data transmission rate of 250Kbps provides compatibility with many designs in personal computer peripherals and LAN applications. The SP3220EB/EU is a 1-driver/1-receiver device ideal for portable or hand-held applications. The SP3220EB/EU features a 1µA shutdown mode that reduces power consumption and extends battery life in portable systems. Its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1µA supply current. The SP3220EB/EU device is made up of three basic circuit blocks: 1. Drivers, 2. Receivers, and 3. the Sipex proprietary charge pump. The SP3220EB/EU driver's output stage is turned off (high-Z) when the device is in shutdown mode. When the power is off, the SP3220EB/ EU device permits the outputs to be driven up to +12V. The driver's input does not have pull-up resistors. Designers should connect an unused input to VCC or GND. Drivers The drivers are inverting level transmitters that convert TTL or CMOS logic levels to +5.0V EIA/TIA-232 levels inverted relative to the input logic levels. Typically, the RS-232 output voltage swing is +5.5V with no load and at least +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without degradation in reliability. Driver outputs will meet EIA/TIA-562 levels of +3.7V with supply voltages as low as 2.7V. In the shutdown mode, the supply current falls to less than 1µA, where SHDN = LOW. When the SP3220EB/EU device is shut down, the device's driver output is disabled (high-Z) and the charge pump is turned off with V+ pulled down to VCC and V- pulled to GND. The time required to exit shutdown is typically 100µs. Connect SHDN to VCC if the shutdown mode is not used. SHDN has no effect on RxOUT. Note that the driver is enabled only when the magnitude of V- exceeds approximately 3V. THEORY OF OPERATION The SP3220EB drivers typically can operate at a data rate of 250Kbps fully loaded with 3KΩ in parallel with 1000pF, ensuring compatibility with PC-to-PC communication software. Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 9 © Copyright 2002 Sipex Corporation VCC C5 C1 + + 0.1µF VCC C1+ V+ 0.1µF + 0.1µF C3 C1- C2 + C2+ SP3220EB/EU VC4 0.1µF C2- LOGIC INPUTS LOGIC OUTPUTS + 0.1µF TxOUT TxIN RxIN RxOUT 5kΩ EN *SHDN VCC GND (SP3220EB 1000pF) (SP3220EU 250pF) Figure 12. SP3220EB/EU Driver Loopback Test Circuit Figure 13. SP3220EB Driver Loopback Test Results at 250Kbps Rev: A Date:12/11/03 Figure 14. SP3220EU Driver Loopback Test Results at 1Mbps SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 10 © Copyright 2002 Sipex Corporation Receivers The receiver converts EIA/TIA-232 levels to TTL or CMOS logic output levels. The receiver has an inverting high-impedance output. This receiver output (RxOUT) is at high-impedance when the enable control EN = HIGH. In the shutdown mode, the receiver can be active or inactive. EN has no effect on TxOUT. The truth table logic of the SP3220EB/EU driver and receiver outputs can be found in Table 2. In most circumstances, decoupling the power supply can be achieved adequately using a 0.1µF bypass capacitor at C5 (refer to Figures 11). In applications that are sensitive to powersupply noise, decouple VCC to ground with a capacitor of the same value as charge-pump capacitor C1. Physically connect bypass capacitors as close to the IC as possible. The charge pumps operate in a discontinuous mode using an internal oscillator. If the output voltages are less than a magnitude of 5.5V, the charge pumps are enabled. If the output voltage exceed a magnitude of 5.5V, the charge pumps are disabled. This oscillator controls the four phases of the voltage shifting. A description of each phase follows. Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, a 5kΩ pulldown resistor to ground will commit the output of the receiver to a HIGH state. Phase 1 — VSS charge storage — During this phase of the clock cycle, the positive side of capacitors C1 and C2 are initially charged to VCC. Cl+ is then switched to GND and the charge in C1– is transferred to C2–. Since C2+ is connected to VCC, the voltage potential across capacitor C2 is now 2 times VCC. Charge Pump The charge pump is a Sipex–patented design (U.S. 5,306,954) and uses a unique approach compared to older less–efficient designs. The charge pump still requires four external capacitors, but uses a four–phase voltage shifting technique to attain symmetrical 5.5V power supplies. The internal power supply consists of a regulated dual charge pump that provides output voltages 5.5V regardless of the input voltage (VCC) over the +3.0V to +5.5V range. SHDN EN TxOUT RxOUT 0 0 Tri-state Active 0 1 Tri-state Tri-state 1 0 Active Active 1 1 Active Tri-state Phase 2 — VSS transfer — Phase two of the clock connects the negative terminal of C2 to the VSS storage capacitor and the positive terminal of C2 to GND. This transfers a negative generated voltage to C 3. This generated voltage is regulated to a minimum voltage of -5.5V. Simultaneous with the transfer of the voltage to C3, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND. Phase 3 — VDD charge storage — The third phase of the clock is identical to the first phase — the charge transferred in C1 produces –VCC in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at VCC, the voltage potential across C2 is 2 times VCC. Table 2. Truth Table Logic for Shutdown and Enable Control Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 11 © Copyright 2002 Sipex Corporation Phase 4 — VDD transfer — The fourth phase of the clock connects the negative terminal of C2 to GND, and transfers this positive generated voltage across C2 to C4, the VDD storage capacitor. This voltage is regulated to +5.5V. At this voltage, the internal oscillator is disabled. Simultaneous with the transfer of the voltage to C4, the positive side of capacitor C1 is switched to VCC and the negative side is connected to GND, allowing the charge pump cycle to begin again. The charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. this ESD test is to simulate the human body’s potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 20. This method will test the IC’s capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside enviroment and human presence. The premise with IEC10004-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accesible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for IEC-1000-42 is shown in Figure 21. There are two methods within IEC-4-2, the Air Discharge method and the Contact Discharge method. Since both V+ and V– are separately generated from VCC; in a no–load condition V+ and V– will be symmetrical. Older charge pump approaches that generate V– from V+ will show a decrease in the magnitude of V– compared to V+ due to the inherent inefficiencies in the design. The clock rate for the charge pump typically operates at 250kHz. The external capacitors can be as low as 0.1µF with a 16V breakdown voltage rating. ESD Tolerance The SP3220EB/EU device incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least ±15kV without damage nor latch-up. With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) trough air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasent zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel system before he or she even touches the system. This energy, weather discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. There are different methods of ESD testing applied: a) MIL-STD-883, Method 3015.7 b)IEC1000-4-2 Air Discharge c)IEC1000-4-2 Direct Contact The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 12 © Copyright 2002 Sipex Corporation VCC = +5V C4 +5V + + C1 – – VDD Storage Capacitor + C2 – –5V + – VSS Storage Capacitor C3 –5V Figure 15. Charge Pump — Phase 1 VCC = +5V C4 C1 + C2 – + – – + VDD Storage Capacitor + – VSS Storage Capacitor C3 –10V Figure 16. Charge Pump — Phase 2 [ T ] +6V a) C2+ T GND 1 GND 2 b) C2- T -6V Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V Figure 17. Charge Pump Waveforms VCC = +5V +5V C1 + C2 – –5V C4 + – – + + – –5V VDD Storage Capacitor VSS Storage Capacitor C3 Figure 18. Charge Pump — Phase 3 VCC = +5V +10V C4 + C1 + – C2 – + – – + VDD Storage Capacitor VSS Storage Capacitor C3 Figure 19. Charge Pump — Phase 4 Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 13 © Copyright 2002 Sipex Corporation R RSS R RC C SW2 SW2 SW1 SW1 Device Under Test C CSS DC Power Source Figure 20. ESD Test Circuit for Human Body Model The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transfered without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person directly discharged to the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. The circuit models in Figure 20 and 21 represent the typical ESD testing circuits used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test recives a duration of voltage. Contact-Discharge Module RSS RC C RV SW2 SW1 Device Under Test CSS DC Power Source RS and RV add up to 330Ω for IEC1000-4-2. Figure 21. ESD Test Circuit for IEC1000-4-2 Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 14 © Copyright 2002 Sipex Corporation For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5k and 100pF, respectively. For IEC-1000-4-2, the current limiting resistor (RS) and the source capacitor (CS) are 330 and 150pF, respectively. 30A 15A The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point. 0A t=0nS t t=30nS Figure 22. ESD Test Waveform for IEC1000-4-2 Device Pin Tested Driver Ouputs Receiver Inputs Rev: A Date:12/11/03 Human Body Model ±15kV ±15kV IEC1000-4-2 Air Discharge Direct Contact ±15kV ±8kV ±15kV ±8kV SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 15 Level 4 4 © Copyright 2002 Sipex Corporation PACKAGE: PLASTIC SHRINK SMALL OUTLINE (SSOP) E H D A Ø e A1 B DIMENSIONS (Inches) Minimum/Maximum (mm) Rev: A Date:12/11/03 L 16–PIN 20–PIN 24–PIN 28–PIN A 0.068/0.078 (1.73/1.99) 0.068/0.078 (1.73/1.99) 0.068/0.078 (1.73/1.99) 0.068/0.078 (1.73/1.99) A1 0.002/0.008 (0.05/0.21) 0.002/0.008 (0.05/0.21) 0.002/0.008 (0.05/0.21) 0.002/0.008 (0.05/0.21) B 0.010/0.015 (0.25/0.38) 0.010/0.015 (0.25/0.38) 0.010/0.015 (0.25/0.38) 0.010/0.015 (0.25/0.38) D 0.239/0.249 (6.07/6.33) 0.278/0.289 (7.07/7.33) 0.317/0.328 (8.07/8.33) 0.397/0.407 (10.07/10.33) E 0.205/0.212 (5.20/5.38) 0.205/0.212 (5.20/5.38) 0.205/0.212 (5.20/5.38) 0.205/0.212 (5.20/5.38) e 0.0256 BSC (0.65 BSC) 0.0256 BSC (0.65 BSC) 0.0256 BSC (0.65 BSC) 0.0256 BSC (0.65 BSC) H 0.301/0.311 (7.65/7.90) 0.301/0.311 (7.65/7.90) 0.301/0.311 (7.65/7.90) 0.301/0.311 (7.65/7.90) L 0.022/0.037 (0.55/0.95) 0.022/0.037 (0.55/0.95) 0.022/0.037 (0.55/0.95) 0.022/0.037 (0.55/0.95) Ø 0°/8° (0°/8°) 0°/8° (0°/8°) 0°/8° (0°/8°) 0°/8° (0°/8°) SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 16 © Copyright 2002 Sipex Corporation PACKAGE: PLASTIC SMALL OUTLINE (SOIC) E H D A Ø e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) Rev: A Date:12/11/03 16–PIN 18–PIN A 0.090/0.104 (2.29/2.649) 0.090/0.104 (2.29/2.649)) A1 0.004/0.012 (0.102/0.300) 0.004/0.012 (0.102/0.300) B 0.013/0.020 (0.330/0.508) 0.013/0.020 (0.330/0.508) D 0.398/0.413 (10.10/10.49) 0.447/0.463 (11.35/11.74) E 0.291/0.299 (7.402/7.600) 0.291/0.299 (7.402/7.600) e 0.050 BSC (1.270 BSC) 0.050 BSC (1.270 BSC) H 0.394/0.419 (10.00/10.64) 0.394/0.419 (10.00/10.64) L 0.016/0.050 (0.406/1.270) 0.016/0.050 (0.406/1.270) Ø 0°/8° (0°/8°) 0°/8° (0°/8°) SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 17 © Copyright 2002 Sipex Corporation PACKAGE: PLASTIC THIN SMALL OUTLINE (TSSOP) E2 E D A Ø e B A1 L DIMENSIONS in inches (mm) Minimum/Maximum Rev: A Date:12/11/03 16–PIN 20–PIN A - /0.043 (- /1.10) - /0.043 (- /1.10) A1 0.002/0.006 (0.05/0.15) 0.002/0.006 (0.05/0.15) B 0.007/0.012 (0.19/0.30) 0.007/0.012 (0.19/0.30) D 0.193/0.201 (4.90/5.10) 0.252/0.260 (6.40/6.60) E 0.169/0.177 (4.30/4.50) 0.169/0.177 (4.30/4.50) e 0.026 BSC (0.65 BSC) 0.026 BSC (0.65 BSC) E2 0.126 BSC (3.20 BSC) 0.126 BSC (3.20 BSC) L 0.020/0.030 (0.50/0.75) 0.020/0.030 (0.50/0.75) Ø 0°/8° 0°/8° SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 18 © Copyright 2002 Sipex Corporation ORDERING INFORMATION Model Temperature Range Package Type SP3220EBCA .......................................... 0˚C to +70˚C .......................................... 16-Pin SSOP SP3220EBCT ........................................... 0˚C to +70˚C .................................. 16-Pin Wide SOIC SP3220EBCY .......................................... 0˚C to +70˚C ........................................ 16-Pin TSSOP SP3220EBEA .......................................... -40˚C to +85˚C ........................................ 16-Pin SSOP SP3220EBET .......................................... -40˚C to +85˚C ................................ 16-Pin Wide SOIC SP3220EBEY .......................................... -40˚C to +85˚C ...................................... 16-Pin TSSOP SP3220EUCA .......................................... 0˚C to +70˚C .......................................... 16-Pin SSOP SP3220EUCT .......................................... 0˚C to +70˚C .................................. 16-Pin Wide SOIC SP3220EUCY .......................................... 0˚C to +70˚C ........................................ 16-Pin TSSOP SP3220EUEA ......................................... -40˚C to +85˚C ........................................ 16-Pin SSOP SP3220EUET .......................................... -40˚C to +85˚C ................................ 16-Pin Wide SOIC SP3220EUEY ......................................... -40˚C to +85˚C ...................................... 16-Pin TSSOP Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: [email protected] Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. Rev: A Date:12/11/03 SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers 19 © Copyright 2002 Sipex Corporation