SL7101 EARTH LEAKAGE CURRENT DETECTOR Description The SL7101 is designed for use in earth leakage circuit interrupters for operation directly of the AC Line in breakers. It contains pre regulator, main regulator, after regulator, differential amplifier, level comparator, latch circuit. The input in the differential amplifier is connect to the secondary node of zero current transformer. The level comparator generates high level when earth leakage current is greater than some level. Pin Configuration (Top View) Feature • Low Power Consumption (P D=5mW) 100V/200V • 100V/200V Common Built-in Voltage Regulator • High Gain Differential Amplifier • High Input Sensitivity • Minimum External Parts • Large Surge Margin • Wide Operating Temperature Range (TÀ =-30 to 85°C) • High Noise Immunity Absolute Maximum Ratings (T^=25°c) § § § § § Supply Voltage Supply Current Power Dissipation Operating Temperature Storage Temperature 20V 8mA 200mW - 30 to 85°C - 55 to 125°C Block Diagram SLS System Logic Semiconductor VR 1 8 V IN 2 7 OS 3 6 NR 4 5 SC OD + SL7101 Recomended Operating Condition: T A=-30°C to 80°C PARAMETER SYMBOL MIN. + Supply Voltage Vs-GND Capacitor V Cvs OS-GND Capacitor Cos TYP. MAX UNIT 12 1 V µF µF 1 Electrical Characteristics PARAMETER SYMBOL Supply Current 1 lS1 * Trip Voltage VT Differential Amplifier Output Current 1 Differential Amplifier Output current 2 ITD1 CONDTIONS V+=12V, VR - VI = 30 mV TEMP. (°C) -30 25 85 -30 85 25 MIN. TYP. MAX. UNIT 300 9 400 13.5 580 530 480 18 -12 -20 -30 mV (rms) µA 25 17 27 37 µA -30 25 85 25 -200 -100 -75 0.7 1.0 1.4 V µA Output Current IO SC ON Voltage VSC ON V+ = 16V, VR - VI = X V+ = 16 V, VR - VI = 30 mV VOD = 1.2 V V+ = 16 V, VR - VI = short VOD = 0.8 V lSI = 580µA V SC = 1.4 V lSI = 530µA V OS = 0.8 V lSI = 480µA V+ = 16 V SC Input Current ISC ON V+ = l2V 25 - - 5 µA 800 1400 µA 4.3 - 6.7 V 0.4 1.2 2 V VSM ISM = 7 mA -30 85 -30 85 -30 85 25 200 VIDC V+ = 12 V, VOSL = 0.2 V V+ = 12 V, IIC = 20 mA IIDC = 100mA 20 24 28 V -30 85 25 - - 1200 µA 0.5 25 1 ITD2 Output "L" Current IOSL Input Clamp Voltage Differential Input Clamp Voltaqe Max. Current Voltage Supply Current 2 VIC Latch Circuit Off Supply Votaqe Response Time * A: 9 ~12.5 SLS IS2 VOS = 0.5 V, VR - VI = X V+ OFF TON B: 11.5~15.5 System Logic Semiconductor V+ = 16 V, VR - VI = 0.3 V C: 14.5~18 µA V 3 4 ms SL7101 Typical Performance Curves SLS System Logic Semiconductor SL7101 Typical Application Description of elements of application diagram 1. The resistance of R1 resistor is chosen in such a way so that to limit IC’s consumption current (not more than 8 mA), and here the voltage drop is around 21-28V. 2. R2 resistor provides the necessary bias of the differential cascade. 3. R3 resistor is a loading one per input. 4. R4 resistor limits the charging current of C4 electrolytic capacitor are required to maintain IC performance until the fuse is completely burn out. Its value is chosen correspondingly. 5. C1 electrolytic capacitor is a filtering one as per supply (around 1 – 10 µF ). 6. Ñ 2 and C3 capacitors are filtering ones (not more than 1 µF) SLS System Logic Semiconductor