INTEGRAL INA84C641

INA84C641
8-BIT MICROCONTROLLERS WITH OCD AND VST
Microcontroller is manufactured in 42-lead plastic DIP-package 2171Ю.42-A. Device is
functionally identical to the PCA84C641/068 Philips.
BASIC FEATURES.
- Manufactured in 2µm silicon gate CMOS process
- TV set switch on/off
- receiving channel subbaund switching
- fine tuning receiving channel
- automatic frequency control
- PAL/SECAM switching
- volume, brightness, contrast control
- On Screen Display forility
- Operating temperature: -10 - +700С
BASIC ELECTRICAL CHARACTERISTICS
- Power supply voltage, V
- Supply current, mA
- Clock frequency, MHz
- Output current LOW for P1, DPO,DP1 ports and LOW3 and VOB pins, mA
- Output current LOW for port P0, mA
- Output voltage HIGH, V
T1
XLAT1
XLAT2
4.5.....5.5
10
10
1.2
10
3.7
VOW1 VOW3 DOSC
VOW2 VSYNC
VOB
HSYNC
INTN/T0
8-BIT TIMER/
DISPLAY
EVENT
CPU
ROM
RAM
ON SCREEN
COUNTER
RESETN
TEST
PARALLEL
8-BIT
6-BIT
14-BIT
I/O
PORTS
I/O
PORTS
DAC
DAC
P0 P1
DP0
DP1
3-BIT DAC
I2C
+
INTERFACE
COMPARATOR
PWM1-5 TDAC
1
SDA
SCL
INA84C641
PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
SYMBOL
DP0.0/Tdac
DP0.1/PWM1
DP0.2/PWM2
DP0.3/PWM3
DP0.4/PWM4
DP0.5/PWM5
P1.0/VHF1
P1.1/VHF3
P1.7/AFC
P1.2/VHF
P1.3/VTR
P1.4/AV
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7/Mdstr
VSS
DP1.6/VOW1
DP1.5/VOW2
VOW3
Fbl
HSYNC
VSYNC
DOSC1
DOSC2
Test
Xlat 1
Xlat 2
Reset N\
IDENT
Int/Rmot
DP1.3/Sndo
DP1.2/Effect
DP1.1/P/S
DP0.7/SCL
DP0.6/SDA
DP1.0/Stdby
VDD
DESCRIPTION
Derivative Port 0: quasi-bidirectional I/O line or 14-bit DAC PWM
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM
Port 1: quasi-bidirectional I/O lines
Port 1: quasi-bidirectional I/O lines
Derivative Port 1: quasi-bidirectional I/O line or comparator input with 3-bit
DAC
Port 1: quasi-bidirectional I/O lines
Port 1: quasi-bidirectional I/O lines
Port 1: quasi-bidirectional I/O lines
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Port 0: quasi-bidirectional I/O port
Ground
Derivative Port 1: quasi-bidirectional I/O lines or character video output
Derivative Port 1: quasi-bidirectional I/O lines or character video output
Character video output of OSD
Blanking output
Horizontal synchronous signal input
Vertical synchronous signal input
Connection to LC oscillator of OSD clock
Connection to LC oscillator of OSD clock
Control input for testing and emulation mode. Ground for normal operation
Oscillator output or input terminal for system clock
Oscillator output or input terminal for system clock
Initialise input, active LOW
Direct testable pin and event counter input
External interrupt or direct testable
Derivative Port 1: quasi-bidirectional I/O lines
Derivative Port 1: quasi-bidirectional I/O lines
Derivative Port 1: quasi-bidirectional I/O lines
Derivative open drain I/O port or I2C-bus clock line
Derivative open drain I/O port or I2C-bus data line
Derivative Port 1: quasi-bidirectional I/O lines
Power supply
2