TI SN74AUCH32244

SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
FEATURES
•
•
•
•
•
Member of the Texas Instruments Widebus+™
Family
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 1.8 ns at 1.8 V
•
•
•
•
•
Low Power Consumption, 40-µA Max ICC
±8-mA Output Drive at 1.8 V
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 32-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC
operation.
The SN74AUCH32244 is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It
provides true outputs and symmetrical active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
LFBGA – GKE
Tape and reel
ORDERABLE PART NUMBER
SN74AUCH32244GKER
TOP-SIDE MARKING
MK244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2005, Texas Instruments Incorporated
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
GKE PACKAGE
(TOP VIEW)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
TERMINAL ASSIGNMENTS
1
2
A
1Y2
1Y1
B
1Y4
1Y3
C
2Y2
2Y1
D
2Y4
E
F
3
4
5
6
1OE
2OE
1A1
1A2
GND
GND
1A3
1A4
VCC
VCC
2A1
2A2
2Y3
GND
GND
2A3
2A4
3Y2
3Y1
GND
GND
3A1
3A2
3Y4
3Y3
VCC
VCC
3A3
3A4
G
4Y2
4Y1
GND
GND
4A1
4A2
H
4Y3
4Y4
4OE
3OE
4A4
4A3
J
5Y2
5Y1
5OE
6OE
5A1
5A2
K
5Y4
5Y3
GND
GND
5A3
5A4
L
6Y2
6Y1
VCC
VCC
6A1
6A2
M
6Y4
6Y3
GND
GND
6A3
6A4
N
7Y2
7Y1
GND
GND
7A1
7A2
P
7Y4
7Y3
VCC
VCC
7A3
7A4
R
8Y2
8Y1
GND
GND
8A1
8A2
T
8Y3
8Y4
8OE
7OE
8A4
8A3
FUNCTION TABLE
(EACH 4-BIT BUFFER)
INPUTS
2
OE
A
OUTPUT
Y
L
H
H
L
L
L
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
FUNCTION TABLE
(EACH 4-BIT BUFFER) (continued)
INPUTS
OE
A
OUTPUT
Y
H
X
Z
3
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
1OE
1A1
1A2
1A3
1A4
2OE
2A1
2A2
2A3
2A4
5OE
5A1
5A2
5A3
5A4
6OE
6A1
6A2
6A3
6A4
4
A3
3OE
A5
A2
A6
A1
B5
B2
B6
B1
1Y1
3A1
1Y2
3A2
1Y3
3A3
1Y4
3A4
A4
4OE
C5
C2
C6
C1
D5
D2
D6
D1
2Y1
4A1
2Y2
4A2
2Y3
4A3
2Y4
4A4
J3
7OE
J5
J2
J6
J1
K5
K2
K6
K1
5Y1
7A1
5Y2
7A2
5Y3
7A3
5Y4
7A4
J4
8OE
L5
L2
L6
L1
M5
M2
M6
M1
6Y1
8A1
6Y2
8A2
6Y3
8A3
6Y4
8A4
H4
E5
E2
E6
E1
F5
F2
F6
F1
3Y1
3Y2
3Y3
3Y4
H3
G5
G2
G6
G1
H6
H1
H5
H2
4Y1
4Y2
4Y3
4Y4
T4
N5
N2
N6
N1
P5
P2
P6
P1
7Y1
7Y2
7Y3
7Y4
T3
R5
R2
R6
R1
T6
T1
T5
T2
8Y1
8Y2
8Y3
8Y4
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
3.6
V
VI
Input voltage range (2)
–0.5
3.6
V
–0.5
3.6
V
–0.5
VCC + 0.5
state (2)
UNIT
VO
Voltage range applied to any output in the high-impedance or power-off
VO
Output voltage range (2)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
±100
mA
Continuous current through VCC or GND
θJA
Package thermal
Tstg
Storage temperature range
(1)
(2)
(3)
impedance (3)
–65
V
40
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions (1)
VCC
Supply voltage
VCC = 0.8 V
VIH
High-level input voltage
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
MIN
MAX
0.8
2.7
Low-level input voltage
VI
Input voltage
0.65 × VCC
Output voltage
IOH
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise or fall rate
TA
Operating free-air temperature
0
VCC = 1.1 V to 1.95 V
0.35 × VCC
V
0.7
0
3.6
Active state
0
VCC
3-state
0
3.6
VCC = 0.8 V
–0.7
VCC = 1.1 V
–3
VCC = 1.4 V
–5
VCC = 1.65 V
–8
VCC = 2.3 V
–9
VCC = 0.8 V
0.7
VCC = 1.1 V
3
VCC = 1.4 V
5
VCC = 1.65 V
8
VCC = 2.3 V
9
VCC = 0.8 V
20
VCC = 1.3 V
15
VCC = 1.6 V, 1.95 V, and 2.7 V
(1)
V
1.7
VCC = 2.3 V to 2.7 V
VO
V
VCC
VCC = 0.8 V
VIL
UNIT
V
V
mA
mA
ns/V
10
–40
85
°C
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
5
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
VOL
II
TEST CONDITIONS
VCC
IBHH (3)
IBHLO (4)
IOH = –0.7 mA
0.8 V
IOH = –3 mA
1.1 V
0.8
IOH = –5 mA
1.4 V
1
IOH = –8 mA
1.65 V
1.2
IOH = –9 mA
2.3 V
1.8
IOL = 100 µA
0.8 V to 2.7 V
IOL = 0.7 mA
0.8 V
IOL = 3 mA
1.1 V
0.3
IOL = 5 mA
1.4 V
0.4
IOL = 8 mA
1.65 V
0.45
IOL = 9 mA
2.3 V
0.6
0.2
±5
10
VI = 0.47 V
1.4 V
15
VI = 0.57 V
1.65 V
20
VI = 0.7 V
2.3 V
40
VI = 0.8 V
1.1 V
–10
VI = 0.9 V
1.4 V
–15
VI = 1.07 V
1.65 V
–20
VI = 1.7 V
2.3 V
–40
1.3 V
75
1.6 V
125
1.95 V
175
2.7 V
275
1.3 V
–75
1.6 V
–125
1.95 V
–175
2.7 V
–275
VI or VO = 2.7 V
IOZ
VO = VCC or GND
ICC
VI = VCC or GND,
Ci
VI = VCC or GND
2.5 V
Co
VO = VCC or GND
2.5 V
6
V
0.25
1.1 V
Ioff
(4)
(5)
0.55
0 to 2.7 V
VI = 0 to VCC
IO = 0
UNIT
VCC – 0.1
VI = 0.35 V
VI = 0 to VCC
(3)
MAX
0.8 V to 2.7 V
IBHHO (5)
(1)
(2)
TYP (1)
IOH = –100 µA
A or OE inputs VI = VCC or GND
IBHL (2)
MIN
V
µA
µA
µA
µA
µA
0
±10
µA
2.7 V
±10
µA
0.8 V to 2.7 V
40
µA
3
4.5
pF
4
7
pF
All typical values are at TA = 25°C.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND
and then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
An external driver must sink at least IBHHO to switch this node from high to low.
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
VCC = 0.8 V
TYP
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
tpd
A
Y
5.4
0.8
2.8
0.6
1.9
0.7
1.3
1.8
0.5
1.8
ns
ten
OE
Y
8
1
4.4
0.7
2.6
0.8
1.4
2.5
0.6
1.9
ns
tdis
OE
Y
12
1.9
4.9
1
4.6
1.5
2.6
4
0.5
2
ns
PARAMETER
UNIT
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
Power
dissipation
capacitance
Outputs
enabled
Outputs
disabled
TEST
CONDITIONS
VCC = 0.8 V
VCC = 1.2 V
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
TYP
TYP
TYP
TYP
TYP
21
22
23
25
30
1
1
1
1
1
f = 10 MHz
UNIT
pF
7
SN74AUCH32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES412B – SEPTEMBER 2002 – REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
RL
From Output
Under Test
GND
CL
(see Note A)
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
Open
RL
LOAD CIRCUIT
VCC
CL
RL
V∆
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
15 pF
15 pF
15 pF
30 pF
30 pF
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
VCC
Timing Input
VCC/2
0V
tw
tsu
th
VCC
VCC/2
Input
VCC/2
VCC
VCC/2
Data Input
VCC/2
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
VCC/2
Input
VCC/2
0V
tPHL
tPLH
VCC/2
VCC/2
VOL
tPHL
VOH
Output
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
tPLZ
VCC
VCC/2
tPZH
VCC/2
VCC/2
0V
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLH
VCC/2
VCC/2
tPZL
VOH
Output
VCC
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VCC/2
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74AUCH32244GKER
ACTIVE
LFBGA
GKE
96
1000
SN74AUCH32244ZKER
ACTIVE
LFBGA
ZKE
96
1000 Green (RoHS &
no Sb/Br)
TBD
Lead/Ball Finish
MSL Peak Temp (3)
SNPB
Level-3-220C-168 HR
SNAGCU
Level-3-250C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
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to Customer on an annual basis.
Addendum-Page 1
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