Micrel, Inc. TRIPLE D FLIP-FLOP FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION The SY100S331 offers three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, designed for use in high-performance ECL systems. Each flip-flop is controlled by a common clock (CPc), as well as its own clock pulse (CPn). The resultant clock signal controlling the flip-flop is the logical OR operation of these two clock signals. Data enters the master when both CPc and CPn are LOW and enters the slave on the rising edge of either CPc or CPn (or both). Additional control signals include Master Set (MS) and Master Reset (MR) inputs. Each flip-flop also has its own Direct Set (SDn) and Direct Clear (CDn) signals. The MR, MS, SDn and DCn signals override the clock signals. The inputs on this device have 75kΩ pull-down resistors. Max. toggle frequency of 800MHz Differential outputs IEE min. of –80mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V Voltage and temperature compensation for improved noise immunity Internal 75kΩ input pull-down resistors 150% faster than Fairchild 40% lower power than Fairchild Function and pinout compatible with Fairchild F100K Available in 28-pin PLCC package PIN NAMES BLOCK DIAGRAM M9999-060910 [email protected] or (408) 955-1690 SY100S331 SY100S331 1 Pin CP0 – CP2 CPc Common Clock Input D0 – D2 Data Inputs CD0 – CD2 Individual Direct Clear Inputs SDn Individual Direct Set Inputs MR Master Reset Input MS Master Set Input Q0 – Q2 Data Outputs Q0 – Q2 Complementary Data Outputs VEES VEE Substrate VCCA VCCO for ECL Outputs Function Individual Clock Inputs Rev.: I Amendment: /0 Issue Date: June 2010 SY100S331 Micrel, Inc. PACKAGE/ORDERING INFORMATION Ordering Information Part Number SY100S331JC SY100S331JCTR (1) Package Type Operating Range Package Marking Lead Finish J28-1 Commercial SY100S331JC Sn-Pb J28-1 Commercial SY100S331JC Sn-Pb SY100S331JZ(2) J28-1 Commercial SY100S331JZ with Matte-Sn Pb-Free bar-line indicator SY100S331JZTR(1, 2) J28-1 Commercial SY100S331JZ with Pb-Free bar-line indicator Matte-Sn SY100S331JY with Pb-Free bar-line indicator Matte-Sn SY100S331JY(2) J28-1 SY100S331JYTR(1,2) J28-1 Industrial SY100S331JY with Matte-Sn Pb-Free bar-line indicator Industrial 28-Pin PLCC (J28-1) Notes: 1.Tape and Reel. 2.Pb-Free package is recommended for new designs. TRUTH TABLES Asynchronous Operation(1) Synchronous Operation(1) Outputs MR DCn Qn (t+1) Inputs Inputs Outputs MS SDn MR DCn Dn CPn CPc MS SDn X X X H L H L u L L L L X X X L H L H u L L L H X X X H H U L L u L L L H L u L L H X L L L L Qn (t) X H X L L Qn (t) X X H L L Qn (t) NOTE: 1.H = High Voltage Level, L = Low Voltage Level, X = Don't Care, U = Undefined, t = Time before CP Positive Transition, t+1 = Time after CP Positive Transition, u = Low-to-High Transition Dn CPn CPc Qn NOTE: 1.H = High Voltage Level, L = Low Voltage Level, X = Don't Care, U = Undefined, t = Time before CP Positive Transition, t+1 = Time after CP Positive Transition, u = Low-to-High Transition M9999-060910 [email protected] or (408) 955-1690 2 SY100S331 Micrel, Inc. DC ELECTRICAL CHARACTERISTICS VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND Symbol Parameter Min. Typ. Max. Unit IIH Input HIGH Current, All Inputs — — 200 µA VIN = VIH (Max.) Condition IEE Power Supply Current –80 –65 –35 mA Inputs Open AC ELECTRICAL CHARACTERISTICS VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND TA = -40°C TA = 0°C TA = +25°C TA = +85°C Min. Max. Min. Max. fmax Min. Max. 800 Toggle Frequency 800 — 800 — 800 — MHz tPLH tPHL 700 300 Propagation Delay CPc to Output 300 700 300 700 300 700 ps tPLH tPHL 300 Propagation Delay 300 700 300 700 300 700 700 ps CPn to Output tPLH tPHL Propagation Delay 800 300 CDn, SDn to Output 300 800 300 800 300 800 ps tPLH tPHL 300 900 Propagation Delay MS, MR to Output 300 900 300 900 300 900 ps tTLH tTHL Transition Time 300 900 300 900 300 900 300 900 ps 20% to 80%, 80% to 20% tS Set-up Time 400 Dn 400 — 400 — 400 500 CDn, SDn (Release Time) 500 — 500 — 500 800 MS, MR (Release Time) 800 — 800 — 800 300 Hold Time Dn 300 — 300 — 300 Symbol tH tpw (H) Parameter Min. Max. Unit Condition ps — — — ps — Pulse Width HIGH 800 — 800 — 800 — 800 ps CPn, CPc, DCn SDn, MR, MS M9999-060910 [email protected] or (408) 955-1690 3 SY100S331 Micrel, Inc. TIMING DIAGRAMS Propagation Delay (Clock) and Transition Times Note: VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND Propagation Delay (Sets and Resets) M9999-060910 [email protected] or (408) 955-1690 4 SY100S331 Micrel, Inc. TIMING DIAGRAMS Data Setup and Hold Time Notes: ts is the minimum time before the transition of the clock that information must be present at the data input. th is the minimum time after the transition of the clock that information must remain unchanged at the data input. M9999-060910 [email protected] or (408) 955-1690 5 SY100S331 Micrel, Inc. 28-PIN PLCC (J28-1) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2006 Micrel, Incorporated. M9999-060910 [email protected] or (408) 955-1690 6