TI SN74ALS113A

SDAS200 − D2661, APRIL 1982 − REVISED MAY 1986
•
•
•
Fully Buffered to Offer Maximum isolation
from External Disturbance
Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
Dependable Texas Instruments Quality and
Reliability
TYPE
TYPICAL MAXIMUM
CLOCK FREQUENCY
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
’ALS113A
40 MHz (CL=15 pF)
6 mW
SN54ALS113A . . . J PACKAGE
SN74ALS113A . . . D OR N PACKAGE
(TOP VIEW)
1 CLK
1K
1J
1PRE
1Q
1Q
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
2CLK
2K
2J
2PRE
2Q
2Q
SN54ALS113A . . . FK PACKAGE
(TOP VIEW)
1K
1CLK
NC
VCC
2CLK
description
These devices contain two independent J-K
negative-edge-triggered flip-flops. A low level at
the Preset input sets the outputs regardless of the
levels of the other inputs. When Preset PRE is
inactive (high), data at the J and K inputs meeting
the setup time requirements are transferred to the
outputs on the negative-going edge of the clock
pulse. Clock triggering occurs at a voltage level
and is not directly related to the fall time of the
clock pulse. Following the hold time interval, data
at the J and K inputs may be changed without
affecting the levels at the outputs. These versatile
flip-flops can perform as toggle flip-flops by tying
J and K high.
5
17
6
16
7
15
8
14
9 10 11 12 13
2K
NC
2J
NC
2PRE
logic symbol†
4
1PRE
S
5
3
1J
1CLK
FUNCTION TABLE
C1
2
1K
OUTPUTS
1Q
1J
1
1K
6
1Q
10
PRE
CLK
J
K
Q
Q
L
X
X
X
H
L
H
↓
L
L
Q0
Q0
H
↓
H
L
H
L
2CLK
H
↓
L
H
L
H
2K
H
↓
H
H
TOGGLE
H
H
X
X
Q0
3 2 1 20 19
18
NC−No internal connection
The SN54ALS113A is characterized for operation
over the full military temperature range of − 55°C
to 125°C. The SN74ALS113A is characterized for
operation from 0°C to 70°C.
INPUTS
4
1Q
GND
NC
2Q
2Q
1J
NC
1PRE
NC
1Q
2PRE
2J
11
9
2Q
13
Q0
12
8
2Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
Copyright  1986, Texas Instruments Incorporated
5BASIC
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•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
1
SDAS200 − D2661, APRIL 1982 − REVISED MAY 1986
logic diagram (positive logic)
Q
Q
PRE
J
K
CLK
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range: SN54ALS113A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74ALS113A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
recommended operating conditions
SN54ALS113A
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
IOL
fclock
Low-level output current
tw
Pulse duration
High-level input voltage
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
2
th
TA
Hold time, data after CLK↓
2
0
V
−0.4
mA
25
0
20
10
20
16.5
CLK low
20
16.5
Data
25
22
PRE inactive
20
20
0
0
•
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•
V
−0.4
CLK high
−55
V
0.8
PRE low
Operating free-air temperature
UNIT
0.7
4
Clock frequency
Setup time before CLK↓
2
NOM
High-level output current
tsu
SN74ALS113A
MIN
125
0
8
mA
30
mHz
ns
ns
ns
70
°C
SDAS200 − D2661, APRIL 1982 − REVISED MAY 1986
electrical characteristic over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
SN54ALS113A
TYP† MAX
TEST CONDITIONS
MIN
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = − 18 mA
IOH = − 0.4 mA
VOL
VCC = 4.5 V,
VCC = 4.5 V,
IOL = 4 mA
IOL = 8 mA
VCC = 5.5 V,
VI = 7 V
VCC = 5.5 V,
VI = 2.7 V
VCC = 5.5 V,
VI = 0.4 V
J, K, or CLK
II
PRE
IIH
IIL
J, K, or CLK
PRE
J, K, or CLK
PRE
SN74ALS113A
TYP† MAX
MIN
−1.5
VCC −2
−1.5
VCC −2
0.25
0.4
UNIT
V
V
0.25
0.4
0.35
0.5
0.1
0.1
0.2
0.2
20
20
40
40
−0.2
−0.2
−0.4
−0.4
V
mA
µA
mA
IO‡
VCC = 5.5 V,
VO = 2.25 V
−30
−112
−30
−112
mA
ICC
VCC = 5.5 V,
See Note 1
2.5
4.5
2.5
4.5
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with J, K, CLK, and PRE grounded, then with J, K, CLK, and CLR grounded.
switching characteristics (see Note 2)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
PARAMETER
FROM
TO
(INPUT)
(OUTPUT)
RL = 500 Ω,
TA = MIN to MAX
SN54ALS113A SN74ALS113A
MIN
fmax
tPLH
tPHL
tPLH
MAX
25
Q or Q
PRE
CLK
tPHL
NOTE 2: Load circuit and voltage waveforms are shown in Section 1.
Q or Q
•
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•
MIN
UNIT
MAX
30
MHz
3
23
3
14
4
26
4
18
3
22
3
15
5
23
5
19
ns
ns
3
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