SA03 SA03 P r o d uSA03 c t IInnnnoovvaa t i o n FFr roomm Pulse Width Modulation Amplifier FEATURES • WIDE SUPPLY RANGE—16-100V • 30A CONTINUOUS TO 60°C case • 3 PROTECTION CIRCUITS • ANALOG OR DIGITAL INPUTS • SYNCHRONIZED OR EXTERNAL OSCILLATOR • FLEXIBLE FREQUENCY CONTROL SA03 ∆ USA TE9493 11 BeO APPLICATIONS • MOTORS TO 4HP • REACTIVE LOADS • LOW FREQUENCY SONAR • LARGE PIEZO ELEMENTS • OFF-LINE DRIVERS • C-D WELD CONTROLLER 12-pin Power DIP PACKAGE STYLE CR EXTERNAL CONNECTIONS DESCRIPTION ISENSE A The SA03 is a pulse width amplifier that can supply 3000W to the load. An internal 45kHz oscillator requires no external components. The clock input stage divides the oscillator frequency by two, which provides the basic switching of 22.5 kHz. External oscillators may also be used to lower the switching frequency or to synchronize multiple amplifiers. Current sensing is provided for each half of the bridge giving amplitude and direction data. A shutdown input turns off all four drivers of the H bridge output.A high side current limit and the programmable low side current limit protect the amplifier from shorts to supply or ground in addition to load shorts. The H bridge output MOSFETs are protected from thermal overloads by directly sensing the temperature of the die.The 12-pin hermetic MO-127 power package occupies only 3 square inches of board space. BLOCK DIAGRAM AND TYPICAL APPLICATION CLK IN CLK OUT +PWM 1 12 2 11 –PWM/RAMP 4 GND 3 TOP VIEW A OUT * VCC 10 * 9 5 8 6 7 +VS B OUT I SENSE B ILIM/SHDN Case tied to pin 5. Allow no current in case. Bypassing of supplies is required. Package is Apex MO-127 (STD). See Outline Dimensions/Packages in Apex data book. If +PWM > RAMP/–PWM then A OUT > B OUT. * See text. Vcc 10 3 +VS PWM 4 –PWM/RAMP 9 CURRENT LIMIT +PWM 470pF 56K B OUT OUTPUT DRIVERS 8 2 OSC ÷2 1K I SENSE A 12 SHUTDOWN CONTROL CLK IN 6 1 ILIM/SHDN 5 5K .01µF RSENSE 1K 7 GND CONTROL SIGNAL MOTOR 11 A OUT CLK OUT I SENSE B RSENSE 5V 5V SA03U http://www.cirrus.com Copyright © Cirrus Logic, Inc. 2009 (All Rights Reserved) MAY 20091 APEX − SA03UREVH SA03 P r o d u c t I n n o v a t i o nF r o m ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS PARAMETER SUPPLY VOLTAGE, +VS SUPPLY VOLTAGE, VCC POWER DISSIPATION, internal TEMPERATURE, pin solder - 10s TEMPERATURE, junction2 TEMPERATURE, storage OPERATING TEMPERATURE RANGE, case INPUT VOLTAGE, +PWM INPUT VOLTAGE, –PWM INPUT VOLTAGE, ILIM TEST CONDITIONS2 MIN IOUT ≤ 1mA IOUT ≤ 1mA 4.8 0 44 100V 16V 300W 300°C 150°C –65 to +150°C –55 to +125°C 0 to +11V 0 to +11V 0 to +10V TYP MAX UNITS 45 5 4 5.3 .4 46 .9 5.4 V V kHz V V V V .16 23 Ω % kHz A A 100 16 80 50 50 V V mA mA mA 110 100 mV nA .83 +85 °C/W °C/W °C CLOCK (CLK) CLK OUT, high level4 CLK OUT, low level4 FREQUENCY RAMP, center voltage RAMP, P-P voltage CLK IN, low level4 CLK IN, high level4 0 3.7 OUTPUT TOTAL RON EFFICIENCY, 10A output SWITCHING FREQUENCY CURRENT, continuous4 CURRENT, peak4 VS = 100V OSC in ÷ 2 60°C case 22 30 40 97 22.5 POWER SUPPLY VOLTAGE, VS VOLTAGE, VCC CURRENT, VCC CURRENT, VCC, shutdown CURRENT, VS Full temperature range Full temperature range IOUT = 0 165 14 60 15 No Load ILIM/SHUTDOWN TRIP POINT INPUT CURRENT 90 THERMAL3 RESISTANCE, junction to case RESISTANCE, junction to air TEMPERATURE RANGE, case NOTES: 1. 2. 3. 4. 5. CAUTION 2 Full temperature range, for each die Full temperature range Meets full range specifications 12 –25 Each of the two active output transistors can dissipate 150W. Unless otherwise noted: TC = 25°C, VS, VCC at typical specification. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. For guidance, refer to the heatsink data sheet. Guaranteed but not tested. If 100% duty cycle is not required VS(MIN) = 0V. The SA03 is constructed from MOSFET transistors. ESD handling procedures must be observed. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. SA03U SA03 P r o d u c t I n n o v a t i o nF r o m 0 EACH ACTIVE OUTPUT TRANSISTOR 0 50 75 100 25 CASE TEMPERATURE, (C) 98 97 96 REVERSE DIODE CASE TEMPERATURE 1 8 7 6 5 0.8 1.0 1.2 1.4 1.6 0.6 SOURCE TO DRAIN DIODE VOLTAGE DUTY CYCLE, (%) CONTINUOUS AMPS 20 2 –55C 5 –25C 10 15 20 25 OUTPUT CURRENT, (A) 30 60 40 Vcc QUIESCENT CURRENT 115 Vcc = 15V F = 22.5 kHz 110 105 NORMAL OPERATION 100 95 90 SHUTDOWN OPERATION 85 –50 –25 0 25 50 75 100 125 CASE TEMPERATURE, (C) SA03U 0 150 NORMALIZED Vs QUIESCENT CURRENT, (%) 50 75 100 125 CASE TEMPERATURE, (C) 25 50 75 100 125 –50 –25 0 CASE TEMPERATURE, (C) 25C A OUT 16 25 98.0 4 20 18 98.5 125C B OUT 22 99.0 100C 6 80 24 100 99.5 60C DUTY CYCLE VS ANALOG INPUT 26 100.5 85C 100 28 80 8 0 0 CONTINUOUS OUTPUT 101.0 TOTAL VOLTAGE DROP 10 2 101.5 10K 100K 1M CLOCK LOAD RESISTANCE, (Ω) 2 30 NORMALIZED Vcc QUIESCENT CURRENT, (%) F NOMINAL = 45kHz 95 125 10 9 7 6 5 4 3 NORMALIZED FREQUENCY, (%) 50 99 3 180 4 5 6 ANALOG INPUT, (V) 7 Vs QUIESCENT VS VOLTAGE 160 140 120 –55C 100 125C 80 60 40 20 0 20 40 60 Vs, (V) 80 100 NORMALIZED Vcc QUIESCENT CURRENT, (%) 75 102.0 NORMALIZED Vs QUIESCENT CURRENT, (%) 100 3 FLYBACK CURRENT, Isd (A) NORMALIZED FREQUENCY, (%) 125 25 CLOCK FREQUENCY OVER TEMP CLOCK LOADING 100 TOTAL VOLTAGE DROP, (V) INTERNAL POWER DISSIPATION, (W) POWER DERATING 150 Vcc QUIESCENT CURRENT 100 95 90 85 80 75 5 10 15 20 25 SWITCHING FREQUENCY, F (kHz) Vs QUIESCENT VS FREQUENCY 100 Vs = 60V, NO LOAD 90 80 70 60 50 40 5 10 15 20 25 SWITCHING FREQUENCY, F (kHz) 3 SA03 P r o d u c t I n n o v a t i o nF r o m GENERAL Please read Application Note 30 on "PWM Basics". Refer to Application Note 1 "General Operating Considerations" for helpful information regarding power supplies, heat sinking and mounting. Visit www.Cirrus.com for design tools that help automate pwm filter design; heat sink selection; Apex Precision Power’s complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits. CLOCK CIRCUIT AND RAMP GENERATOR The clock frequency is internally set to a frequency of approximately 45kHz. The CLK OUT pin will normally be tied to the CLK IN pin. The clock is divided by two and applied to an RC network which produces a ramp signal at the –PWM/ RAMP pin. An external clock signal can be applied to the CLK IN pin for synchronization purposes. If a clock frequency lower than 45kHz is chosen an external capacitor must be tied to the –PWM/RAMP pin. This capacitor, which parallels an internal capacitor, must be selected so that the ramp oscillates 4 volts p-p with the lower peak 3 volts above ground. PWM INPUTS The full bridge driver may be accessed via the pwm input comparator. When +PWM > -PWM then A OUT > B OUT. A motion control processor which generates the pwm signal can drive these pins with signals referenced to GND. PROTECTION CIRCUITS In addition to the externally programmable current limit there is also a fixed internal current limit which senses only the high side current. It is nominally set to 140% of the continuous rated output current. Should either of the outputs be shorted to ground the high side current limit will latch off the output transistors. Also, the temperature of the output transistors is continually monitored. Should a fault condition occur which raises the temperature of the output transistors to 165°C the thermal protection circuit will activate and also latch off the output transistors. In either case, it will be necessary to remove the fault condition and recycle power to VCC to restart the circuit. CURRENT LIMIT There are two load current sensing pins, I SENSE A and I SENSE B. The two pins can be shorted in the voltage mode connection but both must be used in the current mode connection (see figures A and B). It is recommended that RLIMIT resistors be non-inductive. Load current flows in the I SENSE pins. To avoid errors due to lead lengths connect the I LIMIT/SHDN pin directly to the RLIMIT resistors (through I SENSE A the filter network and shutdown diR LIMIT vider resistor) and I SENSE B connect the RLIMIT 1K SHUTDOWN resistors directly to I LIMIT/SHDN R SIGNAL FILTER the GND pin. Switching noise R SHDN C FILTER spikes will invariably be found at the I FIGURE A. CURRENT LIMIT WITH SENSE pins. The SHUTDOWN VOLTAGE MODE. 4 noise spikes could trip the current limit threshold which is only 100 mV. RFILTER and CFILTER should R LIMIT be adjusted so as to reduce the I SENSE B switching noise well below 100 1K mV to prevent false current limiting. The sum of the DC level plus R LIMIT the noise peak will determine the current limitSHUTDOWN I LIMIT/SHDN R ing value. As in SIGNAL FILTER most switching R SHDN C FILTER circuits it may be difficult to deFIGURE B. CURRENT LIMIT WITH termine the true SHUTDOWN CURRENT MODE. noise amplitude without careful attention to grounding of the oscilloscope probe. Use the shortest possible ground lead for the probe and connect exactly at the GND terminal of the amplifier. Suggested starting values are CFILTER = .01uF, RFILTER = 5k . The required value of RLIMIT in voltage mode may be calculated by: RLIMIT = .1 V / ILIMIT where RLIMIT is the required resistor value, and ILIMIT is the maximum desired current. In current mode the required value of each RLIMIT is 2 times this value since the sense voltage is divided down by 2 (see Figure B). If RSHDN is used it will further divide down the sense voltage. The shutdown divider network will also have an effect on the filtering circuit. I SENSE A 1K BYPASSING Adequate bypassing of the power supplies is required for proper operation. Failure to do so can cause erratic and low efficiency operation as well as excessive ringing at the outputs. The Vs supply should be bypassed with at least a 1µF ceramic capacitor in parallel with another low ESR capacitor of at least 10µF per amp of output current. Capacitor types rated for switching applications are the only types that should be considered. The bypass capacitors must be physically connected directly to the power supply pins. Even one inch of lead length will cause excessive ringing at the outputs. This is due to the very fast switching times and the inductance of the lead connection. The bypassing requirements of the Vcc supply are less stringent, but still necessary. A .1µF to .47µF ceramic capacitor connected directly to the Vcc pin will suffice. STARTUP CONDITIONS The high side of the all N channel output bridge circuit is driven by bootstrap circuit and charge pump arrangement. In order for the circuit to produce a 100% duty cycle indefinitely the low side of each half bridge circuit must have previously been in the ON condition. This means, in turn, that if the input signal to the SA03 at startup is demanding a 100% duty cycle, the output may not follow the command and may be in a tristate condition. The ramp signal must cross the input signal at some point to correctly determine the output state. After the ramp crosses the input signal level one time, the output state will be correct thereafter. SA03U P r o d u c t I n n o v a t i o nF r o m SA03 Contacting Cirrus Logic Support For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact [email protected]. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. 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