MURATA-PS ADSD-1402S-EX

®
®
ADSD-1402
Dual, 14-Bit, 2MSPS
Sampling A/D Converter
FEATURES
•
•
•
•
•
•
•
•
•
14-bit resolution; 2MSPS sampling rate
Functionally complete; ±5V input range
No missing codes over full temperature range
Edge-triggered; No pipeline delays
±5V supplies, 0.725 Watts
Small, 40-pin, side-brazed, ceramic TDIP
79dB SNR, –80dB THD
Ideal for both time and frequency domain applications
Out-of-range indicator
INPUT/OUTPUT CONNECTIONS
GENERAL DESCRIPTION
DATEL's ADSD-1402 is a functionally complete, dual 14-bit,
2MSPS, sampling A/D converter. Its standard, 40-pin, triplewide ceramic DIP contains two fast-settling sample/hold
amplifiers, two 14-bit A/D converters, multiplexed output
buffers, a precision reference, and all the timing and control
logic necessary to operate from either two or a single start
convert pulse.
The ADSD-1402 is optimized for wideband frequencydomain applications and is fully FFT tested. The ADSD-1402
requires only ±5V supplies and typically consumes 0.725
Watts. Models are available in either commercial
0 to +70°C or military -55 to +125°C operating temperature ranges.
O F F S E T A D J U S T A
A N A L O G
PIN
FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
INPUT A
+5VA
ANALOG GROUND
GAIN A
OFFSET A
RANGE
2.5V REF
ANALOG GROUND
–5V
ENABLE A
START A
+5VD
BIT 14 (LSB)
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
DGND
PIN
FUNCTION
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
INPUT B
+5VA
ANALOG GROUND
GAIN B
OFFSET B
N/C
N/C
ANALOG GROUND
–5V
ENABLE B
START B
EOC
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
DGND
5
IN P U T A
A D C
1
–
1
S /H 1
8 0 0
+
2 8
A M P
O F F S E T A D J U S T B 3 6
A N A L O G
IN P U T B
–
4 0
8 0 0
+
A D C
2
S /H 2
A M P
B U F F E R
R E F
B 1 (M S B )
2 7
B 2
2 6
B 3
2 5
B 4
2 4
B 5
2 3
B 6
2 2
B 7
1 9
B 8
1 8
B 9
1 7
B 1 0
1 6
B 1 1
1 5
B 1 2
1 4
B 1 3
1 3
B 1 4
B U F F E R
R A N G E
6
E N A B L E B
3 1
E N A B L E A 1 0
S T A R T C O N A
1 1
S T A R T C O N B
3 0
T IM IN G A N D
C O N T R O L L O G IC
E O C 2 9
1 2
+ 5 V D
9 , 3 2
– 5 V
2 , 3 9
+ 5 V A
3 , 8 , 3 3 , 3 8 ,
A G N D
2 0 , 2 1
D G N D
3 4 , 3 5
N /C
Figure 1. ADSD-1402 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance: (800) 233-2765
®
®
ADSD-1402
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+5V Supply (Pins 2, 12, 39)
–5V Supply (Pins 9, 32)
Digital Inputs (Pins 3, 10, 11, 31)
Analog Input (Pins 1, 40)
Lead Temp. (10 seconds)
LIMITS
UNITS
0 to +6
0 to –6
–0.3 to +VDD +0.3
±7
+300
Volts
Volts
Volts
Volts
°C
DYNAMIC PERFORMANCE
Total Harm. Distort. (–0.5dB)
dc to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB
dc to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio
(and distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
Spurious Free Dyn. Range ➀
dc to 500kHz
500kHz to 1MHz
Two-tone IMD
Distortion (fin = 975kHz,
fs = 2.0Mhz, –0.5dB)
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Slew Rate
Aperture Delay Time
Aperature Uncertainty
S/H Acq. Time, (to ±0.003%FSR)
Step input
Conversion Rate
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, +VDD = +5V, Vee = –5V, 2MSPS sampling rate,Vin = ±5V and a
minimum 7 minute warmup unless otherwise specified.)
ANALOG INPUTS
MIN.
TYP.
MAX. UNITS
Input Voltage Range
Input Impedence
Input Capacitance
—
—
—
±5V
800
7
—
—
15
Volts
Ω
pF
+2.0
—
—
—
—
—
—
—
—
+0.8
+5
–600
Volts
Volts
µA
µA
DIGITAL INPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
PERFORMANCE
Integral Non-Linearity
+25°C(fin=10kHz)
0 to +70°C
–55 to +125°C
Differential Non-Linearity
(fin = 10kHz)
+25°C
0 to +70°C
–55 to +125°C
Offset Error
+25°C (see Figure 3)
0 to +70°C
–55 to +125°C
Gain Error
+25°C (see Figure 3)
0 to +70°C
–55 to +125°C
No Missing Codes (fin = 975kHz)
14 Bits
Resolution
—
—
—
±1
±1
±2
—
—
—
Feedthrough Rejection
(fin = 1MHz)
Noise
LSB
LSB
LSB
–0.99
–0.99
–0.99
±0.5
±0.5
±0.75
+1.75
+1.75
+1.75
LSB
LSB
LSB
—
—
—
±0.25
±0.25
±0.5
±0.5
±0.5
±0.8
%FSR
%FSR
%FSR
—
—
—
±0.3
±0.3
±0.6
±0.6
±0.6
±0.8
%FSR
%FSR
%FSR
Power Supply Ranges
–5V Supply
+5V Supply
Power Supply Currents
–5V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
Oper. Temp. Range, Ambient
ADSD-1402MC
ADSD-1402MM
Storage Temperature Range
Package Type
Offset Bin.
—
—
—
—
—
+0.4
–160
+6.4
Volts
Volts
µA
mA
+2.45
+2.45
—
+2.5
+2.5
—
+2.55
+2.55
5
Volts
Volts
mA
MAX.
UNITS
—
—
–79
–73
–72
–70
dB
dB
75
75
79
78
—
—
dB
dB
71
69
76
73
—
—
dB
dB
—
—
–85
–74
–70
–70
dB
dB
–76
—
—
dB
—
—
—
—
—
16
12
±250
—
—
—
—
—
±10
5
MHz
MHz
V/µs
ns
ps
—
100
150
ns
2
—
—
MHz
—
—
85
250
—
—
dB
µVrms
–5.25
+4.75
–5
+5.0
–4.75
+5.25
Volts
Volts
–80
—
—
—
–70
+50
0.6
—
—
+70
0.725
±0.01
mA
mA
Watts
%FSR%V
PHYSICAL/ENVIRONMENTAL
–55 to +125°C
14 Bits
+2.4
—
—
—
TYP.
POWER REQUIREMENTS
OUTPUTS
Output Coding
Logic Level
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Internal Reference
Voltage, +25°C
0 to +70°C
External Current
MIN.
Footnote:
➀ Same specification as In-Band Harmonics and Peak Harmonics.
2
0
—
+70
–55
—
+125
–65
—
+150
40-pin, metal-sealed, ceramic
°C
°C
°C
TDIP
®
®
ADSD-1402
TECHNICAL NOTES
3. Full-Scale (Gain) Adjustments
1. Rated performance requires using good high-frequency
circuit board layout techniques. Connect the digital and
analog grounds to one point, the analog ground plane beneath
the converter. Due to the inductance and resistance of the
power supply return paths, return the analog and digital
ground separately to the power supplies.
Set the output of the voltage reference used in step 2 to
the value shown in Table 2.
Table 2. Offset and Gain Adjustments
Input
Range
CALIBRATION PROCEDURE
1. Connect the converter per Figure 3. Apply a pulse of 100
nanoseconds minimum to START CONVERT (pin 11) at a
rate of 200kHz. This rate is chosen to reduce flicker if LED's
are used on the outputs for calibration purposes.
Offset Adjust
+1/2 LSB
±5V
2. Zero (Offset) Adjustments
+0.000305V
4. Repeat above steps for Analog Input B (Pin 40). Use trimpot
R3 for the zero (Offset) adjustment and trimpot R4 for the
Full-Scale (Gain) adjustment.
5. To confirm proper operation of the device, vary the precision
reference voltage source to obtain the output coding listed in
Table 3.
25 nSec. per division
N
N+1
START
CONVERT
400 nSec.
100 nSec.
325 nSec.
175 nSec.
DATA OUT
DATA N VALID
ENABLE A
75 nSec.
ENABLE B
75 nSec.
Data N B
Data N A
DATA
A or B OUT
HIGH Z
HIGH Z
HIGH Z
Figure 2. ADSD-1402 Timing Diagram
Table 3. Output Coding
OUTPUT CODING
MSB
LSB
11
11
11
10
01
00
00
00
1111
1000
0000
0000
0000
1000
0000
0000
1111 1111
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0001
0000 0000
+4.999085V
Adjust the gain trimpot R1 until the output code flickers
equally between 11 1111 1111 1110 and 11 1111 1111 1111
Apply a precision voltage reference source between ANALOG INPUT A (pin 1) and SIGNAL GROUND (pin 3), then
adjust the reference source output per Table 2. Adjust trimpot
R2 until the code flickers equally between 10 0000 0000 0000
and 10 0000 0000 0001.
EOC
Gain Adjust
FS – 1½ LSB
INPUT RANGE
±5V
BIPOLAR
SCALE
+4.999390
+4.250000
+2.500000
±0.000000
–2.500000
–4.250000
–4.999390
–5.000000
+FS – 1LSB
+3/4FS
+1/2FS
0
–1/2FS
–3/4FS
–FS+1LSB
–FS
3
®
ADSD-1402
– 5 V
+ 5 V
.1 u F
.1 u F
1 0 u F
1 0 u F
In p u t A
2 , 1 2 , 3 9
9 , 3 2
7 2 .5 V R E F .
0 .1 µ F
6 R a n g e
1 0 u F
R 1
R 2
R 3
R 4
+ 5 V
+
In p u t B
N /C
3 4 , 3 5
E O C
2 9
2 8
B IT 1 (M S B )
2 7
B IT 2
2 6
B IT 3
1 In A
2 5
B IT 4
4 0 In B
2 4
2 3
B IT 5
B IT 6
2 2
B IT 7
1 9
B IT
B IT
B IT
B IT
B IT
B IT
B IT
3 , 8 , 2 0 , 2 1 , 3 3 , 3 8 G N D
4
1 0 K
G a in A
1 8
5 O ffs e t A
1 0 K
A D S D -1 4 0 2
3 6 O ffs e t B
1 0 K
1 7
1 6
1 5
1 4
3 7 G a in B
1 0 K
– 5 V
1 3
8
9
1 0
1 1
1 2
1 3
1 4 (L S B )
1 1 S ta rt A
3 0 S ta rt B
S W 2
E n a b le B
E n a b le A
+ 5 V
3 1
1 0
S W 1
+ 5 V
See timing diagram for details.
Notes:
➀ Recommended to use same supply source for +5 Analog and +5 Digital. Try using as clean of a supply as possible (Bypass caps., 10uF and .1uF).
➁ Outputs are enabled by either turning ENABLE A (Pin 10) or ENABLE B
(Pin 31) low for prespective analog inputs A or B. A high on ENABLE A or ENABLE B results in disabling the output bus (High Z).
Figure 3. ADSD-1402 Connection Diagram
THERMAL REQUIREMENTS
conduct heat away from the package. Electrically-insulating,
thermally-conductive "pads" may be installed underneath the
package. Devices should be soldered to boards rather than
"socketed", and of course, minimal air flow over the surface can
greatly help reduce the package temperature.
The ADSD-1402 sampling A/D converter is fully characterized
and specified over the commercial operating temperature
(ambient) range of 0 to +70°C (MC suffix) and military
temperature range of –55 to +125°C (MM suffix). All roomtemperature (TA = +25°C) production testing is performed
without the use of heat sinks or forced-air cooling. Thermal
impedance figures for each device are listed in their
respective specification tables.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number.
Request DATEL Application Note AN-8, "Heat Sinks for DIP
Data Converters", or contact DATEL directly, for additional
information.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should be
used to ensure devices do not overheat. The ground and power
planes beneath the package, as well as all pcb signal runs to
and from the device, should be as heavy as possible to help
4
®
®
®
ADSD-1402
MECHANICAL DIMENSIONS INCHES (mm)
2.12/2.07
(53.85/52.58)
40
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
21
Lead Material: Kovar alloy
1.11/1.08
(28.20/27.43)
1
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
20
0.100 TYP.
(2.540)
1.900 ±0.008
(48.260)
0.245 MAX.
(6.223)
PIN 1 INDEX
( ON TOP)
0.200/0.175
(5.080/4.445)
0.015/0.009
(0.381/0.229)
0.210 MAX.
(5.334)
0.018 ±0.002
(0.457)
0.110/0.090
(2.794/2.286)
0.045/0.035
(1.143/0.889)
0.900 ±0.010
(22.86)
0.110/0.090
(2.794/2.286
SEATING
PLANE
0.035/0.015
(0.889/0.381)
ORDERING INFORMATION
MODEL NUMBER
OPERATING TEMP. RANGE
ADSD-1402MC
0 to +70°C
ADSD-1402MM
–55 to +125°C
ACCESSORIES
HS-40
Heat Sink for all ADSD-1402 models
Contact DATEL for high-reliability versions
®
®
ISO 9001
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151
Tel: (508) 339-3000 / Fax: (508) 339-6356
For immediate assistance: (800) 233-2765
Internet: www.datel.com
DS-0520C 11/03
DATEL (UK) LTD. Tadley, England Tel: (01256)-880444
DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01
DATEL GmbH Munchen, Germany Tel: 89-544334-0
DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025
DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting
of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.