PS4051/PS4052/PS4053 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 17V CMOS Analog Multiplexers/Switches Features Description • Low On-resistance: 60Ω typ, with ±5V Supplies, Minimizes Distortion • On-Resistance Matching between channels better than 6Ω • Guaranteed Low Leakage Currents: <0.1nA at +25oC • Rail-to-Rail Analog Signal Range • Low Distortion: <0.04% (600Ω) • Low Crosstalk: 90dB @100kHz • TTL/CMOS Compatible (with +5V or ±5V Supplies) • Low Power Consumption. • 16-pin Narrow SOIC and QSOP Packages save board area • Pin-compatible upgrades for 74HC4051/4052/4053 The PS4051/PS4052/PS4053 are precision low-voltage CMOS analog multiplexers/switches. The PS4051 is an eight-channel single-ended mux designed to select one of eight inputs to a common output. What input is selected depends on the status of three address bits (ADDA-ADDC). The PS4052 is a differential four-channel mux, controlled by two address bits: ADDA, and ADDB. The PS4053 is a triple 2-to-1 mux (or triple SPDT, single-pole double-throw, switch). The INH (inhibit) pin can be driven high, to open all switches regardless of address bit status. All control inputs are TTL compatible when V+ = +5V. Applications These devices are designed to operate with power supplies from ±2.7V to ±8V. Single-supply operation is possible from +2.7V to +16V. • Audio and Video Switching and Routing • Lab and Medical Instrumentation • Low-Voltage Data-Acquisition and Process Control Systems • Battery-Powered Communication Systems When on, each switch conducts current equally well in either direction and can handle rail-to-rail analog signals. In the off -state each switch blocks voltages up to the power-supply rails. Off-leakage current is guaranteed to be less than 0.1nA at +25oC, and < 2.5nA at +85oC. These devices are available in 16-pin DIP, Narrow SOIC, and QSOP packages for operation over the 40oC to +85oC temperature range. Functional Block Diagrams and Pin Configurations Top Views PS4051 PS4052 PS4053 NO1 1 16 V+ NO0B 1 16 V+ N0B 1 16 V+ NO3 2 15 NO2 NO1B 2 15 NO1A NCB 2 15 COMB COM 3 14 NO4 COMB 3 14 NO2A NOA 3 14 COMC NO7 4 13 NO0 NO3B 4 13 COMA COMA 4 13 NOC NO5 5 12 NO6 NO2B 5 12 NO0A NCA 5 12 NCC INH 6 11 ADDC INH 6 11 NO3A INH 6 10 ADDB V- 7 10 ADDB V- 7 10 ADDB 9 ADDA GND 8 9 ADDA GND 8 9 ADDA V- 7 GND 8 LOGIC LOGIC LOGIC 11 ADDC For free samples and the latest literature: www.pericom.com, or phone 1-800-435-2336 1 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Truth Tables PS4051 PS4053 IN H AD D C AD D B AD D A On Switch INH ADD C ADD B ADD A On Switche s 1 X X X N one 1 X X X None 0 0 0 0 NO0 0 0 0 0 NOC NOB NOA 0 0 0 1 NO1 0 0 0 1 NOC NOB N CA 0 0 1 0 NO2 0 0 1 0 NOC N CB NOA 0 0 1 1 NO3 0 0 1 1 NOC N CB N CA 0 1 0 0 NO4 0 1 0 0 NCC NOB NOA 0 1 0 1 NO5 0 1 0 1 NCC NOB N CA 0 1 1 0 NO6 0 1 1 0 NCC N CB NOA 0 1 1 1 NO7 0 1 1 1 NCC N CB N CA Logic 0, VAL ≤ 0.8V Logic 1, VIH ≥ 2.4V PS4052 INH AD D B AD D A On Switch 1 X X None 0 0 0 NO 0A,B 0 0 1 NO 1A,B 0 1 0 NO 2A,B 0 1 1 NO 3A,B Absolute Maximum Ratings Thermal Information Voltages Referenced to V Continuous Power Dissipation V+ ..................................................................... 0.3V to + 17V Plastic DIP (derate 10.5mW/°C above +70°C) .............. 800mW GND ................................................................. 0.3V to + 17V Narrow SO and QSOP GND ......................................................... -0.3V to (V+) + 0.3V (derate 8.7mW/°C above +70°C) .................................... 650mW VIN, VCOM, VNO(1) .......................................... (V-) 2V to (V+) + 2V Storage Temperature ........................................ -65°C to +150°C or 30mA, whichever occurs first Lead Temperature (soldering, 10s) ................................. +300°C Current (any terminal ) ..................................................... 30mA Peak Current, COM, NO, NC Note 1: (pulsed at 1ms, 10% duty cycle) ..................................... 100mA Signals on NO, COM, or logic inputs exceeding V+ or V are clamped by internal diodes. Limit forward diode current to 30mA. ESD per method 3015.7 ............................................... >2000V Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. 2 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Specifications - Dual Supplies (V± = ± 5V ±10%, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Symbol Conditions Te mp.(°C) M in(2) Full V Typ(1) M ax(2) Units V+ V Analog Switch Analog Signal Range (3) VAN ALO G O n Resistance RO N O n- Resistance Match Between Channels(4) O n- Resistance Flatness(5) NO O ff Leakage Current(6) CO M- O ff Leakage Current(6) ∆RO N VC O M or VN C = ±3V, IN O = 1mA, V+ = 5V, V = 5V RFLAT (O N ) V+ = 5V, V = 5V, IN O = 1mA, VC O M = ±3V, 0V IN O (O F F ) IC O M (O F F ) 25 V+ = 5V, V = 5V, VC O M = ±3V, IN O = 1mA V+ = 5.5V, V = 5.5V, VC O M = ±4.5V, VN O = +4.5V V+ = 5.5V, V = 5.5V, VC O M = ± 4.5V, VN O = +4.5V PS4051 PS4052 PS4053 PS4051 CO M O n Leakage Current(7) IC O M (O N ) VC O M = +4.5V PS4052 PS4053 60 100 Full 125 25 12 Full 18 25 10 Full 15 25 0.1 50 Full 1.0 100 25 0.1 50 Full 2.5 100 25 0.1 50 Full 1.5 100 25 0.1 50 Full 5 100 25 0.1 50 Full 2.5 100 Ω nA Logic Input Logic High Input Voltage VAH , VIH Logic Low Input Voltage VAL , VIL Input Current with Input Voltage High or Low 2.4 V IIH , IIL 0.8 Full VA = VI = V+, 0V - 0.1 3 µA 0.1 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Specifications - Dual Supplies (continued) (V± = ±5V ±10%, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Symbol Conditions Te mp (°C) M in(1) Typ(2) M ax(1) Units Dynamic Transition Time tTRAN S Figure 1 Break- Before- Make TimeDelay tO PEN Figure 3 Turn- OnTime tO N Figure 2 Turn- Off Time tO FF Figure 2 Charge Injection(3) Off Isolation(7) Crosstalk Logic Input Capacitance NO Off Capacitance COM Off Capacitance CO M O n Capacitance Q 75 25 Full 40 Full XTALK 2 10 pC 90 92 8 25 f =1MHz, VN O = 0V CC O M (O N ) f =1MHz, VC O M = 0V 150 dB f =1MHz CC O M (O FF) f =1MHz, VC O M =0V ns 200 CL= 1nF, VS = 0V, RS = 0Ω, CL = 15pF, RL = 50Ω, f = 100kHz, Figure 6, VN O = 1VRM S 175 225 25 CL = 15pF, VIN H = 5V, RL = 50Ω, f = 100kHz,VN O = 1VRM S C N O (O F F ) 10 50 OIRR C IN 2 250 2 PS4051 2 PS4052 PS4053 2 PS4051 8 PS4052 PS4053 8 pF Supply Power- Supply Range ±2.7 Positive Supply Current I+ Negative Supply Current I VIN H = VA = 0V or V+, V+ =5.5V, V = 5.5V ±8 V 10 Full µA 10 Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RΟΝ = RΟΝ max - RΟΝ min 5. Flatness is defined as the difference between the maximum and minimum values of on-resistance measured over the specific analog signal range, i.e., VNO = 3V to 0 and 0V to –3V. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Off Isolation = 20log10 VCOM / VNO. See Figure 5. 4 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Characteristics - Single 5V Supply (V+ = +5V ±10%, V– = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Symbol Conditions Te mp (°C) M in(1) Typ(2) M ax(1) Units Switch Analog Signal Range(3) On Resistance NO- Off Leakage Current(8) COM- Off Leakage Current(8) COM- On Leakage Current(8) VAN ALO G RO N IN O (O FF) IC O M (O FF) IC O M (O N ) Full IN O = 1mA, VC O M = 3.5V, V+ = 4.5V 0 25 125 Full VN O = 0V, VC O M = 4.5V, V+ = 5.5V V+ = 5.5V, VC O M = 4.5V, VN O =0V, or VC O M = 0V, VN O = 4.5V PS4051 PS4052 PS4053 PS4051 VC O M = VN O = 4.5V, V+ = 5.5V PS4052 PS4053 V+ V 225 Ω 280 25 0.1 50 Full 10 100 25 1 50 Full 10 100 25 1 50 Full 5 100 25 1 50 Full 10 100 25 1 50 Full 10 100 nΑ Digital Logic Input Logic High Input Voltage VAH , VIH Logic Low Input Voltage VAL , VIL Input Current with Input Voltage High or Low IIH , IIL 2.4 Full VA= VI = V +, 0V V 0.8 1 1 1.0 1.0 µA Supply Positive- Supply Current I+ 25 VA = VI = 0V or V+ Full 5 µA 10 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Electrical Characteristics - Single 5V(continued) (V+ = +5V ±10%, V– = 0V, GND = 0V, VAH = VIH = 2.4V, VAL = VIL = 0.8V) Parame te r Symbol Conditions Te mp (°C) M in(1) Typ(2) M ax(1) 90 200 Units Dynamic Turn- OnTime tON Turn- Off Time tOFF Break- Before- Make Interval tOPEN Charge Injection(3) Q 25 Full 275 25 60 Full 125 ns 175 30 25 CL = 1nF, VS = 0V, RS = 0Ω 1.5 5 pC Typ(2) M ax(1) Units V+ V Electrical Characteristics - Single 3V Supply (V+ = +3.3V ±10%, V– = 0V, GND = 0V, VAH = VIH = +2.4V, VAL = VILL = +0.8V) Parame te r Symbol Conditions Te mp (°C) M in(1) Full 0 Switch Analog Signal Range(3) VANALOG RON INO = 1mA, VCOM = 1.5V, V+ = 3V tTRANS Figure 1, VIN = 2.4V VNO1 = 1.5V, VNO8 = 0V Turn- O nTime(3) tON Figure 2, VINH = 2.4V VINL = 0V, VNO1 = 1.5V Turn- O ff Time(3) tOFF Figure 2, VINH = 2.4V VINL = 0V, VNO1 = 1.5V O n- Resistance 25 250 Full 525 Ω 700 D ynamic Transition Time(3) Charge Injection (3) Q CL = 10nF, VS = 0V, RS = 0Ω 25 230 575 200 500 75 400 1 5 ns pC Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RΟΝ = RΟΝ max - RΟΝ min 5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC. 7. Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log VCOM/VNO, VCOM = output, VNO = input to off switch 8. Leakage testing at single supply is guaranteed by testing with dual supplies. 6 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Test Circuits/Timing Diagrams V+ Logic Input V+ ADDC NO0 50W VNO0 NO1-NO6 PS4051 NO7 INH Switch Output V- V300W 90% 0V VOUT VOUT COM GND 90% VNO7 35pF ttrans ON V- ttrans V+ V+ V+ ADDB tf <20ns 50% 0V V+ ADDB ADDA tr <20ns V+ NO0 V+ ADD V+ NO V- NC V+ ADDA 50W 50W NO1-NO2 PS4052 INH NO3 INH VOUT COM GND PS4053 V- V- 35pF 300W VOUT COM GND V- 35pF 300W V- V- Figure 1. Transition Time V+ Logic Input V+ INH NO0 50W V+ PS4051 PS4052 tOFF 90% Switch Output VOUT COM GND tf <20ns 50% 0V tON NOX ADDX tr <20ns V+ VOUT V300W 10% 35pF 0V V+5V Logic Input V+ INH NO 50W V+ tr <20ns V+ tf <20ns 50% 0V tON 0V ADD PS4053 NC COM GND V- 300W tOFF 10% VSwitch Output VOUT VOUT 35pF V- 90% V- Figure 2. Switching Times 7 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Figure 3. Break-Before-Make Interval Figure 4. Charge Injection V+ V+ NO0 VIN NO1 R = 1kW ~ W RG = 50 10nF 50W NO7 PS4051 PS4052 COM VOUT RL = 50W ADD V- INH GND 10nF VCROSSTALK = 20log Figure 5. Off Isolation VOUT VIN Figure 6. Crosstalk 8 PS8461 02/16/00 PS4051/PS4052/PS4053 17V CMOS Analog Multiplexers/Switches 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Figure 8. NO/COM Capacitance Ordering Information Part Numbe r Te mpe rature Package Part Numbe r Te mpe rature Package PS4051CPE 0ºC to +70ºC PDIP- 16 PS4052EPE 40ºC to +85ºC PDIP- 16 PS4051CSE 0ºC to +70ºC Narrow SOIC- 16 PS4052ESE 40ºC to +85ºC Narrow SOIC- 16 PS4051CEE 0ºC to +70ºC QSOP- 16 PS4052EEE 40ºC to +85ºC QSOP- 16 PS4051EPE 40ºC to +85ºC PDIP- 16 PS4053CPE 0ºC to +70ºC PDIP- 16 PS4051ESE 40ºC to +85ºC Narrow SOIC- 16 PS4053CSE 0ºC to +70ºC Narrow SOIC- 16 PS4051EEE 40ºC to +85ºC QSOP- 16 PS4053CEE 0ºC to +70ºC QSOP- 16 PS4052CPE 0ºC to +70ºC PDIP- 16 PS4053EPE 40ºC to +85ºC PDIP- 16 PS4052CSE 0ºC to +70ºC Narrow SOIC- 16 PS4053ESE 40ºC to +85ºC Narrow SOIC- 16 PS4052CEE 0ºC to +70ºC QSOP- 16 PS4053EEE 40ºC to +85ºC QSOP- 16 Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 9 PS8461 02/16/00