TI LP2960

LP2960
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SNVS112C – APRIL 1999 – REVISED APRIL 2013
LP2960 Adjustable Micropower 0.5A Low-Dropout Regulators
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FEATURES
DESCRIPTION
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The LP2960 is a micropower voltage regulator with
very low dropout voltage (12 mV typical at 1 mA load
and 470 mV typical at 500 mA load) and very low
quiescent current (450 μA typical at 1 mA load).
1
2
Output Voltage Adjusts from 1.23V–29V
Ensured 500 mA Output Current
5V and 3.3V Versions Available
16-Pin SO Package
Low Dropout Voltage
Low Quiescent Current
Tight Line and Load Regulation
Low Temperature Coefficient
Current Limiting and Thermal Protection
Logic-Level Shutdown
Can be Wired for Snap-ON and Snap-OFF
Reverse Battery Protection
APPLICATIONS
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High-Efficiency Linear Regulator
Regulator with Under-Voltage Shutdown
Low Dropout Battery-Powered Regulator
Cellular Telephones
The LP2960 is ideally suited for battery-powered
systems: the quiescent current increases only slightly
at dropout, which prolongs battery life.
The LP2960 retains all the desirable characteristics of
the LP2953, and offers increased output current.
The error flag goes low any time the output drops
more than 5% out of regulation.
Reverse battery protection is provided.
The LP2960 requires only 10 μF
capacitance for stability (5V version).
of
output
The internal voltage reference is made available for
external use, providing a low-T.C. reference with very
good regulation characteristics.
The part is available in a 16-pin surface mount
(SOIC) package.
Block Diagram
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
LP2960
SNVS112C – APRIL 1999 – REVISED APRIL 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
−65°C to +150°C
Storage Temperature Range
Operating Junction Temperature Range
−40°C to +125°C
LP2960AI/LP2960I
Lead Temperature (Soldering, 5 sec.)
Power Dissipation
260°C
(2)
Internally Limited
−20V to +30V
Input Supply Voltage
Feedback Input Voltage (3)
Comparator Input Voltage
−0.3V to +5V
(4)
−0.3V to +30V
Comparator Output Voltage (4)
−0.3V to +30V
ESD Rating (5)
(1)
(2)
(3)
(4)
(5)
1.5 kV
Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device outside of its rated operating conditions.
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ (max), the junction-to-ambient thermal
resistance, θJ−A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated
using:
Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator
will go into thermal shutdown. See Application Hints for additional information on heatsinking and thermal resistance.
When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped
to ground.
May exceed the input supply voltage.
Human Body Model, 200 pF discharged through 1.5 kΩ.
Electrical Characteristics
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: CIN = 4.7 μF, VIN = VO(NOM) + 1V, IL = 1 mA, COUT = 10 μF for 5V parts or COUT = 22 μF for 3.3V
parts, Feedback pin is tied to VTAP pin, Output pin is tied to Sense pin, VS/D = 2V.
Symbol
VO
(1)
(2)
(3)
2
Parameter
Conditions
Typ
LP2960AI (1)
LP2960I (1)
Min
Max
Min
Max
Units
Output Voltage
(5V Versions)
1 mA ≤ IL ≤ 500 mA
5.0
4.962
4.930
5.038
5.070
4.925
4.880
5.075
5.120
Output Voltage
(3.3 Versions)
1 mA ≤ IL ≤ 500 mA
3.3
3.275
3.254
3.325
3.346
3.250
3.221
3.350
3.379
Output Voltage
Temperature Coefficient
See (2)
20
130
160
ppm/°C
Output Voltage
Line Regulation
VIN = [VO(NOM) + 1V] to 30V
0.06
0.2
0.5
0.4
0.8
%
Output Voltage
Load Regulation
See (3)
0.08
0.16
0.30
0.20
0.40
%
V
All room temperature limits are 100% production tested. All limits at temperature extremes are ensured via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level.
Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.
Output voltage load regulation is measured at constant junction temperature using low duty cycle pulse testing. Two separate tests are
performed, one for the load current range of 100 μA to 1 mA and one for the 1 mA to 500 mA range. Changes in output voltage due to
heating effects are covered by the thermal regulation specification.
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Electrical Characteristics (continued)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: CIN = 4.7 μF, VIN = VO(NOM) + 1V, IL = 1 mA, COUT = 10 μF for 5V parts or COUT = 22 μF for 3.3V
parts, Feedback pin is tied to VTAP pin, Output pin is tied to Sense pin, VS/D = 2V.
Symbol
Parameter
Conditions
VIN − VO
IB(FB)
(4)
(5)
(6)
(7)
(8)
(9)
Min
Units
Max
30
50
IL = 100 mA
180
250
350
250
350
IL = 200 mA
260
350
450
350
450
IL = 500 mA
470
600
800
600
800
IL = 1 mA
450
600
750
600
750
IL = 100 mA
2.6
4.0
5.0
4.0
5.0
IL = 200 mA
2.5
8
10
8
10
IL = 500 mA
21
35
40
35
40
Ground Pin Current at
Dropout (5)
VIN = VO(NOM) − 0.5V
IL = 100 μA
1.8
3
5
3
5
mA
Ground Pin Current at
Shutdown (5)
VSD ≤ 1.1V
300
400
400
μA
Current Limit
RL = 0.5Ω
1000
1500
1600
1500
1600
mA
Thermal Regulation
See (6)
0.05
0.2
0.2
%/W
COUT = 10 μF
300
COUT = 47 μF
210
COUT = 47 μF (7)
130
(4)
(5)
Output Noise Voltage
@ IL = 100 mA
(10 Hz–100kHz)
VREF
Max
30
50
Ground Pin Current
en
Min
LP2960I (1)
12
IGND
ILIMIT
LP2960AI (1)
IL = 1 mA
Dropout Voltage
IGND
Typ
Reference Voltage
1.235
mV
μA
mA
μV
RMS
1.220
1.210
1.250
1.265
1.210
1.195
1.260
1.275
V
Reference Voltage
Line Regulation
See (8)
0.05
0.1
0.30
0.2
0.4
%
Reference Voltage
Load Regulation
IREF = 0–200 μA
0.45
0.6
0.9
1.2
1.5
%
Reference Voltage
Temperature Coefficient
See (9)
Feedback Pin Bias
Current
20
−20
ppm/°C
−50
−70
−50
−70
nA
Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a
1V differential. At very low values of programmed output voltage, the input voltage minimum of 2V (2.3V over temperature) must be
observed.
Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the ground pin current,
output load current, and current through the external resistive divider (if used).
Thermal regulation is the change in output voltage at a time T after a change in power dissipation, excluding load or line regulation
effects. Specifications are for a 400 mA load pulse at VIN = VO(NOM) + 15V (6W pulse) for T = 10 ms.
Connect a 0.1 μF capacitor from the output to the feedback pin.
Two separate tests are performed for reference voltage line regulation, one covering 2.5V ≤ VIN ≤ VO(NOM) + 1V and the other test for
VO(NOM) + 1V ≤ VIN ≤ 30V.
Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.
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Electrical Characteristics (continued)
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: CIN = 4.7 μF, VIN = VO(NOM) + 1V, IL = 1 mA, COUT = 10 μF for 5V parts or COUT = 22 μF for 3.3V
parts, Feedback pin is tied to VTAP pin, Output pin is tied to Sense pin, VS/D = 2V.
Symbol
Parameter
Conditions
Typ
LP2960AI (1)
Min
Max
LP2960I (1)
Min
Max
Units
DROPOUT DETECTION COMPARATOR
IOH
Output HIGH Leakage
VOH = 30V
0.01
1
2
1
2
μA
VOL
Output LOW Voltage
VIN = VO(NOM) − 1V
IO(COMP) = 400 μA
125
250
400
250
400
mV
VTHR(max)
Upper Threshold Voltage
See (10)
−60
−80
−100
−35
−25
−80
−100
−35
−25
mV
VTHR(min)
Lower Threshold Voltage
See (10)
−85
−130
−200
−70
−35
−130
−200
−70
−35
mV
HYST
Hysteresis
See (10)
25
mV
SHUTDOWN INPUT
VOS
Input Offset Voltage
(Referred to VREF)
±5
HYST
Hysteresis
(Referred to VREF)
10
IB
Input Bias Current
VS/D = 0–5V
IOUT(S/D)
Regulator Output Current
in Shutdown
See (11)
3
−20
−18
−24
18
24
−18
−24
18
24
−60
−100
60
100
−60
−100
60
100
nA
12
20
μA
15
20
mV
mV
mV
12
20
AUXILIARY COMPARATOR
VOS
Input Offset Voltage
(Referred to VREF)
±5
HYST
Hysteresis
(Referred to VREF)
10
IB
Input Bias Current
VCOMP = 0–5V
−20
IOH
Output HIGH Leakage
VOH = 30V, VCOMP = 1.3V
0.01
VOL
Output LOW Voltage
VCOMP = 1.1V, IO = 400 μA
125
−15
−20
15
20
−15
−20
mV
−60
−100
60
100
−60
−100
60
100
nA
1
2
1
2
μA
250
400
250
400
mV
(10) Dropout detection comparator threshold voltages are expressed in terms of a voltage differential measured at the Feedback terminal
below the nominal reference voltage, which is the reference voltage measured with VIN = VO(NOM) + 1V. To express these thresholds in
terms of output voltage change, multiply by the error amplifier gain which is VO/VREF = (R1 + R2)/R2 (see Basic Application Circuit).
(11) Vshutdown ≤ 1.1V, VIN < 30V, VOUT = 0V.
4
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Basic Application Circuit
Connection Diagram
Top View
*Internally Connected to Power Ground
Figure 1. 16-Pin Surface Mount SOIC Package
See Package Number D0016A
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Typical Performance Characteristics
Unless otherwise specified: CIN = 4.7 μF, VIN = 6V, IL = 1 mA, COUT = 10 μF, Feedback pin is tied to VTAP pin, Output pin is
tied to Sense pin, VS/D = 2V, VOUT = 5V.
6
Ground Pin Current
Ground Pin Current
Figure 2.
Figure 3.
Ground Pin Current
Ground Pin Current
Figure 4.
Figure 5.
Ground Pin Current
Dropout Characteristics
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Unless otherwise specified: CIN = 4.7 μF, VIN = 6V, IL = 1 mA, COUT = 10 μF, Feedback pin is tied to VTAP pin, Output pin is
tied to Sense pin, VS/D = 2V, VOUT = 5V.
Dropout Voltage vs
Temperature
Dropout Voltage vs
Load Current
Figure 8.
Figure 9.
Enable Transient
Enable Transient
Figure 10.
Figure 11.
Load Transient
Load Transient
Figure 12.
Figure 13.
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Typical Performance Characteristics (continued)
Unless otherwise specified: CIN = 4.7 μF, VIN = 6V, IL = 1 mA, COUT = 10 μF, Feedback pin is tied to VTAP pin, Output pin is
tied to Sense pin, VS/D = 2V, VOUT = 5V.
8
Current Limit vs
Temperature
Line Transient Response
Figure 14.
Figure 15.
Line Transient Response
Ripple Rejection
Figure 16.
Figure 17.
Ripple Rejection
Thermal Regulation
Figure 18.
Figure 19.
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Typical Performance Characteristics (continued)
Unless otherwise specified: CIN = 4.7 μF, VIN = 6V, IL = 1 mA, COUT = 10 μF, Feedback pin is tied to VTAP pin, Output pin is
tied to Sense pin, VS/D = 2V, VOUT = 5V.
Output Impedance
Output Noise Voltage
Figure 20.
Figure 21.
Feedback Bias Current
Divider Resistance
Figure 22.
Figure 23.
Error Output Voltage vs
Input Voltage
Dropout Detection Comparator
Threshold Voltage
Figure 24.
Figure 25.
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Schematic Diagram
10
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APPLICATION HINTS
EXTERNAL CAPACITORS
Bypass capacitors on the input and output of the LP2960 are required: without these capacitors, the part will
oscillate.
A capacitor (whose value is at least 4.7 μF) must be connected from the VIN pin to ground. If the input capacitor
is located more than one inch away from the LP2960, the capacitor may have to be increased to 22 μF to assure
stability. A capacitor is also required between VOUT and Ground, and the minimum amount of capacitance
required here depends on output voltage.
If the output voltage of the LP2960 is set to 5V, a minimum of 10 μF is needed in output capacitance. At 3.3V
output, at least 22 μF is required to assure stability.
ESR LIMIT: The ESR of the capacitor used on the LP2960 must be less than 0.7Ω throughout the entire
operating temperature range to assure stability.
The ESR of an aluminum eIectroIytic capacitor is typically only specified at 25°C, and does not reflect the
maximum ESR that can be expected to occur over the entire temperature range of the capacitor.
Aluminum electrolytics show a marked increase in ESR at low temperatures (ESR can increase by a factor of 30
or more when going from 25°C to −30°C) which could lead to oscillation probIems in applications with very low
ambient temperatures. Solid tantalum capacitors are recommended for use in such cases.
Regulator instability can be caused by stray (board layout) capacitance appearing at the Feedback terminal.
Oscillations from this effect are most Iikely to occur when very high value resistors are used to set the output
voltage.
Adding a 100 pF capacitor between the Output and Feedback pins and increasing the output capacitor to at least
22 μF will stop the osciIIations.
MINIMUM LOAD
The internal resistive divider in the LP2960 provides sufficient output loading for proper regulation. If external
resistors are used to set the LP2960 output voltage, a minimum current of 5 μA through the externaI resistive
divider is recommended.
It should be noted that a minimum load current is specified in several of the test conditions listed under Electrical
Characteristics, and this value of load current must be used to get correlation on these test limits.
PROGRAMMING THE OUTPUT VOLTAGE
The LP2960 regulator may be pin-strapped for operation at the nominal output voltage using its internal resistive
divider by tying the Output and Sense pins together and also tying the Feedback and VTAP pins together.
Alternatively, it may be programmed for any voltage between the 1.23V reference and the 30V maximum rating
using an external pair of resistors (see Basic Application Circuit).
The complete equation for the output voltage is:
VOUT = VREF × (1 + R1/R2) + (IFB × R1)
(1)
The term VREF is the 1 .23V reference and IFB is the Feedback pin bias current (−20 nA typical). The minimum
recommended load current of 5 μA sets an upper limit of 240 kΩ on the value of R2 in cases where the regulator
must work with no load (see Minimum Load).
For best output accuracy, choosing R2 = 100 kΩ will reduce the error resulting from IFB to 0.17% while increasing
the resistive divider current to 12 μA. Since the typicaI quiescent current of the LP2960 is 450 μA, this added
current through R2 is negligible.
DROPOUT VOLTAGE
The dropout voltage of the regulator is defined as the minimum input-to-output voltage differential required for the
output voltage to stay within 100 mV of the output voltage measured with a 1V differential. The dropout voltage is
independent of the programmed output voltage.
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OUTPUT ISOLATION
If the LP2960 output is connected to an active voltage source (such as a battery) the regulator input should not
be shorted to ground, as this will cause a large current to flow from the battery into the LP2960 output lead.
If the LP2960 input is left floating with the output connected to a battery, a small current (a few mA) will flow into
the output lead.
The “reverse” current flowing from the battery into the LP2960 output can be prevented by using a blocking diode
between the output and the battery.
REDUCING OUTPUT NOISE
In reference applications it may be desirabIe to reduce the AC noise present on the output. One method is to
reduce regulator bandwidth by increasing output capacitance. This is relatively inefficient, since large increases
in capacitance are required to get significant improvement.
Noise can be reduced more effectively by a bypass capacitor placed across R1 (refer to Basic Application
Circuit).
A 0.1 μF capacitor connected across R1 will reduce the high frequency gain of the circuit to unity, lowering the
RMS output noise voltage from 210 μV to 130 μV (typical) using a 10 Hz–100 kHz bandwidth test measurement.
Also, output noise is no longer proportional to the output voltage, so improvements are more pronounced at
higher output voltages.
IMPORTANT: Since the 0.1 μF capacitor reduces the AC gain of the LP2960 to unity, the output capacitance
must be increased to at least 33 μF to assure regulator stability.
DROPOUT DETECTION COMPARATOR
The dropout detection comparator produces a logic “LOW” on the Error output whenever the LP2960 output
drops out of regulation by more than about 5%. This figure results from the comparator’s built-in offset of 60 mV
divided by the 1.23V reference (refer to Block Diagram).
The “5% below nominal” trip level remains constant regardless of the programmed output voltage. An out-ofregulation condition can result from low input voltage, current limiting, or thermal limiting.
The figure below gives a timing diagram showing the relationship between the output voltage, the Error output,
and input voltage as the input voltage is ramped up and down to a regulator programmed for 5V output.
*In shutdown mode, ERROR will go high if it has been pulled up to an external supply. To avoid this invalid response,
pull-up to regulator output.
**Exact value depends on dropout voltage. (See Application Hints)
Figure 26. Error Output Timing Diagram
The Error signal becomes low as VIN exceeds about 1.3V. It goes high at about 5V input, where the output
equals 4.75V. Since the dropout voltage is load dependent, the input voltage trip points will vary with load
current, but the output voltage trip point does not.
12
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The comparator has an open-collector output which requires an external pull-up resistor. This resistor may be
connected to the LP2960 output or another supply voltage.
Best operation is obtained by connecting the pull-up to the LP2960 output. If the pull-up resistor is connected to
an external 5V supply, the error flag will incorrectly signal “HIGH” whenever VIN < 1.3V (see Figure 26).
In selecting a value for the pull-up resistor, note that while the output can sink 400 μA, this current adds to
battery drain. Suggested values range from 100 kΩ–1 MΩ. The resistor is not required if the output is unused.
If a large output capacitance is used, a false logic “HIGH” can be generated when VIN ≈1.3V. In this case, the
error output becomes a high impedance, causing the voltage at the error output to rise to its pull-up value. If the
pull-up resistor is connected to VOUT, the error output can rise to 1.2V (which is a logic “HIGH” signal incorrectly
signifying the output is in regulation).
The user may wish to divide down the error flag voltage using equal-value resistors (10 kΩ suggested) to ensure
a low-level logic signal during any fault condition, while still allowing a valid high logic level during normal
operation.
AUXILIARY COMPARATOR
The LP2960 contains an auxiliary comparator whose inverting input is connected to the 1.23V reference. The
auxiIiary comparator has an open-collector output whose electrical characteristics are similar to the dropout
detection comparator. The non-inverting input and output are brought out for external connections.
SHUTDOWN INPUT
A logic-level signal will shut off the regulator output when a “LOW” (< 1.2V) is applied to the Shutdown input.
To prevent possible mis-operation, the Shutdown input must be actively terminated. If the input is driven from
open-collector logic, a pull-up resistor (20 kΩ–100 kΩ recommended) should be connected from the Shutdown
input to the regulator input.
If the Shutdown input is driven from a source which actively pulls low and high (like an op-amp), the puIl-up
resistor is not required, but may be used.
If the Shutdown input is to be unused, the cost of the pull-up resistor can be saved by tying the Shutdown input
directly to the regulator input.
IMPORTANT: Since the Absolute Maximum Ratings state that the Shutdown input can not go more than 0.3V
below ground, the reverse-battery protection feature which protects the regulator input is sacrificed if the
Shutdown input is tied directly to the regulator input.
If reverse-battery protection is required in an application, the pull-up resistor between the Shutdown input and the
regulator input must be used.
GROUND CONNECTIONS
The pins designated GND (see Connection Diagram) must be connected to the high-current ground point in the
circuit.
The GND pins are electrically connected (through the lead frame) to the die substrate, making them ideal for
conducting ground current or heat (see HEATSINKING).
The surface-mount (D) package also has an Analog Ground pin, which is the ground point on the die for the
regulator reference circuitry.
Along with the Sense pin, the availability of the Analog Ground pin allows the designer the ability to use “remote”
sensing and eliminate output voltage errors due to IR drops occurring along PC board traces.
IMPORTANT: The Analog Ground pin must be connected to circuit ground at some point for the regulator to
operate.
If remote sensing is not needed, the Analog Ground pin can simply be pin-strapped to the adjacent GND pin.
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HEATSINKING
A heatsink may be required with the LP2960 depending on the maximum power dissipation and maximum
ambient temperature of the application. Under alI possible operating conditions, the junction temperature must be
within the range specified under Absolute Maximum Ratings.
To determine if a heatsink is required, the power dissipated by the regulator, PD, must be calculated.
The figure below shows the voltages and currents which are present in the circuit, as welI as the formula for
calcuIating the power dissipated in the regulator:
Figure 27. Power Dissipation Diagram
The next parameter which must be calculated is the maximum allowable temperature rise, TR (max). This is
calculated by using the formula:
TR (max) = TJ (max) − TA (max
where
•
•
TJ (max) is the maximum allowable junction temperature, which is 125°C for commercial grade parts
TA (max) is the maximum ambient temperature which will be encountered in the application)
(2)
Using the calculated values for TR (max) and PD, the maximum allowable value for the junction-to-ambient
thermal resistance, θ(J−A), can now be found:
θ(J−A) = TR (max)/PD
(3)
The heatsink for the LP2960 is made using the PC board copper, with the heat generated on the die being
conducted through the lead frame and out to the pins which are soldered to the PC board.
The GND pins are the only ones capable of conducting any significant amount of heat, as they are internally
attached to the lead frame on which the die is mounted.
The figure below shows recommended copper foil patterns to be used for heatsinking the DIP and Surface Mount
(SOIC) packages:
Figure 28. Heat Sink Foil Patterns
14
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The table below shows measured values of θ(J−A) for a PC board with 1 ounce copper weight:
Package
DIP
Surface Mount SOIC
L (in.)
H (in.)
θJ−A(°C/W)
1
0.5
50
2
0.2
52
1
0.5
72
2
0.2
74
As the heat must transfer from the copper to the surrounding air, best results (lowest θJ−A) will be obtained by
using a surface copper layer with the solder resist opened up over the heatsink area.
If an internal copper layer of a multi-layer board is used for heatsinking, the board material acts as an insulator,
inhibiting heat transfer and increasing θJ−A.
As with any heatsink, increasing the airflow across the board will significantly improve the heat transfer.
Typical Applications
Figure 29. Low T.C. Current Sink
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Product Folder Links: LP2960
15
LP2960
SNVS112C – APRIL 1999 – REVISED APRIL 2013
www.ti.com
*Output voltage equals +VIN minus dropout voltage, which varies with output current. Current limits at a maximum of
1000 mA (typical).
**Select R1 so that the comparator input voltage is 1.23V at the output voltage which corresponds to the desired fault
current value.
Figure 30. 5V Bus Current Limiter with Load Fault Indicator
*Connect to Logic or μP control inputs.
LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge
the battery or power-down some hardware with high power requirements. The output is still in regulation at this time.
OUT OF REGULATION flag indicates when the battery is almost completely discharged, and can be used to initiate a
power-down sequence.
Figure 31. 5V Regulator with Error Flags for LOW
BATTERY and OUT OF REGULATION
16
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Product Folder Links: LP2960
LP2960
www.ti.com
SNVS112C – APRIL 1999 – REVISED APRIL 2013
*Turns ON at VIN = 5.87V
Turns OFF at VIN = 5.64V
(for component values shown)
Figure 32. 5V Regulator with Snap-ON/Snap-OFF
Feature and Hysteresis
Figure 33. 5V Regulator with Timed Power-On Reset
*RT = 1 Meg, CT = 0.1 μF
Figure 34. Timing Diagram for Timed Power-On Reset
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Product Folder Links: LP2960
17
LP2960
SNVS112C – APRIL 1999 – REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
•
18
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 17
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LP2960AIM-3.3/NOPB
ACTIVE
SOIC
D
16
48
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960AIM
-3.3
LP2960AIM-5.0
NRND
SOIC
D
16
48
TBD
Call TI
Call TI
-40 to 125
LP2960AIM
-5.0
LP2960AIM-5.0/NOPB
ACTIVE
SOIC
D
16
48
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960AIM
-5.0
LP2960AIMX-3.3/NOPB
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960AIM
-3.3
LP2960AIMX-5.0/NOPB
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960AIM
-5.0
LP2960IM-3.3/NOPB
ACTIVE
SOIC
D
16
48
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960IM
-3.3
LP2960IM-5.0
NRND
SOIC
D
16
48
TBD
Call TI
Call TI
-40 to 125
LP2960IM
-5.0
LP2960IM-5.0/NOPB
ACTIVE
SOIC
D
16
48
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960IM
-5.0
LP2960IMX-3.3/NOPB
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 125
LP2960IM
-3.3
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LP2960AIMX-3.3/NOPB
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
LP2960AIMX-5.0/NOPB
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
LP2960IMX-3.3/NOPB
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.3
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LP2960AIMX-3.3/NOPB
SOIC
D
16
2500
367.0
367.0
38.0
LP2960AIMX-5.0/NOPB
SOIC
D
16
2500
367.0
367.0
38.0
LP2960IMX-3.3/NOPB
SOIC
D
16
2500
367.0
367.0
38.0
Pack Materials-Page 2
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