SPECTRALINEAR SL38000ZC-XXX

SL38000
Programmable 4-PLL CG with VCXO and SSCG
Key Features
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Description
4 Programmable PLLs with up to 9 Clock Outputs
and 2 REFCLKs
Wide 2.5V to 3.3V +/-10% power supply range
CLKOUTs support 3.3V to 2.5V or 1.8V +/-10%
Low power dissipation and low jitter
Programmable VCXO and SSCG options
EEPROM or I2C Programmability
Programmable Center or Down Spread Modulation
from 0.25 to 5.0%
8 to 48 MHz external crystal range
8 to 166 MHz external clock input range
Programmable 1 to 200 MHz clock output range
Integrated internal voltage regulator
Programmable PD#/OE/SSON#/FS functions
Programmable CL at XIN and XOUT pins
Programmable output rise and fall times
28-pin TSSOP package with commercial and
industrial temperature ranges
Applications
•
Printers, MFPs, Digital Copiers
•
DTV, HDTV, DVD-R/W and STB
•
General Purpose Frequency Synthesising
The SL38000 a fully integrated 4 PLL programmable low
power Clock Generator with SSCG and VCXO functions
used for reducing Electromagnetic Interference (EMI) and
general purpose frequency synthesizing. The product is
designed using SpectraLinear proprietary programmable
EProClock™ phase-locked loop (PLL) and Spread
Spectrum Clock (SSC) technology to synthesize and
modulate the input clock. The modulated clock can
significantly reduce the measured EMI levels, and leading
to the compliance with regulatory agency requirements.
Up to 9 output clock frequencies and 2 REFOUT clocks,
Spread %, output rise and fall times for each clock outputs,
crystal load, modulation frequency and PD#/OE/SSON#/FS
functions can be programmed to meet the needs of wide
range of applications. The SL38000 operates from 2.5V to
3.3V power supply voltage range. The output clocks
(CLKOUTs) can support 3.3 to 2.5V or 1.8V +/-10%. The
product is offered in 28-pin TSSOP package with
commercial and industrial grades.
Benefits
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Peak EMI reduction of 8 to 16 dB
Fast time-to-market
Cost Reduction
Reduction of PCB layers
Eleminates the need for XOs and VCXOs
Block Diagram
VDDO
CLKOUT-1 or MF-1
XIN/CLKIN
XOUT
VIN
XTAL
OSCILLATOR
(XO or VXCO)
PLL-1
CLKOUT-2 or MF-2
(Optional)
VDDA
PLL-2
Voltage
Regulator-1
To PLLs
VSSA
Input Mux
and Control
Logic
SS-PLL-3
VDDX
Voltage
Regulator-2
5
Output
Drivers with
Multi
Function I/O
and
Output
Drivers Drive
Strength
Control
CLKOUT-3 or MF-3
CLKOUT-4 or MF-4
CLKOUT-5 or MF-5
CLKOUT-6 or MF-6
CLKOUT-7 or MF-7
REFOUT-1 or MF-9
To XO
and Core
SS-PLL-4
REFOUT-2 or MF-13
VSSX
VSSO
CLKOUT-8, SDATA or
MF-10
CLKOUT-9, SCLK or
MF-11
I2C Interface
Input Logic
Rev 1.1, August 7, 2008
SS Logic
Control
Mux and Div
Control
MEMORY
Configuration
Configuration
Logic
MF-8 or MF13
Page 1 of 12
2200 Laurelwood Road, Santa Clara, CA 95054 Tel: (408) 855-0555 Fax: (408) 855-0550 www.SpectraLinear.com
SL38000
Pin Configuration
28-Pin TSSOP Package
Rev 1.1, August 7, 2008
Page 2 of 12
SL38000
Pin Description
Pin
Number
Pin Name
Pin
Type
1
XIN/CLKIN
Input
Crystal oscillator or external clock input.
2
MF-8
Input
Multi function input/output. Programmed as OE, FS. There is no programmable
pull-up/down resistor.
3
MF-9
I/O
4
VIN
Input
11
CLKOUT-1
I/O
Programmable Clock Output-1. This pin can be programmed as OE, PD#,
SSON# or FS. Programmable pull-up/down resistor is available.
or MF-1
Pin Description
Multi function input/output. Programmed as REFOUT-1, OE, PD#, SSON# or
FS. Only programmable pull-up resistor available.
VCXO control pin VIN.
12
CLKOUT-8,
SDATA or
MF-10
I/O
Programmed as Clock Output-8 or Serial Data Input or multi function input.
This pin can be programmed as OE, PD#, SSON# or FS. Programmable pullup/down resistor is available.
13
CLKOUT-2
or MF-2
I/O
Programmable Clock Output-2. This pin can be programmed as OE, PD#,
SSON# or FS. This pin can be programmed as OE, PD#, SSON# or FS.
Programmable pull-up/down resistor is available.
14
CLKOUT-9,
SCLK or
MF-11
I/O
Programmable Clock Output-9, Serial Data Input Clock or multi function input.
This pin can be programmed as OE, PD#, SSON# or FS. Programmable pullup/down resistor is available.
15
CLKOUT-3
or MF-3
I/O
Programmable Clock Output-3. This pin can be programmed as OE, PD#,
SSON# or FS. Programmable pull-up/down resistor is available.
16
CLKOUT-4
or MF-4
I/O
Programmable Clock Output-4. This pin can be programmed as OE, PD#,
SSON# or FS. Programmable pull-up/down resistor is available.
17
CLKOUT-5
or MF-5
I/O
Programmable Clock Output-5. This pin can be programmed as OE, PD#,
SSON# or FS. Programmable pull-up/down resistor is available.
18
CLKOUT-6
or MF-6
I/O
Programmable Clock Output-6. This pin can be programmed as OE, PD#,
SSON# or FS. Programmable pull-up/down resistor is available.
19
CLKOUT-7
or MF-7
I/O
Programmable Clock Output-7. This pin can be programmed as OE, PD#,
SSON# or FS. Programmable pull-up/down resistor is available.
24
MF-12
Input
Multi function input. Programmed as OE, PD#, SSON# or FS.
Programmable pull-up/down resistor is available.
25
MF-13
I/O
26
VDDA
Power
Power supply, 3.3V to 2.5V, for PLLs.
27
VDDX
Power
Power supply, 3.3V to 2.5V, for oscillator and core logic.
7
VSSX
Power
Power supply ground for oscillator and core logic.
8
VSSA
Power
Power supply ground for PLLs.
5
VDDO-1
Power
Power supply for CLKOUT-3, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD.
6
VDDO-2
Power
Power supply for CLKOUT-1/2/8/9, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD.
Rev 1.1, August 7, 2008
Multi function input/output. Programmed as REFOUT-2, OE, PD#, SSON# or
FS. Programmable pull-up/down resistor is available.
Page 3 of 12
SL38000
22
VDDO-3
Power
Power supply for CLKOUT-5/6/7, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD.
23
VDDO-4
Power
Power supply for CLKOUT-4, 3.3V to 2.5V or 1.8V, VDDO ≤ VDD.
9
VSSO-1
Power
Power ground for CLKOUT-3.
10
VSSO-2
Power
Power ground for CLKOUT-1/2/8/9.
20
VSSO-3
Power
Power ground for CLKOUT-5/6/7.
21
VSSO-4
Power
Power ground for CLKOUT-4.
28
XOUT
Output
Leave unconnected when external clock is used.
Absolute Maximum Ratings
Condition
Min
Max
Unit
VDDA and VDDX
-0.5
4.2
V
VDDO≤VDDA=VDDX
-
VDD
V
-0.5
VDD+0.5
V
Description
Supply voltage, VDD
Supply voltage, VDDO
All Inputs and Outputs
Ambient Operating Temperature
In operation, C-Grade
0
70
°C
Ambient Operating Temperature
In operation, I-Grade
-40
85
°C
Storage Temperature
No power is applied
-65
150
°C
Junction Temperature
In operation, power is applied
-
125
°C
-
260
°C
Soldering Temperature
ESD Rating (Human Body Model)
JEDEC22-A114D
-4,000
4,000
V
ESD Rating (Charge Device Model)
JEDEC22-C101C
-1,500
1,500
V
ESD Rating (Machine Model)
JEDEC22-A115D
-250
250
V
DC Electrical Characteristics (C-Grade)
Unless otherwise stated VDDA=VDDX=2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range 0 to +70 Deg C
Description
Symbol
Condition
Min
Typ
Max
Unit
2.97
3.3
3.63
V
Operating Voltage
VDD
Input Low Voltage
VIL
CMOS Level, Pins programmed as
PD#, OE, SSON# or FS
0
-
0.3VDD
V
Input High Voltage
VIH
CMOS Level, Pins programmed as
PD#, OE, SSON# or FS
0.7VDD
-
VDD
V
Output High Voltage
VOH1
IOH=-6mA , Pins programmed as
CLKOUT/REFOUT
VDDO0.5
-
-
V
Output Low Voltage
VOL1
IOL=6mA , Pins programmed as
CLKOUT/REFOUT
-
-
0.5
V
Output High Voltage
VOH2
IOH=-4mA , Pins programmed as
CLKOUT/REFOUT
VDDO0.4
-
-
V
Output Low Voltage
VOL2
IOL=4mA , Pins programmed as
CLKOUT/REFOUT
-
-
0.4
V
Rev 1.1, August 7, 2008
VDD+/-10%
Page 4 of 12
SL38000
IIH
VIN=VDD, Input Pins are
programmed as PD#, OE, SSON#
or FS, and no pull-up/down resister
used
-10
-
10
μA
IIL
VIN=GND, Input Pins are
programmed as PD#, OE, SSON#
or FS, and no pull-up/down resister
used
-10
-
10
μA
RPU/D
If Programmed at pins PD#, OE,
SSON#, FS and CLKOUT
100
175
250
kΩ
Operating Supply
Current
IDD1
FIN=27MHz and all 7 clocks are
at 33MHz and CL=0
-
16
TBD
mA
Operating Supply
Current
IDD2
FIN=27MHz and all 9 clocks are
at 66MHz and CL=0
-
22
TBD
mA
Standby Current
ISBC
PD#=GND
-
90
120
μA
-10
-
10
μA
Minimum setting value
-
8
-
pF
Maximum setting value
-
40
-
pF
Resolution (programming steps)
-
0.5
-
pF
Pins 4 and 8 if programmed as
PD#, OE, SSON or FS
-
4
6
pF
All CLKOUT outputs
-
-
15
pF
Input High Current
Input Low Current
Pull-up or Down
Resistors
Output Leakage Current
IOL
Programmable
Input Capacitance at
Pins 1 and 28
Cin
Cout
Input Capacitance
CIN2
Load Capacitance
CL
OE=GND at CLKOUT pins
AC Electrical Characteristics (C-Grade)
Unless otherwise stated VDDA=VDDX= 2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range 0 to +70 Deg C
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Input Frequency Range
FIN1
Crystal or Ceramic Resonator
8
-
48
MHz
Input Frequency Range
FIN2
External Clock
3
-
166
MHz
Output Frequency Range FOUT1
CLKOUT, VDDO=3.3V to 2.5V
3
-
200
MHz
Output Frequency Range FOUT2
CLKOUT, VDDO=1.8V
3
-
166
MHz
Output Frequency Range FOUT3
REFCLK, crystal or resonator input
0.25
-
48
MHz
Output Duty Cycle
DC1
SSCLK
45
50
55
%
Output Duty Cycle
DC2
REFCLK , Xtal input
45
50
55
%
Output Duty Cycle
DC3
REFCLK, clock input
40
50
60
%
Input Duty Cycle
DCIN
Clock Input, Pin 3
40
50
60
%
Cycle-to-Cycle Jitter
(SSCLK – Pins 4/6/7/8)
CCJ1
FIN=27MHz, all 7 clocks are
programmed at 66MHz, CL=15pF
-
180
TBD
ps
Cycle-to-Cycle Jitter
(SSCLK – Pins 4/6/7/8)
CCJ2
FIN=27MHz, all 9 clocks are
programmed at 66MHz, CL=15pF
-
220
TBD
ps
tPSR
Time for VDD reaching minimum
specified value and monolitic power
supply ramp
-
-
12
ms
Power supply Ramp
Time
Rev 1.1, August 7, 2008
Page 5 of 12
SL38000
tPLL
Time from VDD reaching minimum
specified value to valid output
frequencies at all outputs
-
7.8
9.0
ms
tPU2
Time from PD# rising edge to valid
frequency at outputs
-
5.0
7.0
ms
tOE
Time from OE falling edge to Hi-Z at
outputs
-
200
350
ns
tOD
Time from OE falling edge to Hi-Z at
outputs
-
200
350
ns
PLL Lock Time
PD# Power-up Time
(Crystal or Clock)
Output Enable Time
Output Disable Time
Spread Percent Range
SPR-1
Center Spread
+/-0.125
-
+/-2.5
%
Spread Percent Range
SPR-2
Down Spread
-5.0
-
-0.25
%
Modulation Frequency
FMOD
Programmable, 31.5 kHz standard
26
31.5
120
kHz
DC Electrical Characteristics (C-Grade)
Unless otherwise stated VDDA=VDDX=2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range -40 to +85 Deg C
Description
Symbol
Condition
Min
Typ
Max
Unit
2.97
3.3
3.63
V
Operating Voltage
VDD
Input Low Voltage
VIL
CMOS Level, Pins programmed as
PD#, OE, SSON# or FS
0
-
0.3VDD
V
Input High Voltage
VIH
CMOS Level, Pins programmed as
PD#, OE, SSON# or FS
0.7VDD
-
VDD
V
Output High Voltage
VOH1
IOH=-6mA , Pins programmed as
CLKOUT/REFOUT
VDDO0.5
-
-
V
Output Low Voltage
VOL1
IOL=6mA , Pins programmed as
CLKOUT/REFOUT
-
-
0.5
V
Output High Voltage
VOH2
IOH=-4mA , Pins programmed as
CLKOUT/REFOUT
VDDO0.4
-
-
V
Output Low Voltage
VOL2
IOL=4mA , Pins programmed as
CLKOUT/REFOUT
-
-
0.4
V
IIH
VIN=VDD, Input Pins are
programmed as PD#, OE, SSON#
or FS, and no pull-up/down resister
used
-15
-
15
μA
IIL
VIN=GND, Input Pins are
programmed as PD#, OE, SSON#
or FS, and no pull-up/down resister
used
-15
-
15
μA
RPU/D
If Programmed at pins PD#, OE,
SSON#, FS and CLKOUT
100
175
250
kΩ
Operating Supply
Current
IDD1
FIN=27MHz and all 7 clocks are
at 33MHz and CL=0
-
20
TBD
mA
Operating Supply
Current
IDD2
FIN=27MHz and all 9 clocks are
at 66MHz and CL=0
-
28
TBD
mA
Standby Current
ISBC
PD#=GND
-
140
200
μA
Input High Current
Input Low Current
Pull-up or Down
Resistors
Rev 1.1, August 7, 2008
VDD+/-10%
Page 6 of 12
SL38000
Output Leakage Current
IOL
Programmable
Input Capacitance at
Pins 1 and 28
Cin
Cout
Input Capacitance
CIN2
Load Capacitance
CL
OE=GND at CLKOUT pins
-15
-
15
μA
Minimum setting value
-
8
-
pF
Maximum setting value
-
40
-
pF
Resolution (programming steps)
-
0.5
-
pF
Pins 4 and 8 if programmed as
PD#, OE, SSON or FS
-
4
6
pF
All CLKOUT outputs
-
-
15
pF
AC Electrical Characteristics (C-Grade)
Unless otherwise stated VDDA=VDDX= 2.5V to 3.3V+/-10%, CL=15pF and Ambient Temperature range -40 to +85 Deg C
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Input Frequency Range
FIN1
Crystal or Ceramic Resonator
8
-
48
MHz
Input Frequency Range
FIN2
External Clock
3
-
166
MHz
Output Frequency Range FOUT1
CLKOUT, VDDO=3.3V to 2.5V
3
-
200
MHz
Output Frequency Range FOUT2
CLKOUT, VDDO=1.8V
3
-
166
MHz
Output Frequency Range FOUT3
REFCLK, crystal or resonator input
0.25
-
48
MHz
Output Duty Cycle
DC1
SSCLK
45
50
55
%
Output Duty Cycle
DC2
REFCLK , Xtal input
45
50
55
%
Output Duty Cycle
DC3
REFCLK, clock input
40
50
60
%
Input Duty Cycle
DCIN
Clock Input, Pin 3
40
50
60
%
Cycle-to-Cycle Jitter
(SSCLK – Pins 4/6/7/8)
CCJ1
FIN=27MHz, all 7 clocks are
programmed at 66MHz, CL=15pF
-
200
TBD
ps
Cycle-to-Cycle Jitter
(SSCLK – Pins 4/6/7/8)
CCJ2
FIN=27MHz, all 9 clocks are
programmed at 66MHz, CL=15pF
-
250
TBD
ps
tPSR
Time for VDD reaching minimum
specified value and monolitic power
supply ramp
-
-
12
ms
tPLL
Time from VDD reaching minimum
specified value to valid output
frequencies at all outputs
-
7.8
9.0
ms
tPU2
Time from PD# rising edge to valid
frequency at outputs
-
5.5
8.0
ms
tOE
Time from OE falling edge to Hi-Z at
outputs
-
250
400
ns
tOD
Time from OE falling edge to Hi-Z at
outputs
-
250
400
ns
Power supply Ramp
Time
PLL Lock Time
PD# Power-up Time
(Crystal or Clock)
Output Enable Time
Output Disable Time
Spread Percent Range
SPR-1
Center Spread
+/-0.125
-
+/-2.5
%
Spread Percent Range
SPR-2
Down Spread
-5.0
-
-0.25
%
Modulation Frequency
FMOD
Programmable, 31.5 kHz standard
25
31.5
120
kHz
Rev 1.1, August 7, 2008
Page 7 of 12
SL38000
Programmable Output Clock (CLKOUT) Rise and Fall Times
The output clock rise and fall times (tr/tf) of each clock output can be programmed independently to match drive level
to load impedance.
Programming
VDDO=3.3V
VDDO=2.5V
VDDO=1.8V
Code
CL=15pF
CL=15pF
CL=15pF
000
4.00
4.80
5.60
ns
001
2.00
2.60
3.20
ns
010
1.40
1.80
2.20
ns
011
1.10
1.40
1.70
ns
100
0.85
1.10
1.40
ns
101
0.70
0.90
1.10
ns
110
0.55
0.70
0.90
ns
Unit
Table 1. Programmable CLKOUT Rise and Fall Times
Notes:
1. All typical values are at respective nominal VDD values.
2. The worst case rise and fall times variations are +/- 20% for C-Grade and +/-30% for I-grade.
I2C-Bus Timing Specifications
PARAMETER
SYMBOL
STANDARD-MODE
FAST-MODE
UNIT
MIN.
MAX.
MIN.
MAX.
fSCL
0
100
0
400
kHz
START hold
time
tHD;STA
4.0
-
0.6
-
μs
SCLK LOW
period
tLOW
4.7
-
1.3
-
μs
SCLK HIGH
period
tHIGH
4.0
-
0.6
-
μs
START Setup time
tSU;DAT
4.7
-
0.6
-
μs
SDA set-up
time
tSU;DAT
250
-
100
-
ns
SDA/SCLK
rise time
tR
-
1000
-
300
ns
SCL Clock
Frequency
Rev 1.1, August 7, 2008
Page 8 of 12
SL38000
SDA/SCLK
fall time
tF
-
300
-
300
ns
STOP set-up
time
tSU;STO
4.0
-
0.6
-
ns
Bus free time
tBUF
4.7
-
1.3
-
μs
Table 2. I2C-Bus Timing Specification
SDATA
tF
tLOW
tF
tSU;DAT
tR
tR
tHD;STA
tBUF
SCLK
tHD;STA
tHD;DAT
tHIGH
S
tSU;STO
tSU;STA
Sr
P
I2C-Bus Timing Diagram
External Components & Design Considerations
Typical Application Schematic
TBD
Comments and Recommendations
Decoupling Capacitor: A decoupling capacitor of 0.1μF must be used between all VDD and VSS pins on PCB.
Place the capacitor on the component side of the PCB as close to the VDD pins as possible. The PCB trace to the
VDD pins and to the GND via should be kept as short as possible Do not use vias between the decoupling capacitor
and the VDD pins.
Series Termination Resistor: A series termination resistor is recommended if the distance between the outputs
(CLKOUT or REFCLK pins) and the load is over 1 ½ inch. The nominal impedance of the all clock outputs are about
25 Ω. Use 20 Ω resistor in series with the output to terminate 50Ω trace impedance and place 20 Ω resistor as close
to the SSCLK output as possible.
Crystal and Crystal Load: Use only parallel resonant fundamental crystals. DO NOT USE higher overtone crystals.
To meet the crystal initial accuracy specification (in ppm); the internal on-chip programmable capacitors PCin and
PCout must be programmed to match the crystal load requirement. These values are given by the formula below:
Rev 1.1, August 7, 2008
Page 9 of 12
S
SL38000
PCin(pF) =PCout(pF)= [(CL(pF) – Cp(pF)/2)] x 2
Where CL is crystal load capacitor as given by the crystal datasheet and Cp(pF) is the compensation factor for the
total parasitic capacitance at XIN or XOUT pin including PCB related parasitic capacitance.
As an example; if a crystal with CL=18pF is used and Cp=4pF, by using the above formula, PCin=PCout=[(18-(4/2)] x
2 = 32pF. Programming PCin and PCout to 32pF assures that this crystal sees an equivalent load of 18pF and no
other external crystal load capacitor is needed. Deviating from the crystal load specification could cause an increase
in frequency accuracy in ppm. Refer to the Table 5 for the recommended crystal specifications.
Recommended External Crystal Specifications (XO Version)
Parameter
FNOM
CL
R1,1
R1,2
R1,3
DL1,1
DL1,2
Co1
Co2
Description
Nominal Crystal
Frequency Range
Nominal Crystal Load
Min
8
Typ
-
Max
48
Unit
MHz
Comments
Fundamental Mode – AT Cut
6
12
18
pF
Equivalent Series
Resistance
Equivalent Series
Resistance
Equivalent Series
Resistance
Crystal Drive Level
Crystal Drive Level
Shunt Capacitance
Shunt Capacitance
20
40
100
Ohm
Load for +/-0 ppm Fo resonance
value
F-Range: 8.0 to 12.999 MHz
12.5
25
60
Ohm
F-Range: 13.0 to 19.999 MHz
10
20
50
Ohm
F-Range: 20.0 to 48.000 MHz
-
4
5
200
150
5.4
7.2
µW
µW
pF
pF
F-Range: 8.0 to 19.999 MHz
F-Range: 20.0 to 48.000 MHz
SMD Xtals
Through Hole (Leaded) Xtals
Table 3. Recommended Crystal Specifications
Rev 1.1, August 7, 2008
Page 10 of 12
SL38000
Package Outline and Package Dimensions
28-Pin TSSOP Package
Thermal Characteristics
Parameter
Thermal Resistance
Junction to Ambient
Thermal Resistance
Junction to Case
Rev 1.1, August 7, 2008
Symbol
Condition
Min
Typ
Max
Unit
θ JA
Still air
-
TBD
-
°C/W
θ JA
1m/s air flow
-
TBD
-
°C/W
θ JA
3m/s air flow
-
TBD
-
°C/W
θ JC
Independent of air flow
-
TBD
-
°C/W
Page 11 of 12
SL38000
Ordering Information [1]
Ordering Number
[2]
Marking
Shipping Package
Package
Temperature
SL38000ZC-XXX
SL38000ZC-XXX
Tube
28-pin TSSOP
0 to 70°C
SL38000ZC-XXXT
SL38000ZC-XXX
Tape and Reel
28-pin TSSOP
0 to 70°C
SL38000ZI-XXX
SL380004ZI-XXX
Tube
28-pin TSSOP
-40 to 85°C
SL38000ZI-XXXT
SL38000ZI-XXX
Tape and Reel
28-pin TSSOP
-40 to 85°C
Notes:
1. All SLI products are RoHS compliant.
2. “XXX” is “Dash” number and will be assigned by SLI for final programmed samples and production
units based on customer programming requirements.
While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc. assumes no responsibility for the use
of any circuitry or for the infringement of any patents or other rights of third parties which would result from each use. This product
is intended for use in normal commercial applications and is not warranted not is it intended for use in life support, critical medical
instruments, or any other application requiring extended temperature range, high reliability, or any other extraordinary environmental
requirements unless pursuant to additional processing by Spectra Linear Inc., and an expressed written agreement by Spectra
Linear Inc. Spectra Linear Inc. reserves the right to change any circuitry or specification without notice.
Rev 1.1, August 7, 2008
Page 12 of 12