Preliminary Product Description XD010-04S-D4F The XD010-04S-D4F 10W power module is a robust broadband 2-stage Class A/AB amplifier, suitable for use as a power amplifier driver or output stage. It is a drop-in, no-tune, solution for high power applications requiring high efficiency, excellent linearity, and unit to unit repeatability. Internal bias current compensation ensures stable performance over a wide temperature range. 350-600 MHz Class AB 10W Power Amplifier Module Functional Block Diagram Stage 1 Stage 2 RF In RF Out VD1 1 VD2 2 3 Product Features • • • • • • 50 W RF Impedance > 10W Output P1dB Single Voltage Operation High Gain: 32 dB Typical Temperature Compensation Robust 8000V ESD (HBM), Class 3B Applications 4 Case Flange = Ground • • • • • DTV Public Service Wireless Infrastructure Military CDMA or GSM Key Specifications Parameter Frequency Test Conditions: Zin = Zout = 50Ω, VD = 28.0V, ID1 = 230mA, = 150mA, TFlange = 25ºC ID2 Min. Typ. Max. MHz 350 - 600 P1dB Output Power at 1dB Compression, 450MHz W - 12 - Gain Gain at 10W Output Power, 450MHz dB 30 32 - Peak to Peak Gain Variation, 350 - 600MHz dB - 1.0 2.0 Input Return Loss 1W Output Power, 350 - 600MHz dB 10 15 - Drain Efficiency at 10W CW, 350-600MHz % 26 30 - Gain Flatness IRL Efficiency Linearity Delay Phase Linearity Frequency of Operation Unit 3rd Order IMD at 10W PEP (Two Tone), 450MHz & 451MHz dBc - -32 -28 Signal Delay from Pin 1 to Pin 4 nS - 2.5 - Deviation from Linear Phase (Peak to Peak) Deg - 0.5 - Quality Specifications Parameter Unit Min Typical Human Body Model, JEDEC Document - JESD22-A114-B V 8000 - - MTTF 85oC Baseplate, 200oC Channel H - 1.2 X 106 - RTH, j-l Thermal Resistance Stage 1 (Junction to Case) ºC/W - 11 - RTH, j-2 Thermal Resistance Stage 2 (Junction to Case) ºC/W - 4 - ESD Rating Max The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2005 Sirenza Microdevices, Inc. All worldwide rights reserved. 303 S. Technology Court, Broomfield, CO 80021 Phone: (800) SMI-MMIC 1 http://www.sirenza.com EDS-104259 Rev B Preliminary XD010-04S-D4F 350-600 MHz 10W Amp Pin Description Pin # Function 1 RF Input Comments 2 VD1 1st stage bias 3 VD2 2nd stage bias. Integrated temperature compensation maintains constant current over the operating temperature range. See Note 1. 4 RF Output Flange Gnd Internally connected to DC ground. Do not apply DC voltages to the RF leads. Internally connected to DC ground. Do not apply DC voltages to the RF leads. Baseplate provides electrical ground and a thermal transfer path for the device. Proper mounting assures optimal performance and the highest reliablility. See Sirenza applications note: AN-060 Installation Instructions for XD Module Series. Simplified Device Schematic 2 VD1 3 VD2 Temperature Compensation Bias Network Q1 RF in RF out 4 Q2 1 Case Flange = Ground Absolute Maximum Ratings Parameters Value Unit 35 V Note 1: Device Channel Temperature +200 ºC The internally generated gate voltage is thermally compensated to maintain constant drain quiescent current over the temperature range listed in the data sheet. No compensation is provided for gain changes with temperature. This can only be provided with an external AGC circuit. Lead Temperature During Solder Reflow +210 ºC Note 2: Operating Temperature Range -20 to +90 ºC Storage Temperature Range -40 to +100 ºC Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the VD leads to accommodate modulated signals. 1st Stage Bias Voltage (VD1 ) 2nd Stage Bias Voltage (VD2) 35 V RF Input Power +20 dBm 5:1 VSWR Load VSWR for Continuous Operation Without Damage Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation refer to the key specifications table on the first page of the datasheet. Caution: ESD Sensitive Appropriate precautions in handling, packaging and testing devices must be observed. 303 S. Technology Court, Broomfield, CO 80021 Phone: (800) SMI-MMIC 2 http://www.sirenza.com EDS-104259 Rev B Preliminary XD010-04S-D4F 350-600 MHz 10W Amp Test Board Schematic with module attachments shown Test Board Layout and Bill of Materials Component Description Manufacturer PCB Rogers 4350, er=3.5 Thickness=30mils Rogers J1, J2 SMA, RF, PCB Mount Tab W / Flange Johnson J3 MTA Post Header, 6 Pin, Rectangle, Polarized, Surface Mount AMP C1, C2 Cap, 10mF 50V, 10%, Tant, D Kemet C4, C6 Cap, 0.01mF, 100V, 10%, 1206 Johanson C3, C5 Cap, 1000pF, 100V, 10%, 1206 Johanson Mounting Screws 4-40 X 0.250” Various Gerber files, DXF drawings, a detailed BOM, and assembly recommendations for the test board with fixture are available from Sirenza applications. 303 S. Technology Court, Broomfield, CO 80021 Phone: (800) SMI-MMIC 3 http://www.sirenza.com EDS-104259 Rev B WWW.ALLDATASHEET.COM Copyright © Each Manufacturing Company. All Datasheets cannot be modified without permission. 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