MM54C32/MM74C32 Quad 2-Input OR Gate General Description Features Employing complementary MOS (CMOS) transistors to achieve low power and high noise margin, these gates provide the basic functions used in the implementation of digital integrated circuit systems. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage. This results in high noise immunity over a wide supply voltage range. No DC power other than that caused by leakage current is consumed during static conditions. All inputs are protected against static discharge damage. Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibility 3.0V to 15V 1.0V 0.45V VCC (typ.) fan out of 2 driving 74L Connection Diagram Dual-In-Line Package TL/F/5881 – 1 Top View Order Number MM54C32 or MM74C32 C1995 National Semiconductor Corporation TL/F/5881 RRD-B30M105/Printed in U. S. A. MM54C32/MM74C32 Quad 2-Input OR Gate February 1988 Absolute Maximum Ratings (Note 1) Voltage at Any Pin b 0.3V to VCC a 0.3V Operating Temperature Range MM54C32 MM74C32 b 65§ C to a 150§ C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. b 55§ C to a 125§ C b 40§ C to a 85§ C 700 mW 500 mW 3.0V to 15V 18V Absolute Maximum VCC Lead Temperature (Soldering, 10 seconds) 260§ C DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage VCC e 5.0V 3.5 VCC e 10V 8.0 V V VCC e 5.0V 1.5 V VCC e 10V 2.0 V VCC e 5.0V, IO e b10 mA 4.5 VCC e 10V, IO e b10 mA 9.0 V V VCC e 5.0V, IO e 10 mA 0.5 V VCC e 10V, IO e 10 mA 1.0 V IIN(1) Logical ‘‘1’’ Input Current VCC e 15V, VIN e 15V IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e 0V ICC Supply Current VCC e 15V 0.005 b 1.0 1.0 b 0.005 0.05 mA mA 15 mA CMOS/LPTTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage VIN(0) Logical ‘‘0’’ Input Voltage VOUT(1) Logical ‘‘1’’ Output Voltage 54C, VCC e 4.5V VCC b 1.5 74C, VCC e 4.75V VCC b 1.5 V V 54C, VCC e 4.5V 74C, VCC e 4.75V VOUT(0) Logical ‘‘0’’ Output Voltage 0.8 V 0.8 V 54C, VCC e 4.5V, IO e b360 mA 2.4 V 74C, VCC e 4.75V, IO e b360 mA 2.4 V 54C, VCC e 4.5V, IO e 360 mA 0.4 V 74C, VCC e 4.75V, IO e 360 mA 0.4 V OUTPUT DRIVE (see 54C/74C Family Characteristics Data Sheet) TA e 25§ C (short circuit current) ISOURCE Output Source Current (P-Channel) VCC e 5.0V, VOUT e 0V ISOURCE Output Source Current (P-Channel) VCC e 10V, VOUT e 0V ISINK Output Sink Current (N-Channel) ISINK Output Sink Current (N-Channel) b 1.75 b 3.3 mA b 8.0 b 15 mA VCC e 5.0V, VOUT e VCC 1.75 3.6 mA VCC e 10V, VOUT e VCC 8.0 16 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. 2 AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise specified Symbol tpd Parameter Conditions Propagation Delay Time to Logical ‘‘1’’ or ‘‘0’’ Typ Max VCC e 5.0V Min 80 150 Units ns VCC e 10V 35 70 ns CIN Input Capacitance Any Input (Note 2) 5 pF CPD Power Dissipation Capacitance Per Gate (Note 3) 15 pF *AC Parameters are guaranteed by DC correlated testing. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application NoteÐAN-90. Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C32J or MM74C32J NS Package Number J14A 3 MM54C32/MM74C32 Quad 2-Input OR Gate Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM54C32N or MM74C32N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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