RT9605B Triple-Channel Synchronous-Rectified Buck MOSFET Driver General Description Features The RT9605B is a high frequency, triple-channel synchronous-rectified buck MOSFET driver specifically designed to drive six power N-MOSFETs. The part is promoted to pair with Richtek's multiphase buck PWM controller family for high-density power supply implementation. The output drivers of RT9605B can efficiently switch power MOSFETs at frequency 300kHz typically. Operating in higher frequency should consider the thermal dissipation carefully. Each driver of RT9605B is capable to drive a 3nF load in 30/40ns rising/falling time with little propagation delay from input transition to the gate of the power MOSFET. The device implements bootstrapping on the upper gate with only an external capacitor and a diode required. This reduces circuit complexity and allows the use of higher performance, cost effective N-MOSFETs. All drivers incorporate adaptive shoot-through protection to prevent upper and lower MOSFETs from conducting simultaneously and shorting the input supply. The RT9605B also detects the fault condition during initial start-up prior to the multi-phase PWM controller takes control. As a result, the input supply will latch into the shutdown state. The RT9605B comes to a small footprint package with VQFN-24L 4x4 package. z z z z z z z z z Drive Six N-MOSFETs for 3-Phase Buck PWM Control Adaptive Shoot-Through Protection Support High Switching Frequency Fast Output Rising/Falling Time Propagation Delay 40ns Tri-State Input for Bridge Shutdown Upper MOSFET Direct Short Protection Small 24-Lead VQFN Package RoHS Compliant and 100% Lead (Pb)-Free Applications z z z CPU Core Voltage Supplies on Motherboard High Frequency Low Profile DC/DC Converters High Current Low Voltage DC/DC Converters Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Pin Configurations PVCC2 LGATE2 PHASE2 23 22 21 20 19 1 18 GND BOOT1 2 17 UGATE2 16 BOOT2 15 PVCC3 NC 3 PWM1 4 PWM2 5 14 LGATE3 GND 6 13 GND ` RoHS compliant and compatible with the current require- 9 10 11 12 GND Richtek products are : 8 PHASE3 7 BOOT3 Note : UGATE3 GND PWM3 Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free) 24 UGATE1 VDD Package Type QV : VQFN-24L 4x4 (V-Type) PVCC1 RT9605B LGATE1 Ordering Information PHASE1 (TOP VIEW) ments of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. VQFN-24L 4x4 All brandname or trademark belong to their owner respectively DS9605B-03 March 2011 www.richtek.com 1 RT9605B Typical Application Circuit PHASE2 L1 0.5µH C16 3.3µF R19 2.2 12V VIN Q3 1µH D1 R7 13k R11 1.8k VID2 ISP3 PGOOD R13 4 27k 7 ISP2 15 14 4 10 8 12 Optional C5 1µF Optional Optional PHASE3 PVCC3 GND PHASE3 24 22 12V R22 0 C18 PHASE1 C7 1µF Q4 L2 0.5µH VCORE R26 0 Q9 D3 9 C22 1µF VIN 5VSB PHASE1 C19 1µF L3 0.5µH D2 VIN R27 2.2 11 12V 8 R23 10 23 C36 to C39 10µF x 4 Q8 C21 1µF 15 BOOT3 R21 0 Q7 PHASE3 C23 3.3nF R25 14 0 UGATE3 10 BOOT1 1 NC LGATE3 PWM1 C17 1µF R RICOMMON1 3 1µF R17 430 20 RT9605B PWM2 PHASE2 R C24 to C35 1000µF x 12 R20 0 PWM3 R R17 C6 1µF R15 16k Optional RICOMMON2 2 R16 11 12V R14 3k 5 ISP1 3.3V RT R12 10k R9 3.3k R10 5.1k 1 DACFB 9 DVD VID4 PWM2 GND ICOMMON VID3 R8 6.8k 7 BOOT2 PHASE1 27k VID1 16 PWM3 RT8800 2 DACQ 13 PWM1 R6 56k PI 16 VDD R5 6 FB VID0 RDROOP COMP R4 110k VID5 3 UGATE1 5 21 PHASE2 R3 3k C3 10nF 19 UGATE2 17 R1 15k 1µF 12V R18 0 VDD C4 4.7µF C15 C14 1µF LGATE2 C10 to C13 1500µF x 4 PVCC2 5VSB PVCC1 Optional C2 R2 C1 33pF LGATE1 C9 1µF C8 1000µF Q2 Q1 Q5 R24 2.2 C20 3.3nF Q6 VCORE Functional Pin Description UGATE1 (Pin 1), UGATE2 (Pin 17), UGATE3 (Pin 10) VDD (Pin 8) Upper Gate Drive Output. Should be connected to the upper MOSFET gate. Supply Input. Connect to +5V stand-by power. Place a bypass capacitor between this pin and GND. BOOT1 (Pin 2), BOOT2 (Pin 16), BOOT3 (Pin 9) PHASE1 (Pin 24), PHASE2 (Pin 19), PHASE3 (Pin 11) Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. Upper driver return. Should be connected to the common node of upper and lower MOSFETs. The PHASE voltage is monitored for adaptive shoot-through protection. LGATE1 (Pin 23), LGATE2 (Pin 20), LGATE3 (Pin 14) NC (Pin 3) No connected. Lower Gate Drive Output. Should be connected to the lower MOSFET gate. PWM1 (Pin 4), PWM2 (Pin 5), PWM3 (Pin 7) PVCC1 (Pin 22), PVCC2 (Pin 21), PVCC3 (Pin 15) PWM input control signal. Connect this pin to the PWM output of the controller. If the PWM signal enters and remains within the shutdown window, are both UGATE and LGATE are drived low, disabling the output MOSFETs. Supply Input. Connect to +12V supply. Place a bypass capacitor between this pin and PGND. GND (Pin 6, 12, 13, 18 ) Exposed Pad Exposed pad should be soldered to PCB board and connected to GND. Chip power ground. All brandname or trademark belong to their owner respectively www.richtek.com 2 DS9605B-03 March 2011 RT9605B Function Block Diagram BOOT1 VDD UGATE1 Short-Through Protection PHASE1 PWM1 PVCC1 LGATE1 GND BOOT2 VDD UGATE2 Control Logic PWM2 Short-Through Protection PHASE2 PVCC2 LGATE2 GND BOOT3 VDD UGATE3 Short-Through Protection PHASE3 PWM3 PVCC3 LGATE3 GND Timing Diagram PWM TRUGATE 90% UGATE 10% TPDUGATE TFUGATE 90% 10% 90% 90% LGATE 10% 10% TFLGATE TPDLGATE TRLGATE All brandname or trademark belong to their owner respectively DS9605B-03 March 2011 www.richtek.com 3 RT9605B Absolute Maximum Ratings z z z z z z z z z z z z (Note 1) Driver Supply Voltage, PVCC ---------------------------------------------------------------------- −0.3V to 15V Core Supply Voltage, VDD ------------------------------------------------------------------------- −0.3V to 7V BOOT to PHASE ------------------------------------------------------------------------------------- −0.3V to 15V PHASE to GND DC -------------------------------------------------------------------------------------------------------- −5V to 15V < 20ns --------------------------------------------------------------------------------------------------- −10V to 30V LGATE DC -------------------------------------------------------------------------------------------------------- (GND − 0.3V) to (VPVCC + 0.3V) < 20ns --------------------------------------------------------------------------------------------------- −2V to (VPVCC + 0.3V) UGATE DC -------------------------------------------------------------------------------------------------------- (VPHASE − 0.3V) to (VBOOT + 0.3V) < 20ns --------------------------------------------------------------------------------------------------- (VPHASE − 2V) to (VBOOT + 0.3V) PWM Input Voltage ---------------------------------------------------------------------------------- (GND − 0.3V) to 7V Package Thermal Resistance (Note 2) VQFN-24L 4x4, θJA ---------------------------------------------------------------------------------- 67°C/W Junction Temperature -------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------- 260°C Storage Temperature Range ----------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Mode) ------------------------------------------------------------------------- 2kV MM (Machine Mode) --------------------------------------------------------------------------------- 150V Recommended Operating Conditions z z z z (Note 4) Driver Supply Voltage, PVCC ---------------------------------------------------------------------- 12V ±10% Core Supply Voltage, VDD ------------------------------------------------------------------------- 5V ±10% Junction Temperature Range ----------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ----------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (Recommended Operating Conditions, TA = 25°C unless otherwise specified) Parameter VDD Supply Current Operation Current Symbol IVDD Test Conditions Min Typ Max Unit -- -- 10 mA 7.2 8 8.8 V -- 1.1 -- V VDD Rising 3.7 4 4.3 V VPWM_IN = 0V 500 600 700 VPWM_IN = 5V 200 350 500 1.4 1.8 2.2 Frequency = 250kHz Power On Reset PVCC POR Threshold VPVCC Rising PVCC Hysteresis VDD Threshold PWM Input Input Current Floating Voltage I PWM VPWMFL μA V To be continued All brandname or trademark belong to their owner respectively www.richtek.com 4 DS9605B-03 March 2011 RT9605B Parameter Symbol Test Conditions Min Typ Max Unit VPWMRTH PWM_IN Rising 2.7 3.1 3.5 V VPWMFTH PWM_IN Falling 0.8 1 1.3 V UGATE Rise Time t RUGATE PVCC = 12V, 3nF load -- 80 -- ns UGATE Fall Time t FUGATE PVCC = 12V, 3nF load -- 40 -- ns LGATE Rise Time t RLGATE PVCC = 12V, 3nF load -- 40 -- ns LGATE Fall Time t FLGATE PVCC = 12V, 3nF load -- 25 -- ns 30 -- ns PWM Threshold Output UGATE Turn-Off Propagation Delay t PDUGATE PVCC = 12V, 3nF load -- LGATE Turn-Off Propagation Delay t PDLGATE PVCC = 12V, 3nF load -- 25 -- ns 0.8 -- 3.5 V Shutdown Window Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution recommended. Note 4. The device is not guaranteed to function outside its operating conditions. All brandname or trademark belong to their owner respectively DS9605B-03 March 2011 www.richtek.com 5 RT9605B Typical Operating Characteristics VIN = 12V, unless otherwise specified. Dead Time Dead Time Phase 1, Falling VOUT = 1.4V, IOUT = 0A UGATE (5V/Div) Phase 1, Falling VOUT = 1.4V, IOUT = 30A UGATE (5V/Div) PHASE (5V/Div) PHASE (5V/Div) LGATE (5V/Div) LGATE (5V/Div) Time (50ns/Div) Time (50ns/Div) Dead Time Dead Time Phase 1, Rising VOUT = 1.4V, IOUT = 0A UGATE (5V/Div) Phase 1, Rising VOUT = 1.4V, IOUT = 30A UGATE (5V/Div) PHASE (5V/Div) PHASE (5V/Div) LGATE (5V/Div) UGATE (5V/Div) LGATE (5V/Div) Time (50ns/Div) Time (50ns/Div) Dead Time Dead Time Phase 2, Falling VOUT = 1.4V, IOUT = 0A PHASE (5V/Div) Phase 2, Falling VOUT = 1.4V, IOUT = 30A UGATE (5V/Div) PHASE (5V/Div) LGATE (5V/Div) LGATE (5V/Div) Time (50ns/Div) Time (50ns/Div) All brandname or trademark belong to their owner respectively www.richtek.com 6 DS9605B-03 March 2011 RT9605B Dead Time Dead Time Phase 2, Rising VOUT = 1.4V, IOUT = 0A UGATE (5V/Div) Phase 2, Rising VOUT = 1.4V, IOUT = 30A UGATE (5V/Div) PHASE (5V/Div) PHASE (5V/Div) LGATE (5V/Div) LGATE (5V/Div) Time (50ns/Div) Time (50ns/Div) Dead Time Dead Time Phase 3, Falling VOUT = 1.4V, IOUT = 0A UGATE (5V/Div) Phase 3, Falling VOUT = 1.4V, IOUT = 30A UGATE (5V/Div) PHASE (5V/Div) PHASE (5V/Div) LGATE (5V/Div) LGATE (5V/Div) Time (50ns/Div) Time (50ns/Div) Dead Time Dead Time Phase 3, Rising VOUT = 1.4V, IOUT = 0A UGATE (5V/Div) Phase 3, Rising VOUT = 1.4V, IOUT = 30A UGATE (5V/Div) PHASE (5V/Div) PHASE (5V/Div) LGATE (5V/Div) LGATE (5V/Div) Time (50ns/Div) Time (50ns/Div) All brandname or trademark belong to their owner respectively DS9605B-03 March 2011 www.richtek.com 7 RT9605B Power On Power On VOUT = 1.4V, IOUT = 0A VOUT (2V/Div) VOUT = 1.4V, IOUT = 90A VOUT (2V/Div) VIN (10V/Div) VIN (10V/Div) UGATE (20V/Div) UGATE (20V/Div) LGATE (10V/Div) LGATE (10V/Div) Time (2.5ms/Div) Time (2.5ms/Div) Power Off Power Off VOUT = 1.4V, IOUT = 0A VOUT = 1.4V, IOUT = 90A VOUT (2V/Div) VOUT (2V/Div) VIN (10V/Div) VIN (10V/Div) UGATE (20V/Div) UGATE (20V/Div) LGATE (10V/Div) LGATE (10V/Div) Time (25ms/Div) Time (25ms/Div) Efficiency vs. Output Curreent 90% 90 VIN = 12V, f = 300kHz VOUT = 1.45V Efficiency (%) 88% 88 86% 86 84% 84 82% 82 80 80% 78 78% 76 76% 0 10 20 30 40 50 60 70 80 90 100 Output Curreent (A) All brandname or trademark belong to their owner respectively www.richtek.com 8 DS9605B-03 March 2011 RT9605B Application Information The RT9605B is designed to drive three sets of both high side and low side N-MOSFET through externally input PWM control signal. It has power-on protection function which held UGATE and LGATE low before PVCC rising across the threshold voltage. After the initialization, the PWM signal takes the control. The rising PWM signal first forces the LGATE turns low then UGATE is allowed to go high just after a non-overlapping time to avoid shootthrough. The falling of PWM signal first forces UGATE to go low. When UGATE and PHASE reach a predetermined low level, LGATE is allowed to turn high. The nonoverlapping function is also presented between UGATE and LGATE signal transient. The PWM signal is acted as "High" if above the rising threshold and acted as "Low" if below the falling threshold. Any signal level remaining within the shutdown window is considered as "tri-state", the output drivers are disabled and both MOSFET gates are pulled and held low. If the PWM signal floating, the pin will be kept at 2.1V by the internal divider and provide the PWM controller with a recognizable level. The RT9605B typically operates at frequency of 200kHz to 300kHz. It shall be noted that to place a 1N4148 or schottky diode between the PVCC and BOOT pin as shown in the typical application circuit. Driving Power MOSFETs The DC input impedance of the power MOSFET is extremely high. When Vgs at 12V, the gate draws the current only few nano-amperes. Thus once the gate has been driven up to "ON" level, the current could be negligible. However, the capacitance at the gate to source terminal should be considered. It requires relatively large current to source and sink the gate rapidly. It also needs to switch drain current on and off with high speed. The required gate drive currents are calculated as follows. D1 d1 L s1 VIN VOUT Cgs1 Cgd1 Igs1 Igd1 Ig1 Cgd2 d2 Ig2 Igd2 g1 g2 D2 Igs2 Cgs2 s2 GND Vg1 VPHASE +12V t Vg2 12V t Figure 1. Equivalent Circuit and Associated Waveforms In Figure 1, the current Ig1 and Ig2 are required to move the gate up to 12V. The operation consists of charging Cgd and Cgs. Cgs1 and Cgs2 are the capacitances from gate to source of the high side and the low side power MOSFETs, respectively. In general data sheets, the Cgs is referred as "Ciss" which is the input capacitance. Cgd1 and Cgd2 are the capacitances from gate to drain of the high side and the low side power MOSFETs, respectively and referred to the data sheets as "C rss " the reverse transfer capacitance. For example, tr1 and tr2 are the rising time of the high side and the low side power MOSFETs respectively, the required current Igs1 and Igs2 are showed , below : dVg1 C gs1 × 12 (1) = Igs1 = C gs1 dt t r1 Igs2 = C gs2 dVg2 C gs2 × 12 = dt t r2 (2) All brandname or trademark belong to their owner respectively DS9605B-03 March 2011 www.richtek.com 9 RT9605B Before driving the gate of the high side MOSFET up to 12V (or 5V), the low side MOSFET has to be off; and the high side MOSFET is turned off before the low side is turned on. From Figure 1, the body diode "D2" had been turned on before high side MOSFETs turned on. Igd1 = C gd1 dV = C gd1 12V dt t r1 (3) Select the Bootstrap Capacitor Figure 2 shows part of the bootstrap circuit of RT9605B. The VCB (the voltage difference between BOOT and PHASE pins provides a voltage to the gate of the high side power MOSFET. This supply needs to be ensured that the MOSFET can be driven. For this, the capacitance CB has to be selected properly. It is determined by following constraints. Before the low side MOSFET is turned on, the Cgd2 have been charged to VIN. Thus, as Cgd2 reverses its polarity and g2 is charged up to 12V, the required current is 1N4148 VIN BOOT V × 12 Igd2 = C gd2 dV = C gd2 IN dt t r2 PHASE It is helpful to calculate these currents in a typical case. Assume a synchronous rectified buck converter, input voltage VIN = 12V, Vg1 = Vg2 = 12V. The high side MOSFET is PHB83N03LT whose C iss = 1660pF, Crss = 380pF, and tr = 14ns. The low side MOSFET is PHB95N03LT whose Ciss = 2200pF, Crss = 500pF and tr = 30ns, from the equation (1) and (2) we can obtain Igs1 = 1660 × 10 × 12 = 1.428 (A) 14 × 10 -9 (5) -12 Igs2 = 2200 × 10 × 12 = 0.88 (A) 30 × 10 -9 (6) -12 from equation. (3) and (4) -12 Igd1 = 380 × 10 × 12 = 0.326 (A) 14 × 10 -9 Igd2 = 500 × 10 -12 × (12 + 12) 30 × 10 -9 (7) = 0.4 (A) (8) the total current required from the gate driving source is Ig1 = Igs1 + Igd1 = (1.428 + 0.326) = 1.745 (A) Ig2 = Igs2 + Igd2 = (0.88 + 0.4) = 1.28 UGATE (4) (A) (9) (10) CB + VCB - LGATE GND Figure 2. Part of Bootstrap Circuit of RT9605B In practice, a low value capacitor CB will lead the overcharging that could damage the IC. Therefore to minimize the risk of overcharging and reducing the ripple on VCB, the bootstrap capacitor should not be smaller than 0.1μF, and the larger the better. In general design, using 1μF can provide better performance. At least one low-ESR capacitor should be used to provide good local de-coupling. Here, to adopt either a ceramic or tantalum capacitor is suitable. Power Dissipation For not exceeding the maximum allowable power dissipation to drive the IC beyond the maximum recommended operating junction temperature of 125°C, it is necessary to calculate power dissipation appropriately. This dissipation is a function of switching frequency and total gate charge of the selected MOSFET. Figure 3 shows the power dissipation test circuit. CL and C U are the UGATE and LGATE load capacitors, respectively. The bootstrap capacitor value is 1μF. By a similar calculation, we can also get the sink current required from the turned off MOSFET. All brandname or trademark belong to their owner respectively www.richtek.com 10 DS9605B-03 March 2011 RT9605B 1µF CBOOTx 1N4148 10 Over Voltage Protection Function at Power On 12V 12V BOOTX VDD 2N7002 UGATEX CU 3nF 1µF RT9605B PHASEX 2N7002 PWM PWMX An unique feature of the RT9605B is the addition of over voltage protection in the event of upper MOSFET direct shorted before power on. The RT9605B detects the fault condition during initial start-up, the internal power on OVP sense circuitry will rapidly drive the low side MOSFET on before the multi-phase PWM controller takes control. 20 LGATEX GND CL 3nF Figure 5 shows the measured waveforms with the high side MOSFET directly shorted to 12V. Figure 3. Test Circuit (One Phase is Shown) Figure 4 shows the power dissipation of the RT9605B as a function of frequency and load capacitance. The value of the CU and CL are the same and the frequency is varied PHASEX The operating junction temperature can be calculated from the power dissipation curves (Figure 4). Assume VDD = 12V, operating frequency is 200kHz and the CU=CL=1nF which emulate the input capacitances of the high side and low side power MOSFETs. From Figure 4, the power dissipation is 100mW. For RT9605B, the package thermal resistance θJA is 67°C/W, the operating junction temperature is calculated as : TJ = (67°C/W x 100mW) + 25°C = 31.7°C (11) where the ambient temperature is 25°C. The method to improve the thermal transfer is to increase the PC board copper area around the RT9605B firstly. Then, adding a ground pad under IC to transfer the heat to the peripheral of the board. Power Dissipation vs. Frequency 1000 LGATEX VCORE Figure 5. Waveforms at High Side MOSFET Shorted Please note that the +12V trigger point to RT9605B is at 3V, and the clamped level on PHASE pin is at about 2.4V. Obviously since the PHASE pin voltage increases during initial start-up, the VCORE increases correspondingly, but it would quickly drop-off following the voltage in LGATE and +12V. Layout Consideration Figure 6 shows the schematic circuit of a two-phase synchronous buck converter to implement the either phase of RT9605B. The converter operates at VIN 12V. R1 10 CU=CL=3nF 900 12V 800 C4 1µF L1 1.2µH 700 600 D1 + VIN 12V C2 1µF C1 1000µF 500 CU=CL=2nF 400 CB 1µF 300 Q1 L2 CU=CL=1nF 200 UGATEX VCORE 100 + 0 0 200 400 600 800 1000 C3 1500µF 2µH PHB83N03LT Q2 Frequency (kHz) Figure 4. Power Dissipation vs. Frequency BOOTX PVCCX PHB95N03LT PHASEX LGATEX PWMX PWM RT9605B from 100kHz to 1MHz. Power Dissipation (mW) +12V GND Figure 6. Sync. Buck Converter Circuit All brandname or trademark belong to their owner respectively DS9605B-03 March 2011 www.richtek.com 11 RT9605B When layout the PC board, it should be very careful. The power-circuit section is the most critical one. If not configured properly, it will generate a large amount of EMI. The junction of Q1, Q2, L2 should be very close. Next, the trace from UGATE, and LGATE to the gates of MOSFET should also be short to decrease the noise of the driver output signals. The bypass capacitor C4 should be connected to GND directly. Furthermore, the bootstrap capacitors (CB) should always be placed as close to the pins of the IC as possible. The trace from PHASE to the common node of the two MOSFETs should be kept wide since it usually carries large current. All brandname or trademark belong to their owner respectively www.richtek.com 12 DS9605B-03 March 2011 RT9605B Outline Dimension D2 D SEE DETAIL A L 1 E E2 e b 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A A3 A1 Symbol 1 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Min Dimensions In Inches Max Min Max A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 3.950 4.050 0.156 0.159 D2 2.300 2.750 0.091 0.108 E 3.950 4.050 0.156 0.159 E2 2.300 2.750 0.091 0.108 e L 0.500 0.350 0.020 0.450 0.014 0.018 V-Type 24L QFN 4x4 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. DS9605B-03 March 2011 www.richtek.com 13