TI LMR61428XMMX-NOPB

LMR61428
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SNVS815 – JUNE 2012
LMR61428 SIMPLE SWITCHER® 14Vout, 2.85A Step-Up Voltage Regulator in MSOP
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FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
1
2
1.2V to 14V Input Voltage
Adjustable Output Voltage up to 14V
Switch current up to 2.85A
Up to 2 MHz Switching Frequency
Low shutdown Iq, <1µA
Cycle by cycle current limitting
MSOP-8 packaging (3.0 x 5.0 x 1.09mm)
WEBENCH® enabled
•
•
•
Boost/SEPIC conversions from 3.3V, 5V, and
12V
Space constrained applications
LCD displayed
LED applications
DESCRIPTION
The LMR61428 is a step-up DC-DC switching regulator for battery-powered and low input voltage systems that
can achieve efficiencies up to 90%. It has a wide input voltage range from 1.2V to 14V and a possible regulated
output voltage range of 1.24V to 14V. It has an internal 0.17Ω N-Channel MOSFET power switch.
The high switching frequency of up to 2MHz of the LMR61428 allows for tiny surface mount inductors and
capacitors. Because of the unique constant-duty-cycle gated oscillator topology very high efficiencies are realized
over a wide load range. The supply current is reduced to 80µA because of the BiCMOS process technology. In
the shutdown mode, the supply current is less than 2.5µA.
The LMR61428 is available in a Mini-SO-8 package. This package uses half the board area of a standard 8-pin
SO and has a height of just 1.09 mm.
Performance Benefits
•
•
Extremely easy to use
Tiny overall solution reduces system cost
System Performance
Figure 1. Efficiency vs Load Current, VOUT = 5V
84
82
EFFICIENCY (%)
80
78
76
74
72
Vin = 3.0V
Vin = 3.2V
Vin = 3.4V
Vin = 3.6V
Vin = 3.8V
Vin = 4.0V
70
68
66
64
0.00
0.09
0.18
0.27 0.36
IOUT(A)
0.45
0.54
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
LMR61428
SNVS815 – JUNE 2012
www.ti.com
Figure 2. Efficiency vs Load Current, VOUT = 3.3V
80
77
EFFICIENCY (%)
74
71
68
65
62
59
Vin = 2.0V
Vin = 2.2V
Vin = 2.5V
Vin = 2.80
56
53
50
0.00
0.04
0.08
0.12
IOUT(A)
0.16
0.20
Typical Application Circuit
Connection Diagram
Mini SO-8 (MM) Package
Figure 3. Top View
Pin Functions
Pin Description
Pin
2
Name
Function
1
PGND
Power Ground
2
EN
Active-Low Shutdown Input
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Pin Description (continued)
Pin
Name
Function
3
FREQ
Frequency Adjust. An external resistor connected between this pin and Pin 6 (VDD) sets the switching
frequency of the LMR61428.
4
FB
Output Voltage Feedback
5
SGND
Signal Ground
6
VDD
Power Supply for Internal Circuitry
7
BOOT
Bootstrap Supply for the Gate Drive of Internal MOSFET Power Switch
8
SW
Drain of the Internal MOSFET Power Switch
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)
−0.5 V to 14.5V
SW Pin Voltage
−0.5V to 10V
BOOT, VDD, EN and FB Pins
FREQ Pin
100µA
θJA (2)
240°C/W
TJmax (2)
150°C
−65°C to +150°C
Storage Temperature Range
Lead Temp. (Soldering, 5 sec)
Power Dissipation (TA=25°C)
ESD Rating
(1)
(2)
(3)
260°C
(2)
500mW
(3)
2kV
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device outside of its rated operating conditions.
The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature),
θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any
temperature is Pdmax = (Tjmax - TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower.
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. For Pin 8 (SW) the ESD rating is 1.5
kV.
Operating Conditions
(1)
VDD Pin
2.5V to 5V
FB, EN Pins
0 to VDD
BOOT Pin
0 to 10V
−40°C to +85°C
Ambient Temperature (TA)
(1)
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device outside of its rated operating conditions.
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Electrical Characteristics
Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range of
−40°C to +85°C. Unless otherwise specified: VDD= VOUT= 3.3V.
Typ
Max
Units
VIN_ST
Symbol
Minimum Start-Up Supply Voltage ILOAD = 0mA
Parameter
Condition
Min
1.1
1.2
V
VIN_OP
Minimum Operating Supply
Voltage (once started)
0.65
VFB
FB Pin Voltage
VOUT_MAX
Maximum Output Voltage
VHYST
Hysteresis Voltage
η
Efficiency
(1)
ILOAD = 0mA
1.2028
1.24
V
1.2772
V
45
mV
14
(2)
At Feedback Pin
30
VIN = 3.6V;VOUT = 5V;ILOAD = 0.5A
87
VIN = 2.5V;VOUT = 3.3V;ILOAD = 0.2A
87
60
V
%
D
Switch Duty Cycle
IDD
Operating Quiescent Current
(3)
FB Pin > 1.3V; EN Pin at VDD
70
80
%
80
110
µA
ISD
Shutdown Quiescent Current
(4)
VDD, BOOT and SW Pins at 5.0V;
EN Pin <200mV
0.01
2.5
ICL
Switch Peak Current Limit
2.85
A
RDS_ON
MOSFET Switch On Resistance
0.17
Ω
µA
Enable Section
VEN_LO
EN Pin Voltage Low
(5)
VEN_HI
EN Pin Voltage High
(5)
(1)
(2)
(3)
(4)
(5)
4
0.15VDD
0.7VDD
V
V
Output in regulation, VOUT = VOUT (NOMINAL) ± 5%
This is the hysteresis value of the internal comparator used for the gated-oscillator control scheme.
This is the current into the VDD pin.
This is the total current into pins VDD, BOOT, SW and FREQ.
When the EN pin is below VEN_LO, the regulator is shut down; when it is above VEN_HI, the regulator is operating.
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Typical Performance Characteristics
All curves taken at TA = 25°C, unless specified otherwise.
Efficiency
vs
Load Current
VOUT = 3.3V
84
80
82
77
80
74
78
EFFICIENCY (%)
EFFICIENCY (%)
Efficiency
vs
Load Current
VOUT = 5.0V
76
74
72
Vin = 3.0V
Vin = 3.2V
Vin = 3.4V
Vin = 3.6V
Vin = 3.8V
Vin = 4.0V
70
68
66
64
0.00
0.09
0.18
0.27 0.36
IOUT(A)
0.45
71
68
65
62
59
Vin = 2.0V
Vin = 2.2V
Vin = 2.5V
Vin = 2.80
56
53
0.54
VFB
vs
Temperature
50
0.00
0.04
0.08
0.12
IOUT(A)
0.16
0.20
IOP
vs
Temperature
ISD
vs
Temperature, VDD = 5V
ISD
vs
VDD
IOP
vs
VDD
VIN_ST
vs
Load Current
VOUT = 3.3V
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Switching Frequency
vs
RFQ
Peak Inductor Current vs
Load Current
Minimum Input Voltage vs
Load Current
Steady State Operation
VSW
5V/Div
VOUT = 5V
50 mV/Div
10 Ps/DIV
Simplified Block Diagram
Figure 4. Block Diagram
6
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Detailed Description
OPERATING PRINCIPLE
The LMR61428 is designed to provide step-up DC-DC voltage regulation in battery-powered and low-input
voltage systems. It combines a step-up switching regulator, N-channel power MOSFET, built-in current limit,
thermal limit, and voltage reference in a single 8-pin MSOP package. The switching DC-DC regulator boosts an
input voltage between 1.2V and 14V to a regulated output voltage between 1.24V and 14V that is limited by a
fixed maximum duty cylcle of 70%. The LMR61428 starts from a low 1.1V input and remains operational down to
0.65V.
This device is optimized for use in cellular phones and other applications requiring a small size, low profile, as
well as low quiescent current for maximum battery life during stand-by and shutdown. A high-efficiency gatedoscillator topology offers an output of up to 1A.
Additional features include a built-in peak switch current limit, and thermal protection circuitry.
GATED OSCILLATOR CONTROL SCHEME
A unique gated oscillator control scheme enables the LMR61428 to have an ultra-low quiescent current and
provides a high efficiency over a wide load range. The switching frequency of the internal oscillator is
programmable using an external resistor and can be set between 300 kHz and 2 MHz.
This control scheme uses a hysteresis window to regulate the output voltage. When the output voltage is below
the upper threshold of the window, the LMR61428 switches continuously with a fixed duty cycle of 70% at the
switching frequency selected by the user. During the first part of each switching cycle, the internal N-channel
MOSFET switch is turned on. This causes the current to ramp up in the inductor and store energy. During the
second part of each switching cycle, the MOSFET is turned off. The voltage across the inductor reverses and
forces current through the diode to the output filter capacitor and the load. Thus when the LMR61428 switches
continuously, the output voltage starts to ramp up. When the output voltage hits the upper threshold of the
window, the LMR61428 stops switching completely. This causes the output voltage to droop because the energy
stored in the output capacitor is depleted by the load. When the output voltage hits the lower threshold of the
hysteresis window, the LMR61428 starts switching continuously again causing the output voltage to ramp up
towards the upper threshold. Figure 5 shows the switch voltage and output voltage waveforms.
Because of this type of control scheme, the quiescent current is inherently very low. At light loads the gated
oscillator control scheme offers a much higher efficiency compared to the conventional PWM control scheme.
Figure 5. Typical Step-Up Regulator Waveforms
LOW VOLTAGE START-UP
The LMR61428 can start-up from input voltages as low as 1.1V. On start-up, the control circuitry switches the Nchannel MOSFET continuously at 70% duty cycle until the output voltage reaches 2.5V. After this output voltage
is reached, the normal step-up regulator feedback and gated oscillator control scheme take over. Once the
device is in regulation it can operate down to a 0.65V input, since the internal power for the IC can be bootstrapped from the output using the VDD pin.
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SHUTDOWN
The LMR61428 features a shutdown mode that reduces the quiescent current to less than a guaranteed 2.5µA
over temperature. This extends the life of the battery in battery powered applications. During shutdown, all
feedback and control circuitry is turned off. The regulator's output voltage drops to one diode drop below the
input voltage. Entry into the shutdown mode is controlled by the active-low logic input pin EN (Pin 2). When the
logic input to this pin pulled below 0.15VDD, the device goes into shutdown mode. The logic input to this pin
should be above 0.7VDD for the device to work in normal step-up mode.
OUTPUT VOLTAGE RIPPLE FREQUENCY
A major component of the output voltage ripple is due to the hysteresis used in the gated oscillator control
scheme. The frequency of this voltage ripple is proportional to the load current. The frequency of this ripple does
not necessitate the use of larger inductors and capacitors. The size of these components is determined by the
switching frequency of the oscillator which can be set upto 2MHz using an external resistor.
INTERNAL CURRENT LIMIT AND THERMAL PROTECTION
An internal cycle-by-cycle current limit serves as a protection feature. This is set high enough (2.85A typical,
approximately 4A maximum) so as not to come into effect during normal operating conditions. An internal thermal
protection circuitry disables the MOSFET power switch when the junction temperature (TJ) exceeds about 160°C.
The switch is re-enabled when TJ drops below approximately 135°C.
Design Procedure
SETTING THE OUTPUT VOLTAGE
The output voltage of the step-up regulator can be set between 1.24V and 14V. But because of the gated
oscillator scheme, the maximum possible input to output boost ratio is fixed. For a boost regulator,
VOUT / VIN = 1 / [1−D]
(1)
The LMR61428 has a fixed duty cycle, D, of 70% typical. Therefore,
VOUT / VIN = 1 / 0.3
(2)
This sets the maximum possible boost ratio of VIN to VOUT to about 3 times. The user can now estimate what the
minimum design inputs should be in order to achieve a desired output, or what the output would be when a
certain minimum input is applied. E.g. If the desired VOUT was 14V, then the least VIN should be higher than VOUT
/ 3. If the input voltage fell below this threshold, the output voltage would not be regulated because of the fixed
duty cycle. If the minimum VIN was guaranteed at 2V, the max possible VOUT would be VIN * 3.
The VOUT is set by connecting a feedback resistive divider made of RF1 and RF2. The feedback resistor values
are selected as follows:
RF2 = RF1 /[(VOUT/ 1.24) −1]
(3)
A value of 150kΩ is suggested for RF1. Then, RF2 can be selected using the above equation. A 39pF capacitor
(Cff) connected across RF1 helps in feeding back most of the AC ripple at VOUT to the FB pin. This helps reduce
the peak-to-peak output voltage ripple as well as improve the efficiency of the step-up regulator, because a set
hysteresis of 30mV at the FB pin is used for the gated oscillator control scheme.
BOOTSTRAPPING
When the output voltage (VOUT) is between 2.5V and 5.0V a bootstrapped operation is suggested. This is
achieved by connecting the VDD pin (Pin 6) to VOUT. However if the VOUT is outside this range, the VDD pin should
be connected to a voltage source whose range is between 2.5V and 5V. This can be the input voltage (VIN), VOUT
stepped down using a linear regulator, or a different voltage source available in the system. This is referred to as
non-bootstrapped operation. The maximum acceptable voltage at the BOOT pin (Pin 7) is 10V.
SETTING THE SWITCHING FREQUENCY
The switching frequency of the oscillator is selected by choosing an external resistor (RFQ) connected between
FREQ and VDD pins. See the following graph for choosing the RFQ value to achieve the desired switching
frequency. A high switching frequency allows the use of very small surface mount inductors and capacitors and
results in a very small solution size. A switching frequency between 300kHz and 2MHz is recommended.
8
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Figure 6. Switching Frequency
vs
RFQ
INDUCTOR SELECTION
The LMR61428's high switching frequency enables the use of a small surface mount inductor. A 6.8µH shielded
inductor is suggested for a typical application. The inductor should have a saturation current rating higher than
the peak current it will experience during circuit operation (see following graph). Less than 100mΩ ESR is
suggested for high efficiency.
Figure 7. Peak Inductor Current vs
Load Current
Open-core inductors cause flux linkage with circuit components and interfere with the normal operation of the
circuit. They should be avoided. For high efficiency, choose an inductor with a high frequency core material, such
as ferrite, to reduce the core losses. To minimize radiated noise, use a toroid, pot core or shielded core inductor.
The inductor should be connected to the SW pin as close to the IC as possible. See
OUTPUT DIODE SELECTION
A Schottky diode should be used for the output diode. The forward current rating of the diode should be higher
than the load current, and the reverse voltage rating must be higher than the output voltage. Do not use ordinary
rectifier diodes, since slow switching speeds and long recovery times cause the efficiency and the load regulation
to suffer.
INPUT AND OUTPUT FILTER CAPACITORS SELECTION
While tantalum chip capacitors are recommended for the input and output filter capacitors, ceramic caps can also
be used. A 22µF capacitor is suggested for the input filter capacitor. It should have a DC working voltage rating
higher than the maximum input voltage. A 68µF tantalum capacitor is suggested for the output capacitor. The DC
working voltage rating should be greater than the output voltage. Very high ESR values (>3Ω) should be avoided.
PC BOARD LAYOUT
High switching frequencies and high peak currents make a proper layout of the PC board an important part of
design. Poor design can cause excessive EMI and ground-bounce, both of which can cause malfunction and loss
of regulation by corrupting voltage feedback signal and injecting noise into the control section.
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Power components - such as the inductor, input and output filter capacitors, and output diode - should be placed
as close to the regulator IC as possible, and their traces should be kept short, direct and wide. The ground pins
of the input and output filter capacitors and the PGND and SGND pins of LMR61428 should be connected using
short, direct and wide traces. The voltage feedback network (Rfbt, Rfbb, and Cff) should be kept very close to the
FB pin. Noisy traces, such as from the SW pin, should be kept away from the FB and VDD pins. The traces that
run between Vout and the FB pin of the IC should be kept away from the inductor flux. Always provide sufficient
copper area to dissipate the heat due to power loss in the circuitry and prevent the thermal protection circuitry in
the IC from shutting the IC down. Additional ground planes as intermediate levels help with shielding and
improve EMI mitigation.
Application Examples
Figure 8. EXAMPLE 1. 5V/0.5A Step-Up Regulator
U1
Texas Instruments
LMR61428XMM
C1
Vishay/Sprague
595D226X06R3B2T, Tantalum
C2
Vishay/Sprague
595D686X0010C2T, Tantalum
D1
Motorola
MBRS140T3
L
Coilcraft
DT1608C-682
Figure 9. EXAMPLE 2. 2mm Tall 5V/0.2A Step-Up Regulator for Low Profile Applications
10
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U1
Texas Instruments
LMR61428XMM
C1
Vishay/Sprague
592D156X06R3B2T, Tantalum
C2
Vishay/Sprague
592D336X06R3C2T, Tantalum
D1
Motorola
MBRS140T3
L
Vishay/Dale
ILS-3825-03
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PACKAGE OPTION ADDENDUM
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17-Nov-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Samples
(3)
(Requires Login)
LMR61428XMM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LMR61428XMMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMR61428XMM/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMR61428XMMX/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMR61428XMM/NOPB
VSSOP
DGK
8
1000
203.0
190.0
41.0
LMR61428XMMX/NOPB
VSSOP
DGK
8
3500
349.0
337.0
45.0
Pack Materials-Page 2
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