AOZ1232-01 28V/6A Synchronous EZBuckTM Regulator General Description Features The AOZ1232-01 is a high-efficiency, easy-to-use DC/DC synchronous buck regulator that operates up to 28V. The device is capable of supplying 6A of continuous output current with an output voltage adjustable down to 0.8V (±1.0%). Wide input voltage range The AOZ1232-01 integrates an internal linear regulator to generate 5.3V VCC from input. If input voltage is lower than 5.3V, the linear regulator operates at low dropoutput mode, which allows the VCC voltage is equal to input voltage minus the drop-output voltage of the internal linear regulator. A proprietary constant on-time PWM control with input feed-forward results in ultra-fast transient response while maintaining relatively constant switching frequency over the entire input voltage range. The switching frequency can be externally programmed up to 1MHz. – 2.7V to 28V 6A continuous output current Output voltage adjustable down to 0.8V (±1.0%) Low RDS(ON) internal NFETs – 35m high-side – 12m low-side SRFET™ Constant On-Time with input feed-forward Programmable frequency up to 1MHz Internal 5.3V/20mA linear regulator Ceramic capacitor stable Adjustable soft start Power Good output Integrated bootstrap diode Cycle-by-cycle current limit The device features multiple protection functions such as VCC under-voltage lockout, cycle-by-current limit, output over-voltage protection, short-circuit protection, as well as thermal shutdown. Short-circuit protection The AOZ1232-01 is available in a 5mm x 5mm QFN-30L package and is rated over a -40°C to +85°C ambient temperature range. Applications Thermal shutdown Thermally enhanced 5mm x 5mm QFN-30L package Portable computers Compact desktop PCs Servers Graphics cards Set-top boxes LCD TVs Cable modems Point-of-load DC/DC converters Telecom/Networking/Datacom equipment Rev. 1.3 October 2012 www.aosmd.com Page 1 of 18 AOZ1232-01 Typical Application for VIN = 12V or above Input = 12V or above IN C2 22μF RTON AIN TON BST VCC R3 100kΩ Power Good C4 1μF AOZ1232-01 C5 0.1μF Output LX PGOOD L1 R1 Off On EN FB R2 C3 100μF AGND SS CSS PGND Analog Ground Power Ground Typical Application for VIN = 5V Input = 5V IN C2 22μF RTON AIN TON BST VCC R3 100kΩ Power Good C4 1μF AOZ1232-01 C5 0.1μF Output LX PGOOD L1 R1 Off On EN FB R2 SS C3 100μF AGND CSS PGND Analog Ground Power Ground Rev. 1.3 October 2012 www.aosmd.com Page 2 of 18 AOZ1232-01 Typical Application for High Light Load Efficiency Requirement or VIN = 2.7V ~ 6.5V Input IN C2 22μF 5V R3 100kΩ Power Good RTON AIN TON BST VCC C4 1μF AOZ1232-01 C5 0.1μF Output LX PGOOD L1 R1 Off On EN FB R2 C3 100μF AGND SS CSS PGND Analog Ground Power Ground Ordering Information Part Number Ambient Temperature Range Package Environmental AOZ1232QI-01 -40°C to +85°C 30-Pin 5mm x 5mm QFN Green Product AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information. Rev. 1.3 October 2012 www.aosmd.com Page 3 of 18 AOZ1232-01 SS AGND VCC BST PGND LX LX LX Pin Configuration 30 29 28 27 26 25 24 23 PGOOD 1 22 LX EN 2 21 LX PFM 3 20 LX AGND 4 19 PGND FB 5 18 PGND 17 PGND 16 PGND 15 PGND 10 11 12 13 14 PGND 9 PGND IN 8 PGND 7 IN AIN IN IN 6 LX IN TON AGND 30-pin 5mm x 5mm QFN (Top View) Pin Description Pin Number Pin Name Pin Function 1 PGOOD Power Good Signal Output. PGOOD is an open-drain output used to indicate the status of the output voltage. It is internally pulled low when the output voltage is 10% lower than the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal regulation voltage. PGOOD is pulled low during soft-start and shut down. 2 EN 3 PFM 4, 29 AGND 5 FB 6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time. 7 AIN Supply Input for analog functions. 8, 9, 10, 11 IN 12, 13, 14, 15, 16, 17, 18, 19, 26 PGND Power Ground. 20, 21, 22, 23, 24, 25 LX Switching Node. 27 BST Bootstrap Capacitor Connection. The AOZ1232-01 includes an internal bootstrap diode. Connect an external capacitor between BST and LX as shown in the Typical Application diagrams. 28 VCC Output for internal linear regulator. Bypass VCC to AGND with a 1µF ceramic capacitor. Place the capacitor close to VCC pin. 30 SS Rev. 1.3 October 2012 Enable Input. The AOZ1232-01 is enabled when EN is pulled high. The device shuts down when EN is pulled low. PFM Selection Input. Connect PFM pin to VCC/VIN for forced PWM operation. Connect PFM pin to ground for PFM operation to improve light load efficiency. Analog Ground. Feedback Input. Adjust the output voltage with a resistive voltage-divider between the regulator’s output and AGND. Supply Input. IN is the regulator input. All IN pins must be connected together. Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the soft-start time. www.aosmd.com Page 4 of 18 AOZ1232-01 Absolute Maximum Ratings Maximum Operating Ratings Exceeding the Absolute Maximum Ratings may damage the device. Parameter The device is not guaranteed to operate beyond the Maximum Operating ratings. Rating IN, AIN, TON, PFM to AGND Parameter -0.3V to 30V LX to AGND -2V to 30V BST to AGND -0.3V to 36V SS, PGOOD, FB, EN to AGND -0.3V to 6V PGND to AGND -0.3V to +0.3V Junction Temperature (TJ) +150°C Storage Temperature (TS) -65°C to +150°C ESD Rating(1) 2kV Note: 1. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5k in series with 100pF. Rating 2.7V(1) to 28V Supply Voltage (VIN) Output Voltage Range 0.8V to 0.85*VIN Ambient Temperature (TA) -40°C to +85°C Package Thermal Resistance HS MOSFET 25°C/W LS MOSFET 20°C/W PWM Controller 50°C/W Note: 1. Connect VCC and AIN to external 5V for VIN = 2.7V ~ 6.5V application. 2. LX to PGND Transient (t<20ns) ------ -7V to VIN + 7V. Electrical Characteristics TA = 25°C, VIN = 12V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of -40°C to +85°C. Symbol VIN VUVLO Iq IOFF VFB IFB Parameter Conditions IN Supply Voltage Min. Typ. Max Units 28 V 4.0 3.7 4.4 2 3 mA 1 20 A 0.800 0.800 0.808 0.812 V 2.7 Under-Voltage Lockout Threshold of Vcc Vcc rising Vcc falling Quiescent Supply Current of Vcc IOUT = 0, VFB = 1.0V, VEN > 2V Shutdown Supply Current VEN = 0V Feedback Voltage TA = 25°C TA = 0°C to 85°C 3.2 0.792 0.788 Load Regulation 0.5 Line Regulation 1 FB Input Bias Current V % % 200 nA Enable VEN EN Input Threshold VEN_HYS EN Input Hysteresis Off threshold On threshold 0.5 2.5 100 V mV PFM Control VPFM PFM Input Threshold VPFMHYS PFM Input Hysteresis PFM Mode threshold Force PWM threshold 0.5 2.5 100 V mV Modulator TON On Time RTON = 100k, VIN = 12V RTON = 100k, VIN = 24V 200 250 150 300 ns TON_MIN Minimum On Time 100 ns TOFF_MIN Minimum Off Time 250 ns Rev. 1.3 October 2012 www.aosmd.com Page 5 of 18 AOZ1232-01 Symbol Parameter Conditions Min. Typ. Max Units VSS = 0, CSS = 0.001F to 0.1F 7 10 15 A 0.5 V ±1 A 18 -8 % Soft-Start ISS_OUT SS Source Current Power Good Signal VPG_LOW PGOOD Low Voltage IOL = 1mA PGOOD Leakage Current VPGH VPGL TPG_L PGOOD Threshold FB rising FB falling 12 -12 15 -10 PGOOD Threshold Hysteresis 3 % PGOOD Fault Delay Time (FB falling) 50 s Under Voltage and Over Voltage Protection VPL Under Voltage Threshold TPL Under Voltage Delay Time VPH Over Voltage Threshold FB rising Under Voltage Shutdown Blanking Time VIN = 12V, VEN = 0V, VCC = 5V 20 VIN = 12V, VCC = 5V 35 TUV_LX FB falling -30 -25 -20 s 128 12 15 % 18 % mS Power Stage Output RDS(ON) High-Side NFET On-Resistance High-Side NFET Leakage VEN = 0V, VLX = 0V RDS(ON) Low-Side NFET On-Resistance VLX = 12V, VCC = 5V Low-Side NFET Leakage VEN = 0V 12 45 m 10 A 15 m 10 A Over-current and Thermal Protection ILIM Valley Current Limit Thermal Shutdown Threshold Rev. 1.3 October 2012 6 TJ rising TJ falling www.aosmd.com A 145 100 °C Page 6 of 18 AOZ1232-01 Functional Block Diagram BST AIN IN PGood LDO VCC EN UVLO Reference & Bias TOFF_MIN Q Timer Error Comp 0.8V SS ISENSE (AC) FB PG Logic S Q R FB Decode LX ILIM Comp ILIM_VALLEY Current Information Processing ISENSE OTP ISENSE (DC) ISENSE (AC) Vcc TON Q Timer PFM TON TON Generator Light Load Threshold Light Load Comp ISENSE PGND Rev. 1.3 October 2012 www.aosmd.com AGND Page 7 of 18 AOZ1232-01 Typical Performance Characteristics Circuit of Typical Application. TA = 25°C, VIN = 12V, VOUT = 1.5V, fs = 300kHz unless otherwise specified. Normal Operation Load transient 1.2A (20%) to 4.8A (80%) VLX 10V/div VLX 10V/div ILX 5A/div ILX 2A/div VO Ripple 100mV/div VO Ripple 20mV/div 5μs/div 500μs/div Full Load (6A) Start-UP Full Load Short VLX 10V/div EN 5V/div ILX 2A/div VLX 10V/div IO 5A/div VO 1V/div 1ms/div Rev. 1.3 October 2012 VO 500mV/div 1ms/div www.aosmd.com Page 8 of 18 AOZ1232-01 Detailed Description The AOZ1232-01 is a high-efficiency, easy-to-use, synchronous buck regulator optimized for notebook computers. The regulator is capable of supplying 6A of continuous output current with an output voltage adjustable down to 0.8V. The programmable operating frequency range of 100kHz to 1MHz enables optimizing the configuration for PCB area and efficiency. The input voltage of AOZ1232-01 can be as low as 2.7V. The highest input voltage of AOZ1232-01 can be 28V. Constant on-time PWM with input feed-forward control scheme results in ultra-fast transient response while maintaining relatively constant switching frequency over the entire input range. True AC current mode control scheme guarantees the regulator can be stable with a ceramic output capacitor. The switching frequency can be externally programmed up to 1MHz. Protection features include VCC under-voltage lockout, valley current limit, output over voltage and under voltage protection, short-circuit protection, and thermal shutdown. The AOZ1232-01 is available in 30-pin 5mm x 5mm QFN package. Input Power Architecture The AOZ1232-01 integrates an internal linear regulator to generate 5.3V VCC from input. If input voltage is lower than 5.3V, the linear regulator operates at low dropoutput mode; the VCC voltage is equal to input voltage minus the drop-output voltage of internal linear regulator. Enable and Soft Start Constant-On-Time PWM Control with Input Feed-Forward The control algorithm of AOZ1232-01 is constant-on-time PWM Control with input feed-forward. The simplified control schematic is shown in Figure 1. IN PWM – Programmable One-Shot FB Voltage/ AC Current Information Comp + 0.8V Figure 1. Simplified Control Schematic of AOZ1232-01 The high-side switch on-time is determined solely by a one-shot whose pulse width can be programmed by one external resistor and is inversely proportional to input voltage (IN). The one-shot is triggered when the internal 0.8V is lower than the combined information of FB voltage and the AC current information of inductor, which is processed and obtained through the sensed lower-side MOSFET current once it turns on. The added AC current information can help the stability of constant-on time control even with pure ceramic output capacitors, which have very low ESR. The AC current information has no DC offset, which does not cause offset with output load change, which is fundamentally different from other V2 constant-on time control schemes. The constant-on-time PWM control architecture is a pseudo-fixed frequency with input voltage feed-forward. The internal circuit of AOZ1232-01 sets the on-time of high-side switch inversely proportional to the IN. The AOZ1232-01 has external soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. A soft start process begins when VCC rises to 4.0V and voltage on EN pin is HIGH. An internal current source charges the external soft-start capacitor; the FB voltage follows the voltage of soft-start pin (VSS) when it is lower than 0.8V. When VSS is higher than 0.8V, the FB voltage is regulated by internal precise band-gap voltage (0.8V). The soft-start time can be calculated by the following formula: 26.3 10 R TON T ON = ---------------------------------------------------------------V IN V TSS(s) = 330 x CSS(nF) V OUT F SW = --------------------------V IN T ON – 12 (1) To achieve the flux balance of inductor, the buck converter has the equation: (2) If CSS is 1nF, the soft-start time will be 330µs; if CSS is 10nF, the soft-start time will be 3.3ms. Rev. 1.3 October 2012 www.aosmd.com Page 9 of 18 AOZ1232-01 Once the product of VIN x TON is constant, the switching frequency keeps constant and is independent with input voltage. An external resistor between the IN and TON pin sets the switching frequency according to the following equation: function of the inductor value as well as input and output voltages. The current limit will keep the low-side MOSFET ON and will not allow another high-side ontime, until the current in the low-side MOSFET reduces below the current limit. Figure 2 shows the inductor current during the current limit. 12 V OUT 10 F SW = --------------------------------26.3 R TON (3) Inductor Current A further simplified equation will be: 38000 V OUT V F SW kHz = ----------------------------------------------R TON k Ilim (4) Time Figure 2. Inductor Current If VOUT is 1.8V, RTON is 137k, the switching frequency will be 500kHz. This algorithm results in a nearly constant switching frequency despite the lack of a fixed-frequency clock generator. After 128s (typical), the AOZ1232-01 considers this is a true failed condition and therefore, turns-off both highside and low-side MOSFETs and latches off. When triggered, only the enable can restart the AOZ1232-01 again. True Current Mode Control Output Voltage Under-Voltage Protection The constant-on-time control scheme is intrinsically unstable if output capacitor’s ESR is not large enough as an effective current-sense resistor. Ceramic capacitors usually cannot be used as output capacitor. If the output voltage is lower than 25% by over-current or short circuit, the AOZ1232-01 will wait for 128s (typical) and turns-off both high-side and low-side MOSFETs and latches off. When triggered, only the enable can restart the AOZ1232-01 again. The AOZ1232-01 senses the low-side MOSFET current and processes it into DC and AC current information using AOS proprietary technique. The AC current information is decoded and added on the FB pin on phase. With AC current information, the stability of constant-on-time control is significantly improved even without the help of output capacitor’s ESR, and thus the pure ceramic capacitor solution can be applicable. The pure ceramic capacitor solution can significantly reduce the output ripple (no ESR caused overshoot and undershoot) and less board area design. Valley Current-Limit Protection The AOZ1232-01 uses the valley current-limit protection by using RDSON of the lower MOSFET current sensing. To detect real current information, a minimum constantoff (150ns typical) is implemented after a constant-on time. If the current exceeds the valley current-limit threshold, the PWM controller is not allowed to initiate a new cycle. The actual peak current is greater than the valley current-limit threshold by an amount equal to the inductor ripple current. Therefore, the exact current-limit characteristic and maximum load capability are a Rev. 1.3 October 2012 Output Voltage Over-Voltage Protection The threshold of OVP is set 15% higher than 800mV. When the VFB voltage exceeds the OVP threshold, highside MOSFET is turned-off and low-side MOSFETs is turned-on until VFB voltage is lower than 800mV. Power Good Output The power good (PGOOD) output, which is an open drain output, requires the pull-up resistor. When the output voltage is 10% below than the nominal regulation voltage for 50s (typical), the PGOOD is pulled low. When the output voltage is 15% higher than the nominal regulation voltage, the PGOOD is also pulled low. When combined with the under-voltage-protection circuit, this current limit method is effective in almost every circumstance. In forced-PWM mode, the AOZ1232-01 also implements a negative current limit to prevent excessive reverse inductor currents when VOUT is sinking current. www.aosmd.com Page 10 of 18 AOZ1232-01 Application Information The basic AOZ1232-01 application circuit is shown in pages 2 and 3. Component selection is explained below. Input Capacitor The input capacitor must be connected to the IN pins and PGND pin of the AOZ1232-01 to maintain steady input voltage and filter out the pulsing input current. A small decoupling capacitor, usually 1F, should be connected to the VCC pin and AGND pin for stable operation of the AOZ1232-01. The voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. The input ripple voltage can be approximated by equation below: Inductor The inductor is used to supply constant current to output when it is driven by a switching voltage. For given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: VO VO IO - ------------------------ 1 – -------V IN V IN f C IN Since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. For a buck circuit, the RMS value of input capacitor current can be calculated by: VO VO I L = ----------- 1 – --------- V IN fL The peak inductor current is: I L I Lpeak = I O + -------2 VO VO I CIN_RMS = I O --------- 1 – --------- V IN V IN if let m equal the conversion ratio: VO -------- = m V IN The relation between the input capacitor RMS current and voltage conversion ratio is calculated and shown in Figure 3. It can be seen that when VO is half of VIN, CIN it is under the worst current stress. The worst current stress on CIN is 0.5 x IO. High inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. Low ripple current reduces inductor core losses. It also reduces RMS current through inductor and switches, which results in less conduction loss. Usually, peak to peak ripple current on inductor is designed to be 30% to 50% of output current. When selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. The inductor takes the highest current in a buck circuit. The conduction loss on the inductor needs to be checked for thermal and efficiency requirements. 0.5 0.4 Surface mount inductors in different shapes and styles are available from Coilcraft, Elytone and Murata. Shielded inductors are small and radiate less EMI noise, but they do cost more than unshielded inductors. The choice depends on EMI requirement, price and size. ICIN_RMS(m) 0.3 IO 0.2 0.1 0 For reliable operation and best performance, the input capacitors must have current rating higher than ICIN-RMS at worst operating conditions. Ceramic capacitors are preferred for input capacitors because of their low ESR and high ripple current rating. Depending on the application circuits, other low ESR tantalum capacitor or aluminum electrolytic capacitor may also be used. When selecting ceramic capacitors, X5R or X7R type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. Note that the ripple current rating from capacitor manufactures is based on certain amount of life time. Further de-rating may be necessary for practical design requirement. 0 0.5 m 1 Figure 3. ICIN vs. Voltage Conversion Ratio Rev. 1.3 October 2012 www.aosmd.com Page 11 of 18 AOZ1232-01 Output Capacitor The output capacitor is selected based on the DC output voltage rating, output ripple voltage specification and ripple current rating. The selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. De-rating needs to be considered for long term reliability. Output ripple voltage specification is another important factor for selecting the output capacitor. In a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and ESR. It can be calculated by the equation below: 1 V O = I L ESR CO + ------------------------- 8fC O where, CO is output capacitor value and ESRCO is the Equivalent Series Resistor of output capacitor. When a low ESR ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. Output ripple is mainly caused by capacitor value and inductor ripple current. The output ripple voltage calculation can be simplified to: 1 V O = I L ------------------------8fC O If the impedance of ESR at switching frequency dominates, the output ripple voltage is mainly decided by capacitor ESR and inductor ripple current. The output ripple voltage calculation can be further simplified to: V O = I L ESR CO Thermal Management and Layout Consideration In the AOZ1232-01 buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the VIN pin, to the LX pins, to the filter inductor, to the output capacitor and load, and then returns to the input capacitor through ground. Current flows in the first loop when the high side switch is on. The second loop starts from the inductor, to the output capacitors and load, to the low side switch. Current flows in the second loop when the low side switch is on. In PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. A ground plane is strongly recommended to connect the input capacitor, output capacitor and PGND pin of the AOZ1232-01. In the AOZ1232-01 buck regulator circuit, the major power dissipating components are the AOZ1232-01 and output inductor. The total power dissipation of the converter circuit can be measured by input power minus output power. P total_loss = V IN I IN – V O I O The power dissipation of inductor can be approximately calculated by output current and DCR of inductor and output current. P inductor_loss = IO2 R inductor 1.1 The actual junction temperature can be calculated with power dissipation in the AOZ1232-01 and thermal impedance from junction to ambient. T junction = P total_loss – P inductor_loss JA For lower output ripple voltage across the entire operating temperature range, X5R or X7R dielectric type of ceramic, or other low ESR tantalum are recommended to be used as output capacitors. In a buck converter, output capacitor current is continuous. The RMS current of output capacitor is decided by the peak to peak inductor ripple current. It can be calculated by: The maximum junction temperature of AOZ1232-01 is 150ºC, which limits the maximum load current capability. The thermal performance of the AOZ1232-01 is strongly affected by the PCB layout. Extra care should be taken by users during design process to ensure that the IC will operate under the recommended environmental conditions. I L I CO_RMS = ---------12 Usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. When the buck inductor is selected to be very small and inductor ripple current is high, the output capacitor could be overstressed. Rev. 1.3 October 2012 www.aosmd.com Page 12 of 18 AOZ1232-01 Several layout tips are listed below for the best electric and thermal performance. 5. Decoupling capacitor CVCC should be connected to VCC and AGND as close as possible. 1. The LX pins and pad are connected to internal low side switch drain. They are low resistance thermal conduction path and most noisy switching node. Connect a large copper plane to LX pin to help thermal dissipation. 6. Voltage divider R1 and R2 should be placed as close as possible to FB and AGND. 7. RTON should be connected as close as possible to Pin 6 (TON pin). 2. The IN pins and pad are connected to internal high side switch drain. They are also low resistance thermal conduction path. Connect a large copper plane to IN pins to help thermal dissipation. 8. A ground plane is preferred; Pin 26 (PGND) is connected to the ground plane through via. 9. Keep sensitive signal traces such as feedback trace far away from the LX pins. 3. Do not use thermal relief connection on the PGND pin. Pour a maximized copper area on the PGND pin to help thermal dissipation. 10. Pour copper plane on all unused board area and connect it to stable DC nodes, like VIN, GND or VOUT. 4. Input capacitors should be connected to the IN pin and the PGND pin as close as possible to reduce the switching spikes. Vo R2 R1 Rton FB ND AGN D PFM EN PGOOD 5 4 3 2 1 7 6 AIN TON 30 IN 9 D 29 AGND IN 10 IN 11 IN D AGN AGND 8 IN Cin SS Cvcc 28 VCC Vcc 27 BST 26 PGND GND Cb 25 LX 12 PGND 13 24 LX PGND 14 23 LX LX PGND 15 16 17 18 19 20 21 22 PGND PGND PGND PGND PGND LX LX LX Cout LX Vo Vo Rev. 1.3 October 2012 www.aosmd.com Page 13 of 18 AOZ1232-01 Package Dimensions, QFN 5x5, 30 Lead EP3_S D A D/2 22 B 15 23 2 14 INDEX AREA E/2 (D/2xE/2) A3/2 2x aaa C E e 30 8 1 7 2x aaa C A3 TOP VIEW A3/2 ccc C A3 C A SEATING PLANE A1 4 3 30 x b ddd C bbb M C A B SIDE VIEW PIN#1 DIA C0.35x45˚ D1 1 e e/2 L5 7 30 8 E1 E1 D2 L3 L1 L1 L4 L2 E2 2e e/2 L5 23 14 L 22 15 L5 D3/2 D3 L5 Notes: 1. All dimensions are in millimeters. 2. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SPP-002. 3. Dimension b applies to metallized terminal and is measured between 0.20mm and 0.35mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension b should not be measured in that radius area. Rev. 1.3 October 2012 www.aosmd.com Page 14 of 18 AOZ1232-01 Package Dimensions, QFN 5x5, 30 Lead EP3_S (Continued) 3.76 0.22 0.80 0.25 0.75 0.116 1.996 14 0.44 30 2.50 0.71 8 0.30X45° 1 7 1.25 0.500 REF 0.25 0.22 2.32 0.22 1.494 0.386 23 0.25 15 22 2.50 0.22 1.88 UNIT: MM 1.17 2.50 2.50 RECOMMENDED STENCIL DESIGN 1.04 0.22 0.27 0.27 0.80 0.14 0.27 0.52 15 22 0.15 2.50 0.81 2.50 0.116 0.75 0.873 0.622 0.436 0.39 0.25 14 23 8 0.30X45° 1 0.27 7 0.25 0.37 0.27 0.975 2.50 Rev. 1.3 October 2012 0.500 REF 0.27 0.15 30 1.07 UNIT: MM 2.50 www.aosmd.com Page 15 of 18 AOZ1232-01 Package Dimensions, QFN 5x5, 30 Lead EP3_S (Continued) Dimensions in millimeters Symbols Min. A A1 A3 b D D1 0.80 0.00 2.12 2.22 D2 0.97 1.07 D3 3.56 3.66 0.20 E E1 E2 e L L1 L2 L3 L4 L5 aaa bbb ccc ddd Rev. 1.3 October 2012 Typ. 0.90 0.02 0.20 REF 0.25 5.00 BSC Max. Symbols Min. 1.00 0.05 0.031 0.000 0.008 2.32 A A1 A3 b D D1 0.083 0.087 0.091 1.17 D2 0.038 0.042 0.046 3.76 D3 0.140 0.144 0.148 0.35 E 5.00 BSC 1.294 1.796 0.30 0.336 — 0.29 0.66 0.17 1.394 1.896 0.50 BSC 0.40 0.436 0.066 0.39 0.76 0.27 0.15 0.10 0.10 0.08 Dimensions in inches 1.494 1.996 0.50 0.536 0.166 0.49 0.86 0.37 E1 E2 e L L1 L2 L3 L4 L5 aaa bbb ccc ddd www.aosmd.com 0.051 0.110 0.012 0.013 — 0.011 0.026 0.007 Typ. 0.035 0.001 0.008 REF 0.010 0.197 BSC 0.197 BSC 0.055 0.114 0.020 BSC 0.016 0.017 0.003 0.015 0.030 0.011 0.006 Max. 0.039 0.002 0.014 0.059 0.118 0.020 0.021 0.007 0.019 0.034 0.015 0.004 0.004 0.003 Page 16 of 18 AOZ1232-01 Tape and Reel Dimensions, QFN 5x5, 30 Lead EP3_S Carrier Tape P1 P2 D1 T E1 E2 E B0 K0 D0 P0 A0 Feeding Direction UNIT: mm Package A0 B0 K0 D0 QFN 5x5 (12mm) 5.25 ±0.10 5.25 ±0.10 1.10 ±0.10 1.50 Min. D1 1.50 +0.10/-0 E E1 E2 P0 P1 P2 T 12.00 +0.3 1.75 ±0.10 5.50 ±0.05 8.00 ±0.10 4.00 ±0.10 2.00 ±0.05 0.30 ±0.05 Reel W1 S G N M K V R H W UNIT: mm Tape Size Reel Size 12mm ø330 M ø330.0 ±2.0 N ø79.0 ±1.0 W 12.4 +2.0/-0.0 W1 17.0 +2.6/-1.2 H ø13.0 ±0.5 K 10.5 ±0.2 S 2.0 ±0.5 G — R — V — Leader/Trailer and Orientation Trailer Tape 300mm min. 75 Empty Pockets Rev. 1.3 October 2012 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm min. 125 Empty Pockets Page 17 of 18 AOZ1232-01 Part Marking Z1232QI1 Part Number Code FAYWLT Assembly Lot Code Fab & Assembly Location Year & Week Code LEGAL DISCLAIMER Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or completeness of the information provided herein and takes no liabilities for the consequences of use of such information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes to such information at any time without further notice. This document does not constitute the grant of any intellectual property rights or representation of non-infringement of any third party’s intellectual property rights. LIFE SUPPORT POLICY ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.3 October 2012 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 18 of 18