NSC 54ACTQ16240

54ACTQ16240
16-Bit Inverting Buffer/Line Driver with TRI-STATE ®
Outputs
General Description
Features
The ’ACTQ16240 contains sixteen inverting buffers with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmitter/
receiver. The device is nibble controlled. Each nibble has
separate TRI-STATE control inputs which can be shorted together for full 16-bit operation.
The ’ACTQ16240 utilizes NSC Quiet Series technology to
guarantee quiet output switching and improve dynamic
threshold performance. FACT Quiet Series™ features
GTO™ output control for superior performance.
n Utilizes NSC FACT Quiet Series technology
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Separate control logic for each byte
n 16-bit version of the ’ACTQ240
n Outputs source/sink 24 mA
n Standard Microcircuit Drawing (SMD) 5962-9688001
Logic Symbol
Connection Diagram
Pin Assignment for CERPAK
DS010924-1
Pin Description
Pin
Description
Names
OEn
Output Enable Inputs (Active Low)
I0–I15
Inputs
O0–O15
Outputs
DS010924-2
FACT ® is a trademark of National Semiconductor Corporation.
FACT Quiet Series ® is a trademark of National Semiconductor Corporation.
GTO ® is a trademark of National Semiconductor Corporation.
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS010924
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54ACTQ16240 16-Bit Inverting Buffer/Line Driver with TRI-STATE Outputs
September 1998
are controlled by an Output Enable (OEn) input for each
nibble. When OEn is LOW, the outputs are in 2-state mode.
When OEn is HIGH, the outputs are in the high impedance
mode, but this does not interfere with entering new data into
the inputs.
Functional Description
The ’ACTQ16240 contains sixteen inverting buffers with
TRI-STATE standard outputs. The device is nibble (4 bits)
controlled with each nibble functioning identically, but independent of the other. The control pins may be shorted together to obtain full 16-bit operation. The TRI-STATE outputs
Logic Diagram
DS010924-3
Truth Tables
Inputs
Inputs
Outputs
Outputs
OE3
I8–I11
O8–O11
H
OE1
I0–I3
O0–O3
L
L
L
L
H
L
H
L
L
H
L
H
X
Z
H
X
Z
I12–I15
O12–O15
H
Inputs
Inputs
Outputs
OE4
Outputs
OE2
I4–I7
O4–O7
L
L
L
L
H
L
H
L
L
H
L
H
X
Z
H
X
Z
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
Z = High Impedance
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2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source/Sink Current (IO)
DC VCC or Ground Current
per Output Pin
Junction Temperature
CDIP
Storage Temperature
Supply Voltage (VCC)
’ACTQ
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
54ACTQ
Minimum Input Edge Rate (dV/dt)
’ACTQ Devices
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
−0.5V to +7.0V
−20 mA
+20 mA
−20 mA
+20 mA
−0.5V to VCC + 0.5V
± 50 mA
4.5V to 5.5V
0V to VCC
0V to VCC
−55˚C to +125˚C
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications.
± 50 mA
+175˚C
−65˚C to +150˚C
DC Electrical Characteristics for ’ACTQ Family Devices
Symbol
Parameter
54ACTQ
TA =
VCC
(V)
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
VIH
VIL
VOH
Minimum High
4.5
2.0
Input Voltage
5.5
2.0
Maximum Low
4.5
0.8
Input Voltage
5.5
0.8
Minimum High
4.5
4.4
Output Voltage
5.5
5.4
V
VOUT = 0.1V
V
or VCC − 0.1V
VOUT = 0.1V
V
or VCC − 0.1V
IOUT = −50 µA
(Note 2)
VIN = VIL or VIH
VOL
4.5
3.70
5.5
4.70
Maximum Low
4.5
0.1
Output Voltage
5.5
0.1
V
IOH= −24 mA
V
IOH= −24 mA
IOUT = 50 µA
(Note 2)
VIN = VIL or VIH
IOZ
Maximum TRI-STATE
4.5
0.50
5.5
0.50
V
IOL = 24 mA
± 10.0
µA
IOL = 24 mA
VI = VIL, VIH
5.5
5.5
± 1.0
µA
VO = VCC, GND
VI = VCC, GND
Leakage Current
IIN
Maximum Input
Leakage Current
ICCT
Maximum ICC/Input
5.5
1.6
mA
ICC
Max Quiescent
5.5
160.0
µA
VI = VCC − 2.1V
VIN = VCC
50
mA
or GND
(Note 6)
VOLD = 1.65V Max
50
mA
VOHD = 3.85V Min
Supply Current
IOLD
IOHD
Minimum Dynamic
Output Current
(Note 3)
5.5
3
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DC Electrical Characteristics for ’ACTQ Family Devices
Symbol
Parameter
54ACTQ
TA =
VCC
(V)
(Continued)
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
VOLP
Quiet Output
5.0
1.2
V
Maximum Dynamic
VOL
VOLV
Quiet Output
(Notes 4, 5)
5.0
-1.2
V
Minimum Dynamic
VOL
(Notes 4, 5)
Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms; one output loaded at a time.
Note 4: Maximum number of outputs that can switch simultaneously is n. (n − 1) outputs are switched LOW and one output held LOW.
Note 5: Maximum number of outputs that can switch simultaneously is n. (n − 1) outputs are switched HIGH and one output held HIGH.
Note 6: ICC for 54ACTQ @ 25˚C is identical to 74ACTQ @ 25˚C.
AC Electrical Characteristics
Symbol
Parameter
VCC
(V)
(Note 7)
54ACTQ
TA =
−55˚C to +125˚C
CL = 50 pF
Min
tPLH,
Propagation Delay
tPHL
Data to Output
tPZH,
Output Enable Time
5.0
5.0
tPZL
tPHZ,
Output Disable Time
5.0
tPLZ
9.0
2.5
8.0
2.5
8.5
2.5
8.9
2.0
8.3
2.0
8.3
Capacitance
Typ
Units
CIN
Input Pin Capacitance
4.5
pF
CPD
Power Dissipation
Capacitance
95
pF
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Parameter
4
Max
2.5
Note 7: Voltage Range 5.0 is 5.0V ± 0.5V.
Symbol
Units
Conditions
VCC = 5.0V
VCC = 5.0V
ns
ns
ns
5
54ACTQ16240 16-Bit Inverting Buffer/Line Driver with TRI-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted
48-Lead CERPAK (F)
NS Package Number WA48A
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