ETC OV7930

Omni
ision
Advanced Information
Preliminary Datasheet
TM
OV7930 Color CMOS Analog CAMERACHIPTM
General Description
Applications
The OV7930 (color) is a high performance quarter-inch
CMOS CAMERACHIPTM designed for all applications
requiring a small footprint, low voltage, low power
consumption and low cost color video camera.
The device supports NTSC composite video output and
can directly interface with a VCR TV monitor or other
75 ohm terminated input with 2X standard TV signal
range. The OV7930 CAMERACHIPs require only a single
5-volt DC power supply and have been designed for very
low power operation.
Single chip 1/4" lens video camera
Composite video: NTSC
Sensitivity boost (+27 dB)/AGC ON/OFF
Automatic exposure/gain/white balance
External frame sync capability
Aperture correction
SCCB programmable controls:
Ordering Information
Product
OV7930 (Color, VGA,
NTSC, CVO)
Version 1.1, January 15, 2003
SIO_C
– Aperture correction
Gamma correction (0.45) ON/OFF
Low power consumption
+5 volt only power supply
Wide dynamic range, anti-blooming, zero smearing
4
3
2
1
28
27
26
NC
5
25
FASTB
VREQ
6
24
PWDN
VRCHG
7
23
FODD/HGAIN
NC
8
22
VHS/MIR
NC
9
21
GAMMA
CVO
10
20
FSI
OVDD
11
19
DGND
OV7930
Packages
CLCC-28, PLCC-28
12
13
14
15
16
17
18
DVDD
Gamma curve
SIO_D
–
Figure 1 OV7930 Pin Diagram
XCLK2
Gain
AWB1S
–
XCLK1
Exposure
AGND
White balance
–
VPXO/VFLP
–
AVDD
Hue
SCCB_E
Brightness
–
4.00 mm x 3.08 mm
1/60s - 6.3µs
< 2.0 Lux
> 46 dB
> 70 dB
7.86 µm x 6.25 µm
< 100 mV/s
< 0.03% VPEAK-TO-PEAK
0.45 in. x 0.45 in.
ABRT
–
< 35 mA
EGND
Color saturation
510 x 492
5 VDC + 5%
20 mA
BKLT
–
Array Size
Power Supply
Without Loading
Power
With 75 ohm
Requirements
Loading
Image Area
Auto Electronic Exposure Time
Minimum Illumination (3000K)
S/N Ratio
Dynamic Range
Pixel Size
Dark Current
Fixed Pattern Noise
Package Dimensions
EVDD
•
•
•
•
Video Conferencing
Video Phones
Video E-mail
PC Multimedia
Toys
Security
Surveillance
Finger Printing
Medical and Dental Equipment
Key Specifications
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Proprietary to OmniVision Technologies
1
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
Functional Description
This section describes the various functions of the OV7930. Refer to Figure 2 for the functional block diagram of the OV7930.
Figure 2 Functional Block Diagram
Gain
Control
Balance
Control
Row
Select
Image Array
(528 X 500)
Control
Register
Bank
Video Standards
NTSC TV standards are implemented and available as
output in the OV7930 CAMERACHIP. Note that the
accuracy and stability of the crystal clock frequency is
important to avoid unwanted color shift in the TV video
system. A 14.31818 MHz crystal is recommended when
using the OV7930 CAMERACHIP.
Video Format
The OV7930 CAMERACHIP supports Composite (CVBS)
video format only. Composite signals are generated from
the built-in NTSC TV encoder.
SCCB Slave
Interface
FODD
VHS
VPXO
FASTB
GAMMA
ABRT
AWB1S
FSI
BKLT
PWDN
XCLK2
RESET
XCLK1
Clock/Timing Generator and Control Logic
CVO
ASP
Control
SIO_C
Column Sample/Hold
NTSC
Video
Encoder
Analog Signal
Processor
(ASP)
SCCB_E
Channel
Control
SIO_D
AMP
Image Sensor Functions
White Balance
The function of white balance in the OV7930 CAMERACHIP
is to adjust and calibrate the image device sensitivity on
the primary (RGB) colors to match the color cast of the
light source. The Auto White Balance (AWB) can be
enabled or disabled by SCCB register bit COMD[1] (see
“COMD” on page 12).
Mirror and Vertical Flip
The OV7930 has pin control functions:
•
Mirror (pin22 - see “VHS/MIR” on page 4)
•
VFLIP (pin 15 input - see “VPXO/VFLP” on page 4)
2
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
Omni
Functional Description
ision
These two functions can be controlled separately using
SCCB register bit COME[6] (see “COME” on page 12) for
the mirror function and register bit COMJ[0] (see “COMJ”
on page 13) for the vertical flip function.
Additional Picture Controls
The OV7930 CAMERACHIP provides additional picture
control functions to enhance image quality and chip
performance.
Multi-Chip Synchronize
The OV7930 CAMERACHIP provides the multi-chip
Synchronize function where one chip works as the master
and all others as slave devices. The master chip provides
the frame synchronize signal through the FODD pin (pin
23 - see “FODD/HGAIN” on page 5). All slave devices
accept the frame synchronize signal through the FSI pin
(pin 20 - see “FSI” on page 4). This mode allows all
devices to synchronize together.
Chip Configuration
The OV7930 CAMERACHIP has been designed for
ease-of-use in many stand-alone applications. Most of the
on-chip functions are configurable by connecting the
appropriate pins high (logic "1") or low (logic "0") through
a 10 KΩ resistor. The CAMERACHIP reads the input pins at
power up which enable user-defined default
configurations.
The OV7930 CAMERACHIP also has a SCCB slave
interface for programmable access to all registers
functions. Refer to OmniVision Technologies Serial
Camera Control Bus (SCCB) Specification for detailed
usage of the serial control port.
NOTE
Once the SCCB interface is enabled (pin 14 see “SCCB_E” on page 4), the following pin
assignment functions will be ignored and
functions will be defined by the related SCCB
register. These pins are:
•
ABRT (pin 3)
•
BKLT (pin 4)
•
VFLIP (pin 15)
•
GAMMA (pin 21)
•
MIR (pin 22)
•
HGAIN (pin 23)
•
FASTB (pin 25)
Version 1.1, January 15, 2003
Automatic Gain Control (AGC)
The default gain range is 1x - 8x while the user can set the
gain range up to 4x or 16x.
Brightness Control
Brightness can be controlled either by internal automatic
algorithms or by the user through the following SCCB
register bits:
•
BRT[7:0] (see “BRT” on page 11)
Gamma Correction
The OV7930 has luminance and chrominance Gamma
correction through the GAMMA pin (pin 21 - see
“GAMMA” on page 4).
Backlight Control
The OV7930 manages backlight conditions through
register bit COME[4] (see “COME” on page 12).
Color Saturation
Color saturation can be updated manually through the
SCCB register bits SAT[7:4] (see “SAT” on page 11).
Hue Adjustment
Image hue can be adjusted through the SCCB register bits
HUE[5:0] (see “HUE” on page 11).
Proprietary to OmniVision Technologies
3
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
Pin Description
Table 1
Pin Description
Pin Number
Name
Pin Type
Default (V)
Function/Description
01
AGND
Power
0
Analog ground
02
AVDD
Power
5
Analog Power (+5 VDC)
03
ABRT
Input
0
Auto brightness control ON/OFF
04
BKLT
Input
0
Backlight selection
05
NC
06
0:
OFF
1:
ON
—
—
No connection
VREQ
Analog
2.5
Internal reference
07
VRCHG
Analog
3.6
Internal reference
08
NC
—
—
No connection
09
NC
—
—
No connection
10
CVO
Output
—
Composite video output, 2X standard NTSC TV signal
11
OVDD
Power
5
Analog power for video output (+5 VDC)
12
EVDD
Power
5
Analog power (+5 VDC)
13
EGND
Power
0
Analog ground
14
SCCB_E
Input
5
SCCB interface enable signal, active low
0
Valid pixels detect output. CLK is asserted on this pin during
the active image period. Power up initial pin value will be
latched as vertical flip ON/OFF control.
15
VPXO/VFLP
I/O
0:
OFF
1:
ON
16
XCLK1
Input
—
Crystal clock input. 14.31818 MHz for NTSC
17
XCLK2
Output
—
Crystal clock output
18
DVDD
Power
5
Digital power (+5 VDC)
19
DGND
Power
0
Digital ground
20
FSI
Input
0
Frame synchronizing signal input
Gamma function ON/OFF
21
22
4
GAMMA
VHS/MIR
Input
I/O
Proprietary to OmniVision Technologies
5
0
0:
OFF
1:
ON
Vertical/Horizontal SYNC output. Power up initial pin value
will be latched as mirror function ON/OFF control.
0:
OFF
1:
ON
Version 1.1, January 15, 2003
Omni
Pin Description
ision
Table 1
Pin Number
23
Pin Description
Name
FODD/HGAIN
Pin Type
I/O
Default (V)
Function/Description
0
Even/odd field flag and frame synchronize signal output.
Power up initial pin value will be latched as AGC gain range
control.
0:
1:
AGC gain 1x - 4x
AGC gain 1x - 8x
Power down mode selection
24
PWDN
Input
0
0:
OFF
1:
ON
AEC/AGC mode selection
25
FASTB
Input
0
0:
Fast mode
1:
Normal mode
26
SIO_C
Input
—
SCCB serial interface clock
27
SIO_D
I/O
—
SCCB serial interface data I/O
28
AWB1S
Input
0
After power up, first high pulse edge will trigger one shot
AWB. System performs fast AWB only when this pin is high
at this mode.
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
5
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
Electrical Characteristics
Table 2
Operating Conditions
Parameter
Min
Max
Unit
0
40
°C
Storage temperature
-40
125
°C
Operating humidity
TBD
TBD
Storage humidity
TBD
TBD
Operating temperature
Table 3
DC Electrical Characteristics (0°C < TA < 85°C)
Symbol
Parameter
Min
Typ
Max
Unit
4.75
5
5.25
V
—
20
—
mA
1.0
V
Supply
VDD
Supply voltage (AVDD, DVDD, OVDD, EVDD)
IDD
Supply current in VDDs (without loading)
Digital Inputs
VIL
Input voltage LOW
VIH
Input voltage HIGH
CIN
Input capacitor
3.5
V
10
pF
Digital Outputs
VOH
Output voltage HIGH
VOL
Output voltage LOW
4
V
0.6
V
SCCB (SIO_C and SIO_D)
6
VIL
SIO_C and SIO_D
-0.5
0
1
V
VIH
SIO_C and SIO_D
3.5
5
VDD + 0.5
V
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
Omni
Electrical Characteristics
ision
Table 4
AC Characteristics (TA = 25°C, VDD = 5V)
Symbol
Parameter
Min
Typ
Max
Unit
—
14.31818
—
MHz
Clock Input/Crystal Oscillator
fOSC
Resonator frequency
Load capacitor
33
pF
Parallel resistance
1
MΩ
Rise/fall time for external clock input
—
5
—
ns
Duty cycle for external clock input
40
50
60
%
CVO Analog Video Output Parameters
VTO_P
Video peak signal level
—
2.0
—
V
VTO_B
Video black signal level
—
0.58
—
V
VSYNC
Video sync pulse amplitude
—
0.58
—
V
Ro
Video output load
—
75
—
Ω
Isource
Output pin source current (Output = 1.5v)
8
10
12
mA
Isink
Output pin sink current (Output = 3v)
8
10
12
mA
I/O Pin
Miscellaneous Timing
tSYNC
External FSI cycle time
—
2
—
field
tPU
Chip power up time
—
—
100
µs
tPD
Power up delay time
—
10
—
µs
tPZ
Power up low-z delay
—
1000
—
µs
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
7
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
Timing Specifications
The OV7930 timing is standard NTSC TV timing. Figure 3 shows the NTSC timing and signal range. The OV7930 outputs 2X
standard TV signals.
Figure 3 NTSC Timing and Signal Range
T h =63.49us
V TO_P = 200 IRE
Thblk = 10.08 µs
Thsync =
4.76 µs
v set = 8 IRE
vsync = 83 IRE
3.58 MHz
Color Burst
9 cycle
80 IRE p_p
(A) HORIZONTAL TIMING FOR NTSC
FIELD 1
VHSYNC
523
524
525
1
2
3
4
5
6
7
EQUALIZING
8
9
10
11
12
EQUALIZING
VERTICAL SYNC
FIELD 2
261
262
263
264
265
266
EQUALIZING
267
268
269
270
271
272
273
274
EQUALIZING
(B) VERTICAL TIMING FOR NTSC
8
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
Omni
Timing Specifications
ision
Figure 4 SCCB Timing Diagram
tF
t HIGH
tR
t HD:DAT
t SU:DAT
t LOW
SIO_C
t SU:STA
t HD:STA
tSU:STO
SIO_D
IN
t BUF
tAA
SIO_D
OUT
t DH
SCCB_E
Table 5
SCCB Timing Specifications
Symbol
Parameter
Min
Typ
Max
Unit
400
KHz
fSIO_C
Clock Frequency
tLOW
Clock Low Period
1.3
µs
tHIGH
Clock High Period
600
ns
tAA
SIO_C low to Data Out valid
100
tBUF
Bus free time before new START
1.3
µs
tHD:STA
START condition Hold time
600
ns
tSU:STA
START condition Setup time
600
ns
tHD:DAT
Data-in Hold time
0
µs
tSU:DAT
Data-in Setup time
100
ns
tSU:STO
STOP condition Setup time
600
ns
tR, tF
SCCB Rise/Fall times
tDH
Data-out Hold time
Version 1.1, January 15, 2003
900
300
50
Proprietary to OmniVision Technologies
ns
ns
ns
9
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
OV7930 Light Response
Figure 5 OV7930 Light Response
10
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
Omni
Register Set
ision
Register Set
Table 6 provides a list and description of the Device Control registers contained in the OV7930. The device slave addresses
are 80 for write and 81 for read.
Table 6
Device Control Register List
Address
(Hex)
Register
Name
Default
(Hex)
R/W
00
GAIN
00
RW
AGC Gain Control
01
BLUE
80
RW
Blue Channel Gain Control MSB, 8 bits
(LSB 2 bits in register BRLOW[1:0] (see “BRLOW” on page 11).
02
RED
80
RW
Red Channel Gain Control MSB, 8 bits
(LSB 2 bits in register BRLOW[5:4] (see “BRLOW” on page 11).
RW
Saturation Control
Bit[7:4]: Saturation adjustment
0000: Lowest
1111: Highest
Bit[3:0]: Reserved
Hue Adjustment Control
Bit[7:6]: Reserved
Bit[5]:
Hue control ON/OFF
0: OFF
1: ON
Bit[4:0]: Hue control setting
•
Range: -20° to +20° (10000 in the middle)
03
SAT
80
04
HUE
10
RW
05
RSVD
XX
–
Description
Reserved
Brightness Adjustment Control
• Range: [00] to [FF]
06
BRT
80
RW
07
SHP
D4
RW
08-09
RSVD
XX
–
0A
BRLOW
00
RW
0B-0D
RSVD
XX
–
0E
COMB
96
RW
Note: If auto brightness is enabled, this register will be automatically
updated by internal control. If auto brightness is disabled, the user can
update brightness value.
Sharpness Adjustment
Bit[7:4]: Sharpness ON/OFF threshold
Bit[3:0]: Sharpness adjustment
Reserved
Blue/Red Channel Gain LSBs
Bit[7:6]: Reserved
Bit[5:4]: Red channel AWB gain two lower bits
Bit[3:2]: Reserved
Bit[1:0]: Blue channel AWB gain two lower bits
Reserved
Common Control B
Bit[7]:
Edge enhancement ON/OFF
0: OFF
1:
Bit[6:0]:
Version 1.1, January 15, 2003
ON
Reserved
Proprietary to OmniVision Technologies
11
OV7930
Table 6
Color CMOS Analog CAMERACHIP™
Omni
ision
Device Control Register List
Address
(Hex)
Register
Name
Default
(Hex)
R/W
0F
RSVD
XX
–
Reserved
10
VER
01
R
Version number
11
MIDH
7F
R
Manufacturer ID Byte -- High
(Read only = 0x7F)
12
MIDL
A2
R
Manufacturer ID Byte – Low
(Read only = 0xA2)
13
AEC
82
RW
Description
Exposure Control Value
14
COMD
1F
RW
• Range: [00] to [82]
Tex = (2 x AEC[7:0] + 1) x 63.5 µs
Common Control D
Bit[7:6]: AEC/AGC algorithm analyze image area selection
00: Whole image
01: Lower two-thirds image
10: Lower one-half image
11: Lower one-third image
Bit[5:3]: Reserved
Bit[2]:
AGC ON/OFF
0: OFF
1: ON
Bit[1]:
AWB ON/OFF
0: OFF
1: ON
Bit[0]:
AEC ON/OFF
0: OFF
1: ON
Common Control E
Bit[7]:
SRST
1: Initiates soft reset. All registers are set to default
values after which the chip resumes normal
operation.
Bit[6]:
15
COME
04
RW
Bit[5]:
Bit[4]:
Bit[3]:
Bit[2]:
Bit[1:0]:
16
12
COMF
44
RW
Proprietary to OmniVision Technologies
Mirror image selection
0: Normal
1: Output mirror image
Vertical sync option (see “COMG” on page 13 for details)
Backlight exposure mode ON/OFF
0: OFF
1: ON
Reserved
AGC gain ceiling selection - combined with COMJ[3] (see
“COMJ” on page 13) as follows:
0: 1x to 4x
1: 1x to 8x/16x
Reserved
Common Control F
Bit[7:3]: Reserved
Bit[2]:
Banding filter ON/OFF
0: OFF
1: ON
Bit[1:0]: Reserved
Version 1.1, January 15, 2003
Omni
Register Set
ision
Table 6
Address
(Hex)
17
Device Control Register List
Register
Name
COMG
Default
(Hex)
95
R/W
Description
RW
Common Control G
Bit[7]:
Fast AGC/AEC algorithm ON/OFF
0: OFF
1: ON
Bit[6:5]: Reserved
Bit[4]:
FODD pin (pin 23 - see “FODD/HGAIN” on page 5) output
signal selection - combined with COME[5] (see “COME”
on page 12) as follows:
COMG[4]
0
0
1
Bit[3:0]:
18
AECPT
A5
RW
COME[5]
0
1
X
FODD (pin 23)
VSYNC every field
VSYNC every two fields
FODD (odd field flagged)
Reserved
AEC/AGC Luminance Level Control
Bit[7:4]: Low level luminance percentage
Bit[3:0]: High level luminance percentage
Note: Stable condition is AECPT[7:4] + AECPT[3:0] > 0x0E.
19
BKPT
59
RW
AEC/AGC Luminance Level Control in Backlight Mode
Bit[7:4]: Low level luminance percentage in backlight mode
Bit[3:0]: High level luminance percentage in backlight mode
Note: Stable condition is BKPT[7:4] + BKPTT[3:0] > 0x0E.
1A-1C
RSVD
XX
–
1D
COMJ
30
RW
1E-20
RSVD
XX
–
21
VPT
A4
RW
22-33
RSVD
XX
–
Reserved
Common Control J
Bit[7]:
Pixel clock polarity selection
0: Normal
1: Revised pixel clock output
Bit[6:4]: Reserved
Bit[3]:
AGC gain ceiling - in effect only if COME[2] = "1" (see
“COME” on page 12)
0: 8X
1: 16X
Bit[2]:
Reserved
Bit[1]:
NTSC with 50 Hz light compensation. In effect only when
COMD[0] = "1" (see “COMD” on page 12) and
COMF[2] = "1" (see “COMF” on page 12)
Bit[0]:
Vertical flip selection
0: Normal
1: Vertical flip output image
Reserved
AEC/AGC Fast mode threshold
Bit[7:4]: Fast AEC/AGC low level percentage threshold
Bit[3:0]: Fast AEC/AGC high level percentage threshold
Reserved
NOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
13
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
Package Specifications
The OV7930 uses either a 28-pin ceramic package or 28-pin plastic package. Refer to Figure 6 for ceramic package
information, Figure 7 for plastic package information, and Figure 8 for the array center on the chip.
Figure 6 OV7930 Ceramic Package Specifications
.083 ± .01
.450 SQ ± .008
.060 ± .006
.350 SQ ± .006
.020 ± .002
.020 ± .002
11
12
8
9
5
5
.050
± .004
11
.012 R TYP.
7
6
4
.050 TYP
12
4
.022 ± .004
.001 to .005 TYP
.014 TYP
.010 x 45 o CHAMFER
PIN 1 INDEX
PIN NO. 1
INDEX
.409
± .004
.020 TYP
.300 SQ
± .005
.075
± .010
.300 ± .005
.020 ± .002
.013 MIN
B/F EXPOSURE
.011 MIN
1
1
1
28
28
26
26
28
.025 ± .003
20
23
20
22
21
19
25
.007 MAX
B/F PULL BACK
.110 REF
TYP
.008 R REF
TYP
25
.035
MIN.
.012 R TYP.
.040
TYP
.085 TYP
.200 ± .005
18
19
.009 R REF
TYP
.015 MIN
TYP
MP-2
MP-3
.040 REF
(METALLIZED)
MP-4
CERAMIC
KYOCERA A440
(BLACK)
Table 7
OV7930 Ceramic Package Dimensions
Dimensions
Millimeters (mm)
Inches (in.)
11.43 + 0.20 SQ
.450 + .008 SQ
Package Height
2.11 + 0.25
.083 + .01
Substrate Height
0.51 + 0.05
.020 + .002
7.62 + 0.13 SQ
.300 + .005 SQ
Castellation Height
1.02 + 0.1
.040 + .004
Pin #1 Pad Size
0.64 x 2.16
.025 x .085
Pad Size
0.64 x 1.27
.025 x .050
Pad Pitch
1.27 + 0.10
.050 + .004
Package Edge to First Lead Center
1.91 + 0.25
.075 + .010
End-to-End Pad Center-Center
7.62 + 0.13
.300 + .005
10.41 + 0.10 SQ
.409 + .004 SQ
0.55 + 0.05
.022 + .002
Package Size
Cavity Size
Glass Size
Glass Height
14
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
Omni
Package Specifications
ision
Figure 7 OV7930 Plastic Package Specifications
.093 ± .004
.450 SQ ± .004
.042 ± .002
.075 ± .004
.300 ± .004
.350 SQ ± .006
.028 ± .002
.275 SQ ± .004
.050 ± .004
4
5
.012 x 45 o
11
12
5
11
.050 TYP
8
12
.022 ± .002
7
4
9
.001 to .005 TYP
Pin 1
Index
6
.010 x 45 o Chamfer
Pin 1 Index
.406
± .004
1
1
1
28
28
28
20
26
19
25
18
18
23
21
22
19
25
.009 R REF
TYP
.035
MIN.
.085
TYP
26
.025 ± .003
TYP
.028 ± .002
(Metallized)
Table 8
OV7930 Plastic Package Dimensions
Dimensions
Millimeters (mm)
Inches (in.)
11.43 + 0.10 SQ
.450 + .004 SQ
Package Height
2.35 + 0.1
.093 + .004
Substrate Height
0.70 + 0.05
.028 + .002
7.00 + 0.10 SQ
.275 + .004 SQ
Castellation Height
1.07 + 0.05
.042 + .002
Pin #1 Pad Size
0.64 x 2.16
.025 x .085
Pad Size
0.64 x 1.27
.025 x .050
Pad Pitch
1.27 + 0.10
.050 + .004
Package Edge to First Lead Center
1.90 + 0.10
.075 + .004
End-to-End Pad Center-Center
7.62 + 0.10
.300 + .004
10.30 + 0.10 SQ
.406 + .004 SQ
0.55 + 0.05
.022 + .002
Package Size
Cavity Size
Glass Size
Glass Height
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
15
OV7930
Color CMOS Analog CAMERACHIP™
Omni
ision
Sensor Array Center
Figure 8 OV7930 Sensor Array Center
1
Scan Origin
Die
Sensor
Array
Package Center
(0,0)
Positional Tolerance s
Die shift (x,y) = 0.15 mm (6 mils) max.
Die tilt = 1 degrees max.
Die rotation = 3 degrees max.
Array Center
(276µm, -89µm)
NOTES: 1. This drawing is not to scale and is for reference only.
2. As most optical assemblies invert and mirror the image, the chip is typically mounted
with pin one oriented down on the PCB.
16
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
Omni
Package Specifications
ision
Note:
•
All information shown herein is current as of the revision and publication date. Please refer
to the OmniVision web site (http://www.ovt.com) to obtain the current versions of all
documentation.
•
OmniVision Technologies, Inc. reserves the right to make changes to their products or to
discontinue any product or service without further notice (It is advisable to obtain current product
documentation prior to placing orders).
•
Reproduction of information in OmniVision product documentation and specifications is
permissible only if reproduction is without alteration and is accompanied by all associated
warranties, conditions, limitations and notices. In such cases, OmniVision is not responsible
or liable for any information reproduced.
•
This document is provided with no warranties whatsoever, including any warranty of
merchantability, non-infringement, fitness for any particular purpose, or any warranty
otherwise arising out of any proposal, specification or sample. Furthermore, OmniVision
Technologies Inc. disclaims all liability, including liability for infringement of any proprietary
rights, relating to use of information in this document. No license, expressed or implied, by
estoppels or otherwise, to any intellectual property rights is granted herein.
•
‘OmniVision’, ‘CameraChip’ are trademarks of OmniVision Technologies, Inc. All other trade,
product or service names referenced in this release may be trademarks or registered trademarks of
their respective holders. Third-party brands, names, and trademarks are the property of their
respective owners.
For further information, please feel free to contact OmniVision at info@ovt.com.
OmniVision Technologies, Inc.
Sunnyvale, CA USA
(408) 733-3030
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
17
OV7930
18
Color CMOS Analog CAMERACHIP™
Proprietary to OmniVision Technologies
Omni
ision
Version 1.1, January 15, 2003