TS274C,I,M HIGH PERFORMANCE CMOS QUAD OPERATIONAL AMPLIFIERS ■ OUTPUT VOLTAGE CAN SWING TO GROUND ■ EXCELLENT PHASE MARGIN ON CAPACITIVE LOADS ■ GAIN BANDWIDTH PRODUCT: 3.5MHz ■ STABLE AND LOW OFFSET VOLTAGE N DIP14 (Plastic Package) ■ THREE INPUT OFFSET VOLTAGE SELECTIONS DESCRIPTION The TS274 devices are low cost, quad operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the ST silicon gate CMOS process allowing an excellent consumption-speed ration. These series are ideally suited for low consumption applications. D SO14 (Plastic Micropackage) Three power consumptions are available allowing to have always the best consumption-speed ratio: ❑ ICC = 10µA/amp.: TS27L4 (very low power) ❑ ICC = 150µA/amp.: TS27M4 (low power) ❑ ICC = 1mA/amp.: TS274 (standard) These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantage versus JFET devices is the very low input currents drift with temperature (see figure 2). ORDER CODE Part Number P TSSOP14 (Thin Shrink Small Outline Package) PIN CONNECTIONS (top view) Output 1 1 Temperature Range TS274C/AC/BC 0°C, +70°C TS274I/AI/BI -40°C, +125°C TS274M/AM/BM -55°C, +125°C Example : TS274ACN Package N • • • D • • • P • • • 14 Output 4 Inverting Input 1 2 - - 13 Inverting Input 4 Non-inverting Input 1 3 + + 12 Non-inverting Input 4 VCC + 4 11 VCC - Non-inverting Input 2 5 + + Inverting Input 2 6 - - Output 2 7 10 Non-inverting Input 3 9 Inverting Input 3 8 Output 3 N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) November 2001 1/9 TS274C,I,M BLOCK DIAGRAM VCC Current source xI Input differential Output stage Second stage Output VCC E E ABSOLUTE MAXIMUM RATINGS Symbol VCC+ Vid Vi Parameter TS274C/AC/BC Supply Voltage 1) Differential Input Voltage 2) Input Voltage 3) Io Output Current for Iin Input Current VCC+ ≥ 15V TS274I/AI/BI TS274M/AM/BM 18 V ±18 V -0.3 to 18 V ±30 mA ±5 Toper Operating Free-Air Temperature Range Tstg Storage Temperature Range 0 to +70 Unit mA -40 to +125 -55 to +125 °C °C -65 to +150 1. All values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. OPERATING CONDITIONS Symbol VCC+ Vicm 2/9 Parameter Value Unit Supply Voltage 3 to 16 V Commod Mode Input Voltage Range VCC+ V 0 to - 1.5 T20 T19 T17 T24 T21 T 18 R2 T 25 VCC T 22 T 23 T 26 T29 T 28 T27 Input T3 T1 T5 VCC T4 T2 C1 Input R1 T7 T6 T9 T8 T 13 T11 T 10 T 14 T 12 T 16 Output T 15 TS274C,I,M SCHEMATIC DIAGRAM (for 1/4 TS274) 3/9 TS274C,I,M ELECTRICAL CHARACTERISTICS VCC+ = +10V, VCC-= 0V, Tamb = +25°C (unless otherwise specified) TS274C/AC/BC Symbol Parameter Min. Input Offset Voltage VO = 1.4V, Vic = 0V Vio DV io Iio Iib Tmin ≤ Tamb ≤ Tmax TS274C/I/M TS274AC/AI/AM TS274B/C/I/M TS274C/I/M TS274AC/AI/AM TS274B/C/I/M Input Offset Voltage Drift Input Offset Current note Vic = 5V, V O = 5V Tmin ≤ Tamb ≤ Tmax Typ. Max. 1.1 0.9 0.25 10 5 2 12 6.5 3 TS274I/AI/BI TS274M/AM/BM Min. Typ. 1.1 0.9 0.25 2 mV µV/°C 2 1 Input Bias Current - see note 1 V ic = 5V, VO = 5V T min ≤ Tamb ≤ Tmax VOH High Level Output Voltage V id = 100mV, R L = 10kΩ T min ≤ Tamb ≤ Tmax VOL Low Level Output Voltage V id = -100mV Avd Large Signal Voltage Gain ViC = 5V, RL = 10kΩ, Vo = 1V to 6V Tmin ≤ Tamb ≤ Tmax 1 100 1 1 150 8.2 8.1 8.4 8.2 8 15 8.4 V 50 10 6 15 CMR Common Mode Rejection Ratio V iC = 1V to 7.4V, V o = 1.4V 65 80 65 80 SVR Supply Voltage Rejection Ratio V CC+ = 5V to 10V, Vo = 1.4V 60 70 60 70 ICC Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin ≤ Tamb ≤ Tmax 3.5 1000 pA 300 50 10 7 pA 200 Gain Bandwidth Product A v = 40dB, RL = 10kΩ, CL = 100pF, fin = 100kHz V/mV MHz 3.5 1500 1600 1000 mV dB dB 1500 1700 µA Io Output Short Circuit Current Vo = 0V, V id = 100mV 60 60 Isink Output Sink Current Vo = VCC, Vid = -100mV 45 45 SR Slew Rate at Unity Gain R L = 10kΩ, CL = 100pF, Vi = 3 to 7V 5.5 5.5 φm Phase Margin at Unity Gain A v = 40dB, R L = 10kΩ, CL = 100pF 40 40 KOV Overshoot Factor 30 30 % Equivalent Input Noise Voltage f = 1kHz, Rs = 100Ω 30 30 nV -----------Hz Channel Separation 120 120 dB en Vo1/Vo2 4/9 10 5 2 12 6.5 3.5 1) GBP 1. Unit Max. Maximum values including unavoidable inaccuracies of the industrial test. mA mA V/µs Degrees TS274C,I,M TYPICAL CHARACTERISTICS 2 .0 1 .5 Ta mb = 25 C AV = 1 V =V /2 O 1 .0 CC 0 .5 0 4 8 12 S UPP LY VOLTAGE, VCC (V) 20 16 12 VCC = 10V 8 4 0 -50 -40 -30 -20 OUTPUT CURRENT, I -10 0 OH (mA) OUTPUT VOLTAGE, VOL (V) Figure 4a : Low Level Output Voltage versus Low Level Output Current 100 VCC = 10V Vic = 5V 10 1.0 0.8 V CC = 3V 0.6 V CC = 5V 0.4 T a mb = 25 C Vic = 0 .5V V = -100mV 0.2 id 1 25 50 75 100 125 0 TEMPERATURE, T amb (°C) 5 T amb = 25°C V id = 100mV 4 3 VCC = 5V 2 VCC = 3V 1 0 -10 -8 -6 -4 -2 OUTPUT CURRENT, I OH (mA) 0 1 2 OUTP UT CURRENT, IOL (mA) 3 Figure 4b : Low Level Output Voltage versus Low Level Output Current OUTPUT VOLTAGE, VOL (V) Figure 3a : High Level Output Voltage versus High Level Output Current OUTPUT VOLTAGE,V OH (V) Tamb = 25°C V id = 100mV VCC = 16V 16 Figure 2 : Input Bias Current versus Free Air Temperature INPUT BIAS CURRENT, I IB (pA) Figure 3b : High Level Output Voltage versus High Level Output Current OUTPUT VOLTAGE,V OH (V) SUPPLY CURRENT, ICC ( A) Figure 1 : Supply Current (each amplifier) versus Supply Voltage 3 VCC = 10V VCC = 16 V 2 1 Ta mb = 25 C Vi = 0.5V V = -100 mV id 0 4 8 12 16 OUTP UT CURRENT, I OL (mA) 20 5/9 TS274C,I,M 40 0 G A IN G A IN (dB ) 30 45 PHA SE Phase Margin T a m b = 2 5 °C V C C+ = 10 V R L = 10k Ω C L = 1 00 p F A V C L = 1 00 20 10 0 13 5 2 10 3 18 0 Gain Bandwidth Product -1 0 10 90 10 4 10 5 10 6 10 P H A S E (D e gre es ) 50 7 Figure 8 : Phase Margin versus Capacitive Load P H A S E M A R G IN , φ m (D e g re e s ) Figure 5 : Open Loop Frequency Response and Phase Shift 70 Ta m b = 2 5° C RL = 10kΩ AV = 1 V C C = 10 V 60 50 40 30 0 20 40 60 80 F R E Q U E N C Y , f (H z) C A P A C IT A N C E , C 5 7 4 3 Ta m b = 25 °C RL = 10k Ω CL = 10 0p F AV = 1 2 1 8 12 Ta m b = 2 5 °C R L = 10k Ω CL = 1 0 0 p F 6 4 SR 3 16 4 6 8 10 12 S U P P L Y V O L T A G E , VC C S U P P LY V O L T A G E , V C C (V ) 48 44 40 36 Ta m b = 2 5 °C RL = 10k Ω CL = 1 0 0p F AV = 1 32 16 3 00 VC C = 10 V Tamb = 2 5 °C R S = 1 0 0Ω 2 00 10 0 0 0 4 8 12 S U P P L Y V O LT A G E , V C C (V ) 6/9 14 (V ) Figure 10 : Input Voltage Noise versus Frequency E Q U IV A L E N T IN P U T N O IS E V O L T A G E (n V /V H z ) PH A SE M A R G IN , φ m (D e g re e s) Figure 7 : Phase Margin versus Supply Voltage SR 5 2 4 0 28 (p F ) Figure 9 : Slew Rate versus Supply Voltage S L E W R A T E S , S R (V / µs ) G A IN B A N D W . P R O D ., G B P (M H z ) Figure 6 : Gain Bandwidth Product versus Supply Voltage L 100 16 1 1 00 10 F R E Q U E N C Y (H z ) 1 000 TS274C,I,M PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIP Millimeters Inches Dim. Min. a1 0.51 B b b1 D E e e3 F i L Z 1.39 Typ. Max. Min. Typ. 0.020 1.65 0.055 0.5 0.25 0.065 0.020 0.010 20 0.787 8.5 2.54 15.24 0.335 0.100 0.600 7.1 5.1 0.280 0.201 3.3 1.27 Max. 0.130 2.54 0.050 0.100 7/9 TS274C,I,M PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO) G c1 s e3 b1 e a1 b A a2 C L E D M 8 1 7 F 14 Millimeters Inches Dim. Min. Typ. A a1 a2 b b1 C c1 D (1) E e e3 F (1) G L M S Max. Min. Typ. 1.75 0.1 0.069 0.2 1.6 0.46 0.25 0.35 0.19 Max. 0.004 0.008 0.063 0.018 0.010 0.014 0.007 0.5 0.020 45° (typ.) 8.55 5.8 8.75 6.2 0.336 0.228 1.27 7.62 3.8 4.6 0.5 0.344 0.244 0.050 0.300 4.0 5.3 1.27 0.68 0.150 0.181 0.020 0.157 0.208 0.050 0.027 8° (max.) Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK. 8/9 TS274C,I,M PACKAGE MECHANICAL DATA 14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) k c 0,25 mm A C PLANE SEATING E1 L1 L .010 inch GAGE PLANE E A2 7 aaa C D 8 e b A1 14 1 PIN 1 IDENTIFICATION Millimeters Inches Dimensions Min. Typ. A Max. Min. Typ. 1.20 A1 A2 b c D E E1 e k L L1 aaa 0.05 0.80 0.19 0.09 4.90 4.30 0° 0.450 1.00 5.00 6.40 4.40 0.65 0.600 1.00 0.05 0.15 1.05 0.30 0.20 5.10 0.01 0.031 0.007 0.003 0.192 4.50 0.169 8° 0.750 0° 0.018 0.100 Max. 0.039 0.196 0.252 0.173 0.025 0.024 0.039 0.006 0.041 0.15 0.012 0.20 0.177 8° 0.030 0.004 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or systems withou t express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Swit zerland - United Kingdom - United States http://www. st.com 9/9