ETC TS27L4AIN

TS27L4C,I,M
PRECISION VERY LOW POWER CMOS
QUAD OPERATIONAL AMPLIFIER
■ VERY LOW POWER CONSUMPTION :
10µA/op
■ OUTPUT VOLTAGE CAN SWING TO
GROUND
■ EXCELLENT PHASE MARGIN ON
N
DIP14
(Plastic Package)
CAPACITIVE LOADS
■ STABLE AND LOW OFFSET VOLTAGE
■ THREE INPUT OFFSET VOLTAGE
SELECTIONS
DESCRIPTION
These devices are low cost, low power quad operational amplifiers designed to operate with single
or dual supplies. These operational amplifiers use
the ST silicon gate CMOS process allowing an excellent consumption-speed ratio. These series are
ideally suited for low consumption applications.
Three power consumptions are available allowing
to have always the best consumption-speed ratio:
❑ ICC = 10µA/amp.: TS27L4 (very low power)
❑ ICC = 150µA/amp.: TS27M4 (low power)
D
SO14
(Plastic Micropackage)
P
TSSOP14
(Thin Shrink Small Outline Package)
PIN CONNECTIONS (top view)
❑ ICC = 1mA/amp.: TS274 (standard)
These CMOS amplifiers offer very high input impedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input currents drift with temperature (see figure 2).
ORDER CODE
Package
Part Number
Temperature Range
TS27L4C/AC/BC
0°C, +70°C
TS27L4I/AI/BI
-40°C, +125°C
TS27L4M/AM/BM
-55°C, +125°C
Example : TS27L4ACN
N
D
P
•
•
•
•
•
•
•
•
•
Output 1 1
14 Output 4
Inverting Input 1 2
-
-
13 Inverting Input 4
Non-inverting Input 1 3
+
+
12 Non-inverting Input 4
11 VCC -
VCC + 4
Non-inverting Input 2 5
+
+
10 Non-inverting Input 3
Inverting Input 2 6
-
-
9
Inverting Input 3
8
Output 3
Output 2 7
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available
in Tape & Reel (PT)
November 2001
1/9
TS27L4C,I,M
BLOCK DIAGRAM
VCC
Current
source
xI
Input
differential
Output
stage
Second
stage
Output
VCC
E
E
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC+
Vid
Vi
Parameter
TS27L4C/AC/BC
TS27L4I/AI/BI
TS27L4M/AM/BM
Unit
Supply Voltage 1)
18
V
Differential Input Voltage 2)
±18
V
-0.3 to 18
V
±30
mA
Input Voltage
3)
Io
Output Current for
Iin
Input Current
VCC+
≥ 15V
±5
Toper
Operating Free-Air Temperature Range
Tstg
Storage Temperature Range
0 to +70
mA
-40 to +125
-55 to +125
°C
°C
-65 to +150
1. All values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage.
OPERATING CONDITIONS
Symbol
VCC+
Vicm
2/9
Parameter
Value
Unit
Supply Voltage
3 to 16
V
Common Mode Input Voltage Range
VCC+
V
0 to
- 1.5
T20
T19
T17
T24
T 21
T 18
R2
T 25
VCC
T 22
T 23
T 26
T 29
T 28
T 27
Inpu t
T3
T1
T5
VCC
T4
T2
C1
Input
R1
T7
T6
T9
T8
T 13
T 11
T 10
T 14
T 12
T16
Output
T 15
TS27L4C,I,M
SCHEMATIC DIAGRAM (for 1/4 TS27L4)
3/9
TS27L4C,I,M
ELECTRICAL CHARACTERISTICS
VCC+ = +10V, VCC-= 0V, Tamb = +25°C (unless otherwise specified)
TS27L4C/AC/BC
Symbol
Parameter
Min.
Input Offset Voltage
VO = 1.4V, Vic = 0V
Vio
DV io
Iio
Iib
Tmin ≤ Tamb ≤ Tmax
TS27L4C/I/M
TS27L4AC/AI/AM
TS27L4B/C/I/M
TS27L4C/I/M
TS27L4AC/AI/AM
TS27L4B/C/I/M
Input Offset Voltage Drift
Input Offset Current note
Vic = 5V, V O = 5V
Tmin ≤ Tamb ≤ Tmax
Typ.
Max.
1.1
0.9
0.25
10
5
2
12
6.5
3
TS27L4I/AI/BI
TS27L4M/AM/BM
Min.
Typ.
1.1
0.9
0.25
2
mV
µV/°C
2
1
Input Bias Current - see note 1
V ic = 5V, VO = 5V
T min ≤ Tamb ≤ Tmax
VOH
High Level Output Voltage
V id = 100mV, R L = 1MΩ
T min ≤ Tamb ≤ Tmax
VOL
Low Level Output Voltage
V id = -100mV
Avd
Large Signal Voltage Gain
ViC = 5V, RL = 1MΩ, V o = 1V to 6V
Tmin ≤ Tamb ≤ Tmax
1
100
1
1
150
8.8
8.7
9
8.8
8.6
100
9
V
50
60
40
100
CMR
Common Mode Rejection Ratio
V iC = 1V to 7.4V, V o = 1.4V
65
80
65
80
SVR
Supply Voltage Rejection Ratio
V CC+ = 5V to 10V, Vo = 1.4V
60
80
60
80
ICC
Supply Current (per amplifier)
Av = 1, no load, Vo = 5V
Tmin ≤ Tamb ≤ Tmax
0.1
10
pA
300
50
60
45
pA
200
Gain Bandwidth Product
A v = 40dB, RL = 1MΩ, C L = 100pF, fin = 100kHz
V/mV
MHz
0.1
15
17
10
mV
dB
dB
15
18
µA
Io
Output Short Circuit Current
Vo = 0V, V id = 100mV
60
60
Isink
Output Sink Current
Vo = VCC, Vid = -100mV
45
45
SR
Slew Rate at Unity Gain
R L = 1MΩ, CL = 100pF, Vi = 3 to 7V
0.04
0.04
φm
Phase Margin at Unity Gain
A v = 40dB, R L = 1MΩ, CL = 100pF
45
45
KOV
Overshoot Factor
30
30
%
Equivalent Input Noise Voltage
f = 1kHz, Rs = 100Ω
68
68
nV
-----------Hz
Channel Separation
120
120
dB
en
Vo1/Vo2
4/9
10
5
2
12
6.5
3.5
1)
GBP
1.
Unit
Max.
Maximum values including unavoidable inaccuracies of the industrial test.
mA
mA
V/µs
Degrees
TS27L4C,I,M
TYPICAL CHARACTERISTICS
SUPPLY CURRENT, ICC ( A)
Figure 1 : Supply Current (each amplifier) versus
Supply Voltage
OUTPUT VOLTAGE, V OH (V)
2.0
Ta mb = 25 C
AV = 1
V =V /2
1.5
O
1.0
CC
0.5
0
4
8
12
S UP PLY VOLTAGE, VC C (V)
10
1
100
12
4
0.8
T amb = 25°C
V id = 100mV
VCC = 5V
2
0
VCC = 3V
-10
-8
-6
-4
-2
OUTPUT CURRENT, I OH (mA)
-10
(mA)
0
OH
0
V CC = 3V
0.6
V CC = 5V
0.4
T a mb = 25 C
Vic = 0.5V
V id = -100mV
0.2
0
1
2
OUTPUT CURRENT, I OL (mA)
3
Figure 4b : Low Level Output Voltage versus Low
Level Output Current
OUTPUT VOLTAGE, VOL (V)
OUTPUT VOLTAGE,V OH (V)
5
1
-40
-30
-20
OUTPUT CURRENT, I
1.0
125
Figure 3a : High Level Output Voltage versus
High Level Output Current
3
VCC = 10V
8
TEMPERATURE, T amb (°C)
4
VCC = 16V
0
-50
OUTPUT VOLTAGE, VOL (V)
INPUT BIAS CURRENT, I IB (pA)
VCC = 10V
Vic = 5V
75
16
T amb = 25°C
V id = 100mV
Figure 4a : Low Level Output Voltage versus Low
Level Output Current
100
50
20
16
Figure 2 : Input Bias Current versus Free Air
Temperature
25
Figure 3b : High Level Output Voltage versus
High Level Output Current
3
VCC = 10V
VCC = 16V
2
1
T a mb = 25 C
Vi = 0.5V
V = -100mV
id
0
4
8
12
16
OUTPUT CURRENT, I OL (mA)
20
5/9
TS27L4C,I,M
40
0
G A IN (dB )
G A IN
30
45
P HA SE
Phase
Margin
T amb = 2 5 °C
V CC+ = 1 0 V
R L = 1 MΩ
C L = 100pF
A VCL = 10 0
20
10
0
13 5
2
10
3
18 0
Gain
Bandwidth
Product
-1 0
10
90
10
4
10
5
10
6
10
P H A S E (D eg re e s)
50
7
Figure 8 : Phase Margin versus Capacitive Load
P H A S E M A R G IN , φ m (D e gree s )
Figure 5 : Open Loop Frequency Response and
Phase Shift
80
T amb = 25 °C
R L = 1M Ω
AV = 1
V CC= 1 0 V
70
60
50
40
0
F R E Q U E N C Y , f (H z)
20
40
60
80
1 00
C A P A C IT A N C E , C L (p F )
Figure 9 : Slew Rate versus Supply Voltage
12 0
10 0
80
0 .0 5
T amb = 2 5 °C
R L = 1M Ω
C
= 1 00 p F
L
AV = 1
S L E W R A T E S , S R (V /µ s)
G A IN B A N D W . P R O D ., G B P (M H z )
Figure 6 : Gain Bandwidth Product versus Supply
Voltage
60
40
T amb = 2 5 ° C
R L = 1M Ω
C = 100 pF
L
SR
0 .0 4
SR
0 .0 3
0 .0 2
0
4
8
12
4
16
6
8
10
12
14
S U P P L Y V O L T A G E , VCC (V )
16
S U P P L Y V O L T A G E , V CC (V )
60
T amb = 2 5 °C
R
= 1 MΩ
L
C
= 100pF
L
A = 1
V
50
40
30
300
VCC = 10V
Tamb = 25°C
R S = 100Ω
200
100
0
0
4
8
12
S U P P L Y V O L TA G E , V CC (V )
6/9
Figure 10 : Input Voltage Noise versus
Frequency
EQUIVALENTINPUT NOISE
VOLTAGE (nV/VHz)
P H A S E M A R G IN , φ m (D egree s )
Figure 7 : Phase Margin versus Supply Voltage
16
1
100
10
FREQUENCY (Hz)
1000
TS27L4C,I,M
PACKAGE MECHANICAL DATA
14 PINS - PLASTIC DIP
Millimeters
Inches
Dim.
Min.
a1
0.51
B
b
b1
D
E
e
e3
F
i
L
Z
1.39
Typ.
Max.
Min.
Typ.
0.020
1.65
0.055
0.5
0.25
0.065
0.020
0.010
20
0.787
8.5
2.54
15.24
0.335
0.100
0.600
7.1
5.1
0.280
0.201
3.3
1.27
Max.
0.130
2.54
0.050
0.100
7/9
TS27L4C,I,M
PACKAGE MECHANICAL DATA
14 PINS - PLASTIC MICROPACKAGE (SO)
G
c1
s
e3
b1
e
a1
b
A
a2
C
L
E
D
M
8
1
7
F
14
Millimeters
Inches
Dim.
Min.
Typ.
A
a1
a2
b
b1
C
c1
D (1)
E
e
e3
F (1)
G
L
M
S
Max.
Min.
Typ.
1.75
0.1
0.069
0.2
1.6
0.46
0.25
0.35
0.19
Max.
0.004
0.008
0.063
0.018
0.010
0.014
0.007
0.5
0.020
45° (typ.)
8.55
5.8
8.75
6.2
0.336
0.228
1.27
7.62
3.8
4.6
0.5
0.344
0.244
0.050
0.300
4.0
5.3
1.27
0.68
0.150
0.181
0.020
0.157
0.208
0.050
0.027
8° (max.)
Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK.
8/9
TS27L4C,I,M
PACKAGE MECHANICAL DATA
14 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
k
c
0,25 mm
C
PLANE
SEATING
E1
L1
L
.010 inch
GAGE PLANE
E
A
A2
7
aaa
C
D
8
e
b
A1
14
1
PIN 1 IDENTIFICATION
Millimeters
Inches
Dim.
Min.
Typ.
A
Max.
Min.
Typ.
1.20
A1
A2
b
c
D
E
E1
e
k
l
0.05
0.80
0.19
0.09
4.90
4.30
0°
0.50
1.00
5.00
6.40
4.40
0.65
0.60
Max.
0.05
0.15
1.05
0.30
0.20
5.10
0.01
0.031
0.007
0.003
0.192
4.50
0.169
8°
0.75
0°
0.09
0.039
0.196
0.252
0.173
0.025
0.0236
0.006
0.041
0.15
0.012
0.20
0.177
8°
0.030
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the
consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or
systems withou t express written approval of STMicroelectronics.
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 2001 STMicroelectronics - Printed in Italy - All Rights Reserved
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