Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16373T CY74FCT162373T 16-Bit Latches SCCS054B - August 1994 - Revised September 2001 Features Functional Description • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temperature range of −40˚C to +85˚C • VCC = 5V ± 10% CY74FCT16373T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT16373T and CY74FCT162373T are 16-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 8-bit latches or as a single 16-bit latch by connecting the Output Enable (OE) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16373T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162373T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162373T is ideal for driving transmission lines. CY74FCT162373T Features: • Balanced 24 mA output drivers • Reduced system switching noise • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C Pin Configuration Logic Block Diagrams SSOP/TSSOP Top View 1OE 1LE 1D1 D 1O1 C TO 7 OTHER CHANNELS FCT162373-1 2OE 2LE 2D1 D 2O1 C TO 7 OTHER CHANNELS 1OE 1 48 1O1 2 47 1D1 1O2 3 46 1D2 GND 4 45 GND 1O3 5 44 1D3 1O4 6 43 1D4 VCC 1O5 7 42 8 41 VCC 1D5 1O6 1LE 9 40 1D6 GND 10 39 GND 1O7 11 38 1D7 1O8 37 36 1D8 2O1 12 13 2O2 14 35 2D2 GND 15 34 GND 2O3 16 33 2D3 2O4 17 32 2D4 VCC 2O5 18 31 19 30 VCC 2D5 2D1 2O6 20 29 2D6 GND 21 28 GND 2O7 22 27 2D7 2O8 23 26 2D8 2OE 24 25 2LE FCT162373-2 FCT162373-3 Copyright © 2001, Texas Instruments Incorporated CY74FCT16373T CY74FCT162373T Maximum Ratings[2, 3] Pin Description Name Description D Data Inputs LE Latch Enable Inputs (Active HIGH) OE Output Enable Inputs (Active LOW) O Three-State Outputs (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ...................... Com’l −55°C to +125°C Ambient Temperature with Power Applied................................. Com’l −55°C to +125°C DC Input Voltage .................................................−0.5V to +7.0V DC Output Voltage ..............................................−0.5V to +7.0V Function Table[1] Inputs Outputs DC Output Current (Maximum Sink Current/Pin) ...........................−60 to +120 mA D LE OE O Power Dissipation .......................................................... 1.0W H H L H Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) L H L L X L L Q0 X X H Z Operating Range Range Industrial Ambient Temperature VCC −40°C to +85°C 5V ± 10% Electrical Characteristics Over the Operating Range Parameter Description Test Conditions VIH Input HIGH Voltage VIL Input LOW Voltage VH Input Hysteresis[5] VIK Input Clamp Diode Voltage VCC=Min., IIN=−18 mA IIH Input HIGH Current IIL IOZH Min. Typ.[4] Max. 2.0 Unit V 0.8 100 −1.2 V VCC=Max., VI=VCC ±1 µA Input LOW Current VCC=Max., VI=GND ±1 µA High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=2.7V ±1 µA IOZL High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=0.5V ±1 µA IOS Short Circuit Current[6] VCC=Max., VOUT=GND −80 −200 mA Current[6] VCC=Max., VOUT=2.5V −50 −180 mA ±1 µA Max. Unit IO Output Drive IOFF Power-Off Disable −0.7 V mV −140 VCC=0V, VOUT≤4.5V[7] Output Drive Characteristics for CY74FCT16373T Parameter VOH VOL Description Output HIGH Voltage Output LOW Voltage Min. Typ.[4] VCC=Min., IOH=−3 mA 2.5 3.5 V VCC=Min., IOH=−15 mA 2.4 3.5 V VCC=Min., IOH=−32 mA 2.0 3.0 Test Conditions VCC=Min., IOL=64 mA 0.2 V 0.55 V Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. Q0=Previous state of flip-flop. 2. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. Typical values are at VCC=5.0V, TA= +25˚C ambient. 5. This parameter is specified but not tested. 6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 7. Tested at +25˚C. 2 CY74FCT16373T CY74FCT162373T Output Drive Characteristics for CY74FCT162373T Parameter Description [6] Test Conditions Min. Typ.[4] Max. Unit IODL Output LOW Current VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA IODH Output HIGH Current[6] VCC=5V, VIN=VIH or VIL, VOUT=1.5V −60 −115 −150 mA VOH Output HIGH Voltage VCC=Min., IOH=−24 mA 2.4 3.3 VOL Output LOW Voltage VCC=Min., IOL=24 mA V 0.3 0.55 V Typ.[4] Max. Unit Capacitance[5] (TA = +25˚C, f = 1.0 MHz) Parameter Description Test Conditions CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 pF Power Supply Characteristics Parameter Description Test Conditions Typ.[4] Max. Unit 5 500 µA ICC Quiescent Power Supply Current VCC=Max. VIN≤0.2V, VIN≥VCC−0.2V ∆ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max. VIN=3.4V[8] 0.5 1.5 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE=GND VIN=VCC or VIN=GND 60 100 µA/MHz IC Total Power Supply Current[10] VCC=Max., f1=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling, OE=GND, LE=VCC VIN=VCC or VIN=GND 0.6 1.5 mA VIN=3.4V or VIN=GND 0.9 2.3 mA VCC=Max., f1=2.5 MHz, VIN=VCC or 50% Duty Cycle, Outputs VIN=GND Open, Sixteen Bits Toggling, VIN=3.4V or OE=GND, LE=VCC VIN=GND 2.4 4.5[11] mA 6.4 16.5[11] mA Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 10. IC= IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input(VIN=3.4V) = Duty Cycle for TTL inputs HIGH DH = Number of TTL inputs at DH NT ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 3 CY74FCT16373T CY74FCT162373T Switching Characteristics Over the Operating Range[12] CY74FCT16373AT CY74FCT162373AT Parameter Description Min. Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay D to O 1.5 5.2 ns 1, 3 tPLH tPHL Propagation Delay LE to O 2.0 6.7 ns 1, 5 tPZH tPZL Output Enable Time 1.5 6.1 ns 1, 7, 8 tPHZ tPLZ Output Disable Time 1.5 5.5 ns 1, 7, 8 tSU Set-Up Time HIGH or LOW, D to LE 2.0 ns 9 tH Hold Time HIGH or LOW, D to LE 1.5 ns 9 tW LE Pulse Width HIGH 3.3 tSK(O) Output Skew[14] 0.5 ns 5 ns — CY74FCT16373CT CY74FCT162373CT Parameter Description Min. Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay D to O 1.5 4.2 ns 1, 3 tPLH tPHL Propagation Delay LE to O 2.0 5.5 ns 1, 5 tPZH tPZL Output Enable Time 1.5 5.5 ns 1, 7, 8 tPHZ tPLZ Output Disable Time 1.5 5.0 ns 1, 7, 8 tSU Set-Up Time HIGH or LOW, D to LE 2.0 ns 9 tH Hold Time HIGH or LOW, D to LE 1.5 ns 9 tW LE Pulse Width HIGH 3.3 ns 5 ns — tSK(O) Output Skew[14] 0.5 Notes: 12. Minimum limits are specified but not tested on Propagation Delays. 13. See “Parameter Measurement Information” in the General Information section. 14. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design. 4 CY74FCT16373T CY74FCT162373T Ordering Information CY74FCT16373 Speed (ns) 4.2 5.2 Ordering Code Package Name Package Type CY74FCT16373CTPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT16373CTPVC/PVCT O48 48-Lead (300-Mil) SSOP CY74FCT16373ATPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT16373ATPVC/PVCT O48 48-Lead (300-Mil) SSOP Operating Range Industrial Industrial Ordering Information CY74FCT162373 Speed (ns) 4.2 5.2 Ordering Code Package Name Package Type 74FCT162373CTPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162373CTPVC O48 48-Lead (300-Mil) SSOP 74FCT162373CTPVCT O48 48-Lead (300-Mil) SSOP 74FCT162373ATPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162373ATPVC O48 48-Lead (300-Mil) SSOP 74FCT162373ATPVCT O48 48-Lead (300-Mil) SSOP 5 Operating Range Industrial Industrial CY74FCT16373T CY74FCT162373T Package Diagrams 48-Lead Shrunk Small Outline Package O48 48-Lead Thin Shrunk Small Outline Package Z48 6 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third–party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2001, Texas Instruments Incorporated