RT9173B Preliminary 2A Bus Termination Regulator General Description The RT9173B regulator is designed to convert voltage supplies ranging from 1.7V to 6V into a desired output voltage of which adjusted by two external voltage divider resistors. The regulator is capable of sourcing or sinking up to 2A of current while regulating an output voltage to within 40mV. The RT9173B, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. The voltage output of the regulator can be used as a termination voltage for DDR SDRAM. Current limits in both sourcing and sinking mode, plus on-chip thermal shutdown make the circuit tolerant of the output fault conditions. The RT9173B are available in the popular 5-lead TO-252 and fused SOP-8 (the multiple VCNTL pins on the SOP-8 package are internally connected but lowest thermal resistance) surface mount packages. Ordering Information RT9173B Package Type S : SOP-8 L5 : TO-252-5 Features Support Both DDR I (1.25VTT) and DDR II (0.9VTT) Requirements SOP-8 and TO-252-5 Packages Capable of Sourcing and Sinking Current Current-limiting Protection Thermal Protection Integrated Power MOSFETs Generates Termination Voltages for SSTL-2 High Accuracy Output Voltage at Full-Load Adjustable VOUT by External Resistors Minimum External Components Shutdown for Standby or Suspend Mode Operation with High-impedance Output Applications DDR Memory Termination Supply Active Termination Buses Desktop PC/AGP Graphics Set Top Box/IPC Supply Splitter Pin Configurations Part Number RT9173BCS (Plastic SOP-8) Operating Temperature Range C: Commercial Standard Pin Configurations TOP VIEW VIN 1 8 VCNTL GND 2 7 VCNTL REFEN 3 6 VCNTL VOUT 4 5 VCNTL TOP VIEW RT9173BCL5 (Plastic TO-252-5) 1 2 3 4 5 DS9173B-00 June 2003 1. 2. 3. 4. 5. VIN GND VCNTL (TAB) REFEN VOUT www.richtek.com 1 RT9173B Preliminary Typical Application Circuit VCNTL = 3.3V VIN = 2.5V RTT C CNTL R1 VCNTL VIN RT9173B EN VOUT REFEN 2N7002 R2 CIN GND C OUT R DUMMY R1 = R2 = 100KΩ, RTT = 50Ω / 33Ω / 25Ω COUT(min.) = 10µF (Ceramic) + 1000µF under the worst case test condition RDUMMY = 1kΩ as for VOUT discharge when VIN is not present but VCNTL is present CIN = 470µF (Low ESR), CCNTL = 47µF Pin Description Pin Name Pin Function VIN Supply Input GND Common Ground VCNTL Gate Drive Voltage REFEN Reference Voltage Input and Chip Enable VOUT Output Voltage Function Block Diagram VCNTL VIN Current Limiting Sensor CNTL REFEN VOUT Thermal GND www.richtek.com 2 DS9173B-00 June 2003 RT9173B Preliminary Absolute Maximum Ratings (Note 1) Input Voltage Power Dissipation ESD Susceptibility (Note 2) Storage Temperature Range Lead Temperature (Soldering, 10 sec.) Package Thermal Resistance TO-252,θJC SOP-8, θJC 7V Internally Limited 2kV −65°C to 150°C 260°C 8°C/W 15.7°C/W Recommended Operating Conditions (Note 3) −40°C to 125°C Junction Temperature Range Electrical Characteristics (VIN = 2.5V, VCNTL = 3.3V, VREFEN = 1.25V, COUT = 10µF (Ceramic), TA = 25°C unless otherwise specified) Parameter Symbol Output Offset Voltage VOS Load Regulation ∆VLOAD Test Conditions IOUT = 0A, Fig.1 (Note 4) IL : 0 → 2A, Fig.1 IL : 0A → -2A Min Typ Max Units −20 0 20 mV −20 0 20 mV 1.7 2.5/1.8 -- 3 3.3/5 6 VCNTL Keep VCNTL ≥ VIN on operation power on and power off sequences Operating Current of VCNTL ICNTL No Load -- 1 2.5 mA Current In Shutdown Mode ISHDN VREFEN < 0.2V, RL = 180Ω, Fig.2 -- 50 90 µA ILIMIT Fig.3,4 2.2 2.6 -- A 3.3V ≤ VCNTL ≤ 5V 125 170 -- °C 3.3V ≤ VCNTL ≤ 5V -- 35 -- °C Output = High, Fig.5 0.6 -- -- Output = Low, Fig.5 -- -- 0.2 Input Voltage Range (DDR I/II) VIN V Short Circuit Protection Current limit Over Temperature Protection Thermal Shutdown Temperature TSD Thermal Shutdown Hysteresis ∆TSD Shutdown Function Shutdown Threshold Trigger DS9173B-00 June 2003 V www.richtek.com 3 RT9173B Preliminary Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. The human body model is a 100pF capacitor discharged through a 1.5KΩ resistor into each pin. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. VOS offset is the voltage measurement defined as VOUT subtracted from VREFEN. Test Circuit 3.3V 2.5V VCNTL VIN RT9173B REFEN VOUT 1.25V VOUT COUT GND V IL Fig.1 Output Voltage Tolerance, ∆VOUT 3.3V A 2.5V VCNTL VIN RT9173B REFEN VOUT 1.25V VOUT 1.25V 0V GND 0.2V C OUT RL V R L and COUT Time deleay Fig.2 Current in Shutdown Mode, ISHDN 1.25V 3.3V 2.5V VCNTL VIN RT9173B REFEN VOUT GND VOUT A COUT V IL Fig.3 Current Limit for High Side, ICLHIGH www.richtek.com 4 DS9173B-00 June 2003 RT9173B Preliminary Power Supply with Current Limit 2.5V 3.3V A VCNTL VIN RT9173B 1.25V REFEN IL VOUT VOUT COUT GND V Fig.4 Current Limit for Low Side, ICLLOW 2.5V VCNTL VIN RT9173B REFEN VOUT 1.25V VREFEN 3.3V GND 0.2V VOUT RL COUT V 1.25V VOUT 0V VOUT would be low if VREFEN < 0.2V VOUT would be high if VREFEN > 0.6V R L and COUT Time deleay Fig.5 REFEN Pin Shutdown Threshold, VTRIGGER DS9173B-00 June 2003 www.richtek.com 5 RT9173B Preliminary Typical Operating Characteristics Source Current vs. vs. Temperature Source Current Limit Temperature VIN = 1.8V,VCNTL = 5V 3 2.6 VIN = 2.5V, VCNTL = 5V 3.4 Source current (A) Source current (A) 3.4 Source Current vs. Temperature Source Current Limit vs. Temperature 3.8 3.8 VIN = 2.5V,VCNTL = 3.3V 3 2.6 VIN = 1.8V,VCNTL = 3.3V 2.2 2.2 1.8 1.8 -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 95 110 125 5 20 35 50 65 80 95 110 125 Temperature(°C) Temperature(°C) Current vs.vs. Temperature SinkSink Current Limit Temperature Current vs.vs. Temperature SinkSink Current Limit Temperature 3.8 3.8 VIN = 1.8V,VCNTL = 5V 3.4 3 VIN = 2.5V, VCNTL = 5V 2.6 Sink current (A) Sink current (A) 3.4 3 VIN = 1.8V,VCNTL = 3.3V 2.6 VIN = 2.5V,VCNTL = 3.3V 2.2 2.2 1.8 1.8 -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 95 110 125 5 Turn-On Threshold vs. Temperature 50 65 80 95 110 125 Turn-Off Threshold vs. Temperature 0.5 0.5 0.45 VIN = 2.5V, VCNTL = 5V 0.4 VIN = 2.5V,VCNTL = 3.3V Threshold Voltage (V) Threshold Voltage (V) 35 Temperature (°C) Temperature (°C) 0.35 0.3 0.45 0.4 0.35 VIN = 2.5V, VCNTL = 5V VIN = 2.5V,VCNTL = 3.3V 0.3 -40 -25 -10 5 20 35 50 65 80 Temperature (°C) www.richtek.com 6 20 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) DS9173B-00 June 2003 RT9173B Preliminary Output Voltage vs. Temperature Output Voltage vs. Temperature 0.91 VIN = 2.5V VCNTL = 3.3V 1.255 Output Voltage (V) Output Voltage (V) 1.26 1.25 1.245 VIN = 1.8V VCNTL = 3.3V 0.905 0.9 0.895 1.24 0.89 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 Temperature (°C) 2 0 -2 Output Transient Voltage (mV) ≈ VREFEN = 0.9V 100 Swing Frequency: 1kHz 80 95 110 125 VIN = 1.8V VCNTL = 5V 0 -100 Output Current (A) -100 ≈ ≈ 2 0 -2 Time (250us/DIV) 1.25VTT @ 2A Transient Response 1.25VTT @ 2A Transient Response VREFEN = 1.25V 100 Swing Frequency: 1kHz VIN = 2.5V VCNTL = 3.3V 0 -100 ≈ ≈ 2 0 -2 Time (250us/DIV) DS9173B-00 June 2003 Output Transient Voltage (mV) Time (250us/DIV) Output Current (A) Output Transient Voltage (mV) Output Current (A) VIN = 1.8V VCNTL = 3.3V ≈ 65 0.9VTT @ 2A Transient Response 0 Output Current (A) Output Transient Voltage (mV) VREFEN = 0.9V 50 Temperature (°C) 0.9VTT @ 2A Transient Response 100 Swing Frequency: 1kHz 35 VREFEN = 1.25V 100 Swing Frequency: 1kHz VIN = 2.5V VCNTL = 5V 0 -100 ≈ ≈ 2 0 -2 Time www.richtek.com 7 RT9173B Preliminary Output Short-Circuit Protection 5 4 3 2 1 0 VIN = 2.5V VCNTL = 3.3V Sink 12 Output Short Circuit (A) Output Short Circuit (A) VIN = 2.5V VCNTL = 3.3V Source 6 Output Short-Circuit Protection 10 8 6 4 2 0 Force the output shorted to ground Force the output shorted to VDDQ Time (1ms/DIV) Time (1ms/DIV) Power Dissipation vs. Copper Area Power Dissipation vs. Copper Area 300 300 Tj = 125°C 250 TA = 65°C 2 Copper Area Area (mm^2) Copper (mm ) Copper Area (mm ) 2 Copper Area (mm^2) 250 200 150 TA = 55°C TA = 65°C 100 TA = 25°C TO-252 0 0 1 2 3 4 Power Dissipation (W) www.richtek.com 5 200 TA = 25°C 150 100 50 50 8 TA= 55°C Tj = 125°C SOP-8 0 6 0 1 2 3 4 Power Dissipation (W) DS9173B-00 June 2003 Preliminary RT9173B Applications Information Internal parasitic diode Avoid forward-bias internal parasitic diode, VOUT to VCNTL, and VOUT to VIN, the VOUT should not be forced some voltage respect to ground on this pin while the VCNTL or VIN is disappeared. Consideration while designs the resistance of voltage divider Make sure the sinking current capability of pull-down NMOS if the lower resistance was chosen so that the voltage on VREFEN is below 0.2V. In addition to item 1, the capacitor and voltage divider form the low-pass filter. There are two reasons doing this design; one is for output voltage soft-start while another is for noise immunity. How to reduce power dissipation on Notebook PC or the dual channel DDR SDRAM application? In notebook application, using RichTek’s Patent “Distributed Bus Terminator Topology” with choosing RichTek’s product is encouraged. Distributed Bus Terminating Topology Terminator Resistor R0 RT9173 VOUT R1 R2 R3 REFEN R4 R5 R6 RT9173 VOUT R7 R8 R9 RN RN1 DS9173B-00 June 2003 BUS(0) BUS(1) BUS(2) BUS(3) BUS(4) BUS(5) BUS(6) BUS(7) BUS(8) BUS(9) BUS(N+1) BUS(N) Thermal Consideration RT9173B regulators have internal thermal limiting circuitry designed to protect the device during overload conditions. For continuous normal load conditions however, the maximum junction temperature rating of 125°C must not be exceeded. Higher continuous currents or ambient temperature require additional heatsinking. Heat sinking to the IC package must consider the worst case power dissipation which may occur. Input Capacitor and Layout Consideration Ideally, the input and output capacitors should be located as close as possible to the RT9173B. The RT9173B requires a 470µF low ESR input bypass capacitor (CIN) close to the VIN supply input. Place the RT9173B close to the preceding voltage regulator output capacitor so that the RT9173B shares the same capacitor. Minimize trace length and use wide traces between the voltage regulator output and the RT9173B VCC input to reduce PC board parasitic (Inductance, Resistance, and Capacitance), which can cause undesired ringing. The RT9173BCS regulator is packaged in plastic SOP-8 package. This small footprint package is unable to convectively dissipate the heat generated when the regulator is operating at high current levels. In order to control die operating temperatures, the PC board layout should allow for maximum possible copper area at the VCNTL pins of the RT9173BCS. The multiple VCNTL pins on the SOP-8 package are internally connected, but lowest thermal resistance will result if these pins are tightly connected on the PC board. This will also aid heat dissipation at high power levels. If the large copper around the IC is unavailable, a buried layer may be used as a heat spreader, Use vias to conduct the heat into the buried or backside of PCB layer. The vias should be small enough to retain solder when the board is wave-soldered. (See Fig.6 shown on next page). www.richtek.com 9 RT9173B Preliminary Use vias to conduct the heat into the buried or backside of PCB RT9173BCS (SOP-8) The PCB heat sink copper area should be solder-painted without masked. This approaches a “best case” pad heat sink. Fig. 6 Layout Consideration To prevent this maximum junction temperature from being exceeded, the appropriate power plane heat sink MUST be used. Higher continuous currents or ambient temperature require additional heatsinking. www.richtek.com 10 DS9173B-00 June 2003 RT9173B Preliminary Package Information H A M J B F C I D Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 M 0.406 1.270 0.016 0.050 F 1.194 1.346 0.047 0.053 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 H 0.178 0.254 0.007 0.010 8–Lead SOP Plastic Package DS9173B-00 June 2003 www.richtek.com 11 RT9173B Preliminary E C2 b3 L3 V D H L b P L2 A Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 2.184 2.388 0.086 0.094 b 0.381 0.889 0.015 0.035 b3 4.953 5.461 0.195 0.215 C2 0.457 0.889 0.018 0.035 D 5.334 6.223 0.210 0.245 E 6.350 6.731 0.250 0.265 H 9.000 10.414 0.354 0.410 L 0.508 1.780 0.020 0.070 L2 L3 P V 0.508 Ref. 0.889 0.020 Ref. 2.032 0.035 1.270 Ref. 4.572 0.080 0.050 Ref. -- 0.180 -- 5–Lead TO-252 Plastic Package www.richtek.com 12 DS9173B-00 June 2003 Preliminary DS9173B-00 June 2003 RT9173B www.richtek.com 13 RT9173B Preliminary RICHTEK TECHNOLOGY CORP. Headquarter RICHTEK TECHNOLOGY CORP. Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] www.richtek.com 14 DS9173B-00 June 2003