Revised September 2000 74F182 Carry Lookahead Generator General Description Features The 74F182 is a high-speed carry lookahead generator. It is generally used with the 74F181 or 74F381 4-bit arithmetic logic units to provide high-speed lookahead over word lengths of more than four bits. ■ Provides lookahead carries across a group of four ALUs ■ Multi-level lookahead high-speed arithmetic operation over long word lengths Ordering Code: Order Number Package Number Package Description 74F182SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F182PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols © 2000 Fairchild Semiconductor Corporation Connection Diagram DS009492 www.fairchildsemi.com 74F182 Carry Lookahead Generator April 1988 74F182 Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL Cn Carry Input 1.0/2.0 20 µA/−1.2 mA G0, G2 Carry Generate Inputs (Active LOW) 1.0/14.0 20 µA/−8.4 mA G1 Carry Generate Input (Active LOW) 1.0/16.0 20 µA/−9.6 mA G3 Carry Generate Input (Active LOW) 1.0/8.0 20 µA/−4.8 mA P0 , P1 Carry Propagate Inputs (Active LOW) 1.0/8.0 20 µA/−4.8 mA P2 Carry Propagate Input (Active LOW) 1.0/6.0 20 µA/−3.6 mA P3 Carry Propagate Input (Active LOW) 1.0/4.0 20 µA/−2.4 mA Cn+x − Cn+z Carry Outputs 50/33.3 −1 mA/20 mA G Carry Generate Output (Active LOW) 50/33.3 −1 mA/20 mA P Carry Propagate Output (Active LOW) 50/33.3 −1 mA/20 mA Functional Description The 74F182 carry lookahead generator accepts up to four pairs of Active LOW Carry Propagate (P0–P3) and Carry Generate (G0–G3) signals and an Active HIGH Carry input (Cn) and provides anticipated Active HIGH carries (Cn + x, Cn+y, Cn+z) across four groups of binary adders. The 74F182 also has Active LOW Carry Propagate (P) and Carry Generate (G) outputs which may be used for further levels of lookahead. The logic equations provided at the outputs are: Also, the 74F182 can be used with binary ALUs in an active LOW or active HIGH input operand mode. The connections (Figure 1) to and from the ALU to the carry lookahead generator are identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about the same speed. A 28-bit ALU is formed by dropping the last 74F181 or 74F381. Cn+x = G0 + P0 Cn Cn+y = G1 + P1 G0 + P1 P0 Cn Cn+z = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 Cn G = G3 + P3 G2 + P3 P2 G1 + P3 P2 P1 G0 P = P2 P2 P1 P0 *ALUs may be either 74F181 or 74F381 FIGURE 1. 32-Bit ALU with Rippled Carry between 16-Bit Lookahead ALUs www.fairchildsemi.com 2 74F182 Truth Table Inputs Cn G0 P0 X H H G1 P1 Outputs G2 P2 G3 P3 Cn+x Cn+y Cn+z G P L L H X L X L X H H X L H X X X H H X H H H X L L L H X H X L X X X L X H X L X X L H H X L X L H X X X X X H H L X X X H H H X L X H H H X H X L L H X H X H X L X X X X X L X H X X X L X X L H X L X X L X L H H X L X L X L H X X X X X H H H X X X H H H X H X H H H X H X H H H X H X H X H X X X X X L X L X X X L X X L L X L X X L X L L L X L X L X L L H X X X X H X X H H X X H X H X X X H H L L L L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 3 www.fairchildsemi.com 74F182 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 4 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max VCC VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min V Min 0.5 V Min IOL = 20 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 Input LOW −1.2 mA Max Current −2.4 VIN = 0.5V (P3) −3.6 VIN = 0.5V (P2) −4.8 VIN = 0.5V (G3, P0, P1) Output HIGH Voltage VOL Output LOW 10% VCC 2.5 5% VCC 2.7 V Conditions Input HIGH Voltage VOH 2.0 Units VIH 10% VCC Voltage IIH Input HIGH Current IBVI Input HIGH Current Breakdown Test ICEX Output HIGH Leakage Current VID Input Leakage Test IOD 4.75 Output Leakage Circuit Current IIL −60 Recognized as a HIGH Signal Recognized as a LOW Signal IIN = −18 mA IOH = −1 mA IOH = −1 mA IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (Cn) −8.4 VIN = 0.5V (G0, G2) −9.6 VIN = 0.5V (G1) IOS Output Short-Circuit Current −150 mA Max VOUT = 0V ICCH Power Supply Current 18.4 28.0 mA Max VO = HIGH ICCL Power Supply Current 23.5 36.0 mA Max VO = LOW 5 www.fairchildsemi.com 74F182 Absolute Maximum Ratings(Note 1) 74F182 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min tPLH Propagation Delay 3.0 6.6 8.5 3.0 12.0 3.0 9.5 tPHL Cn to Cn+x, Cn+y, Cn+z 3.0 6.8 9.0 3.0 11.0 3.0 10.0 tPLH Propagation Delay 2.5 6.2 8.0 2.5 11.0 2.5 9.0 tPHL P0, P1, or P2 to 1.5 3.7 5.0 1.0 7.0 1.5 6.0 Units Max ns ns Cn+x, Cn+y, or Cn+z tPLH Propagation Delay 2.5 6.5 8.5 2.5 11.0 2.5 9.5 tPHL G0, G1, or G2 to 1.5 3.9 5.2 1.0 7.0 1.5 6.0 ns Cn+x, Cn+y, or Cn+z tPLH Propagation Delay 3.0 7.9 10.0 3.0 12.0 3.0 11.0 tPHL P1, P2, or P3 to G 3.0 6.0 8.0 2.5 10.0 3.0 9.0 tPLH Propagation Delay 3.0 8.3 10.5 3.0 12.0 3.0 11.5 tPHL Gn to G 3.0 5.7 7.5 2.5 10.0 3.0 8.5 tPLH Propagation Delay 3.0 5.7 7.5 2.5 10.0 3.0 8.5 tPHL Pn to P 2.5 4.1 5.5 2.5 8.0 2.5 6.5 www.fairchildsemi.com 6 ns ns ns 74F182 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 7 www.fairchildsemi.com 74F182 Carry Lookahead Generator Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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