ACTIVE-SEMI ACT30AYT

ACT30
Active-Semi
Rev 5, 05-Jun-09
High Performance Off-Line Controller
ActiveSwitcherTM IC Family
FEATURES
GENERAL DESCRIPTION
• Lowest Total Cost Solution
• 0.15W Standby Power
• Emitter Drive Allows Safe NPN Transistor
The ACT30 is a high performance green-energy offline power supply controller. It features a scalable
driver for driving external NPN or MOSFET
transistors for line voltage switching. This
proprietary architecture enables many advanced
features to be integrated into a small package
(TO-92 or SOT23-B), resulting in lowest total cost
solution.
Flyback Use
•
•
•
•
•
•
•
•
Hiccup Mode Short Circuit
Current Mode Operation
The ACT30 design has six internal terminals and is
a pulse frequency and width modulation IC with
many flexible packaging options. One combination
of internal terminals is packaged in the spacesaving TO-92 package (A/B versions) for 65kHz or
100kHz switching frequency and with 400mA or
800mA current limit.
Over-Current Protection
Under-voltage Protection with Auto-Restart
Proprietary Scalable Output Driver
Flexible Packaging Options (Including TO-92)
65kHz or 100kHz Switching Frequency
Consuming only 0.15W in standby, the IC features
over-current, hiccup mode short circuit, and undervoltage protection mechanisms.
Selectable 0.4A to 1.2A Current Limit
APPLICATIONS
•
•
•
•
•
The ACT30 is ideal for use in high performance
universal adaptors and chargers. For highest
performance versus cost and smallest PCB area,
use the ACT30 in combination with the ACT32
CV/CC Controller.
Battery Chargers
Power Adaptors
Standby Power Supplies
Appliances
Universal Off-Line Power Supplies
Figure 1:
Simplified Application Circuit
HIGH VOLTAGE DC
R1
D2
Q1
R2
IC1
DRV
+
C1
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D1
GND
-1-
VDD
OPTOCOUPLER
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ACT30
Active-Semi
Rev 5, 05-Jun-09
ORDERING INFORMATION
PART NUMBER
SWITCHING
FREQUENCY
CURRENT
LIMIT
JUNCTION
TEMPERATURE
PACKAGE
PINS
ACT30AHT
65kHz
400mA
-40˚C to 150˚C
TO-92
3
ACT30BHT
65kHz
800mA
-40˚C to 150˚C
TO-92
3
ACT30AYT
65kHz
400mA
-40˚C to 150˚C
SOT23-B
3
PIN CONFIGURATION
ACT30A
ACT30B
SOT23-B
TO-92
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
VDD
Power Supply Pin. Connect to optocoupler's emitter. Internally limited to 5.5V max.
Bypass to GND with a proper compensation network.
2
3
GND
Ground.
3
2
DRV
Driver Output (TO-92 Only). Connect to emitter of the high voltage NPN or
MOSFET. For ACT30A/C, DRV pin is internally connected to DRV1. For ACT30B/D,
DRV pin is internally connected to both DRV1 and DRV2.
TO-92
SOT23-B
1
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ACT30
Active-Semi
Rev 5, 05-Jun-09
ABSOLUTE MAXIMUM RATINGSc
PARAMETER
VDD, FREQ to GND
VALUE
UNIT
-0.3 to 6
V
20
mA
-0.3 to 18
V
Internally limited
A
VDD Current
DRV, DRV1, DRV2 to GND
Continuous DRV, DRV1, DRV2 Current
Maximum Power Dissipation
TO-92
0.6
SOT23-B
0.39
W
Operating Junction Temperature
-40 to 150
˚C
Storage Temperature
-55 to 150
˚C
300
˚C
Lead Temperature (Soldering, 10 sec)
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may
affect device reliability.
ELECTRICAL CHARACTERISTICS
(VVDD = 4V, TJ = 25°C, unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
4.75
5
5.25
8.6
10.5
9.6
11.5
6.35
6.8
7.25
V
Falling edge
3.17
3.35
3.63
V
10mA
5.15
5.45
5.95
V
0.23
0.45
mA
0.7
1
mA
kHz
VVDD Start Voltage
VSTART
Rising edge
DRV1 Start Voltage
VDRVST
ACT30A
DRV1 must be
higher than this
voltage to start up. ACT30B
DRV1 Short-Circuit Detect Threshold
VSCDRV
VVDD Under-Voltage Threshold
VUV
VVDD Clamp Voltage
Startup Supply Current
IDDST
Supply Current
IDD
Switching Frequency
fSW
Maximum Duty Cycle
DMAX
Minimum Duty Cycle
DMIN
Effective Current Limit
ILIM
VVDD = 4V before VUV
MAX UNIT
ACT30A/B or FREQ = 0
50
65
80
ACT30A, VVDD = 4V
67
75
83
ACT30B, VVDD = 4V
60
VVDD = 4.6V
VVDD = VUV + 0.1V
3.5
V
V
%
%
ACT30A
340
400
480
ACT30B with
DRV1 = DRV2
680
800
920
mA
VVDD to DRV1 Current Coefficient
GGAIN
-0.29
A/V
VDD Dynamic Impedance
RVDD
9
kΩ
DRV1 or DRV2 Driver OnResistance
RDRV1,
RDRV2
IDRV1 = IDRV2 = 0.05A
3.6
Ω
DRV1 Rise Time
1nF load, 15Ω pull-up
30
ns
DRV1 Fall Time
1nF load, 15Ω pull-up
20
ns
DRV1 and DRV2 Switch Off Current
Driver off, VDRV1 = VDRV2 = 10V
12
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ACT30
Active-Semi
Rev 5, 05-Jun-09
FUNCTIONAL BLOCK DIAGRAM
DRV1
VDD
2
+
REGULATOR
3.6V (ACT30A/C)
4.6V (ACT30B/D)
BIAS
& UVLO
9k
DRV2
HICCUP
CONTROL
FREQ
OSC &
RAMP
CURRENT
1
PFWM
SWITCHING
CONTROL
LOGIC
SLEW
20k
200k
ILIM VC
GENERATOR
1X
56X
56X
ERROR
COMP
40
20k
4.75V
10µA/V
GND
GND
c: FREQ terminal wire-bonded to VDD in ACT30C/D (TO-92)
d: DRV2 terminal wire-bonded to DRV1 in ACT30B/D (TO-92)
FUNCTIONAL DESCRIPTION
Startup Sequence
As seen in the Functional Block Diagram, the main
components include switching control logic, two onchip medium-voltage power-MOSFETs with parallel
current sensor, driver, oscillator and ramp
generator, current limit VC generator, error
comparator, hiccup control, bias and under voltagelockout, and regulator circuitry.
Figure 1 shows a Simplified Application Circuit for
the ACT30. Initially, the small current through
resistor R1 charges up the capacitor C1, and the
BJT acts as a follower to bring up the DRV1
voltage. An internal regulator generates a VVDD
voltage equal to VDRV1 – 3.6V for ACT30A (VDRV1 –
4.6V for ACT30B) but limits it to 5.5V max. As VVDD
crosses 5V, the regulator sourcing function stops
and VVDD begins to drop due to its current
consumption. As VVDD voltage decreases below
4.75V, the IC starts to operate with increasing driver
current. When the output voltage reaches regulation
point, the optocoupler feedback circuit stops VVDD
from decreasing further. The switching action also
allows the auxiliary windings to take over in
supplying the C1 capacitor. Figure 2 shows a
typical startup sequence for the ACT30.
As seen in the Functional Block Diagram, the
design has six internal terminals. VVDD is the power
supply terminal. DRV1 and DRV2 are linear driver
outputs that can drive the emitter of an external
high voltage NPN transistor or N-channel MOSFET.
This emitter-drive method takes advantage of the
high VCBO of the transistor, allowing a low cost
transistor such as ‘13003 (VCBO = 700V) or ‘13002
(VCBO = 600V) to be used for a wide AC input range.
The slew-rate limited driver coupled with the turn-off
characteristics of an external NPN transitor result in
lower EMI.
To limit the auxiliary voltage, use a 12V zener diode
for ACT30A or a 13V zener diode for ACT30B (D1
diode in Figure 1).
The driver peak current is designed to have a
negative voltage coefficient with respect to supply
voltage VVDD, so that lower supply voltage
automatically results in higher DRV1 peak current.
This way, the optocoupler can control VVDD directly
to affect driver current.
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Even though up to 2MΩ startup resistor (R1) can be
used due to the very low startup current, the actual
R1 value should be chosen as a compromise
between standby power and startup time delay.
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ACT30
Active-Semi
Rev 5, 05-Jun-09
Figure 2:
Startup Waveforms
pulse-skipped
VAC
VDRVST
VDRV1
5V
VVDD
IPRIMARY
VOUT
3.6Ω (rather than as digital output switches). The
current limit can then be calculated through linear
combination as shown in Figure 3. For TO-92
package, the ACT30A are preprogrammed to
400mA current limit and the ACT30B are
preprogrammed to 800mA current limit, for SOT23B package, the ACT30A are preprogrammed to
400mA current limit.
Normal Operation
In normal operation, the feedback signal from the
secondary side is transmitted through the
optocoupler as a current signal into VVDD pin, which
has dynamic impedance of 9kΩ. The resulting VVDD
voltage affects the switching of the IC. As seen in
the Functional Block Diagram, the Current Limit VC
Generator uses the VVDD voltage difference with
4.75V to generate a proportional offset at the
negative input of the Error Comparator.
Figure 3:
Driver Output Configurations
The drivers turn on at the beginning of each
switching cycle. The current sense resistor current,
which is a fraction of the transformer primary
current, increases with time as the primary current
increases. When the voltage across this current
sense resistor plus the oscillator ramp signal equals
Error Comparator's negative input voltage, the
drivers turn off. Thus, the peak DRV1 current has a
negative voltage coefficient of -0.29A/V and can be
calculated from the following:
I LIM = 400 mA
⎛ 7 .2 Ω + R D
I LIM = 400 mA × ⎜⎜
⎝ 3 .6 Ω + R D
IDRV 1PEAK = 0.29 A / V × (4.75V − VVDD )
⎞
⎟⎟
⎠
for VVDD < 4.75V and duty cycle < 50%.
When the output voltage is lower than regulation,
the current into VVDD pin is zero and VVDD voltage
decreases. At VVDD = VUV = 3.35V, the peak DRV1
current has maximum value of 400mA.
DRV1
DRV2
I LIM = 800 mA
Current Limit Adjustment
RD ⎞
⎛
I LIM = 400 mA × ⎜ 2 +
⎟
3 .6 Ω ⎠
⎝
The IC's proprietary driver arrangement allows the
current limit to be easily adjusted between 400mA
and 1.2A. To understand this, the drivers have to be
utilized as linear resistive devices with typically
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ACT30
Active-Semi
Rev 5, 05-Jun-09
Pulse Modulation
The PFWM Switching Control Logic block operates
in different modes depending on the output load
current level. At light load, the VVDD voltage is
around 4.75V. The energy delivered by each
switching cycle (with minimum on time of 500ns) to
the output causes VVDD to increase slightly above
4.75V. The FPWM Switching Control Logic block is
able to detect this condition and prevents the IC
from switching until VVDD is below 4.75V again. This
results in a pulse-modulation action with fixed pulse
width and varying frequency, and low power
consumption because the switching frequency is
reduced. Typical system standby power
consumption is 0.15W.
Short Circuit Hiccup
When the output is short circuited, the ACT30
enters hiccup mode operation. In this condition, the
auxiliary supply voltage collapses. An on-chip
detector compares DRV1 voltage during the offtime of each cycle to 6.8V. If DRV1 voltage is below
6.8V, the IC will not start the next cycle, causing
both the auxiliary supply voltage and VVDD to reduce
further. The circuit enters startup mode when VVDD
drops below 3.35V. This hiccup behavior continues
until the short circuit is removed. In this behavior,
the effective duty cycle is very low resulting in very
low short circuit current.
To make sure that the IC enters hiccup mode
easily, the transformer should be constructed so
that there is close coupling between secondary and
auxiliary, so that the auxiliary voltage is low when
the output is short-circuited. This can be achieved
with the primary/auxiliary/secondary sequencing
from the bobbin.
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ACT30
Active-Semi
Rev 5, 05-Jun-09
Figure 4:
APPLICATIONS INFORMATION
NPN Reverse Bias Safe Operation Area
External Power Transistor
IC
The ACT30 allows a low-cost high voltage power
NPN transistor such as ‘13003 or ‘13002 to be used
safely in a flyback configuration. The required
collector voltage rating for VAC = 265V with full
output load is at least 600V to 700V. As seen in
Figure 4, the breakdown voltage of an NPN is
significantly improved when it is driven at its emitter.
Thus, the ACT30 and ’13002 or ‘13003 combination
meet the necessary breakdown safety requirement
even though RCC circuits using ‘13002 or ‘13003
do not. Table 1 lists the breakdown voltage of some
transistors appropriate for use with the ACT30.
Base-Drive
Safe Region
(RCC)
MJE13002
IC
hFEMIN PACKAGE
600V 300V 1.5A
8
TO-126
MJE13003,
700V 400V 1.5A
KSE13003
8
TO-126
STX13003
8
TO-92
700V 400V
1A
VC
The power dissipated in the NPN transistor is equal
to the collector current times the collector-emitter
voltage. As a result, the transistor must always be
in saturation when turned on to prevent excessive
power dissipation. Select an NPN transistor with
sufficiently high current gain (hFEMIN > 8) and a base
drive resistor (R2 in Figure 1) low enough to ensure
that the transistor easily saturates.
Recommended Power Transistor List
VCBO VCEO
VCBO
VCEO
Table 1:
DEVICE
Emitter-Drive
Safe Region
(ACT30)
Figure 5:
A 3.75W Charger Using ACT30A in Combination with TL431
F1
AC1
C10
D4
D1
T1
EE-16
L1
R1
D3
C4
R2B
AC2
R3
R9
R6
D6
D5
5V/750mA
R10
R11
C7
C2
R2A
L2
D8
C19
D2
C1
R18
IC2A
Opto
C9
R13
R5
C8
D7
IC3
TL431
Q2
R7
R12
R16
Z1
R15
GND
R14
IC2B Opto
1
3
IC1
2
ACT30A
R8
C6
C20
C3
C5
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ACT30
Active-Semi
Rev 5, 05-Jun-09
Application Example
The application circuit in Figure 5 provides a
5V/0.75A constant voltage/constant current output.
The performance of this circuit is summarized in
Table 2.
Table 2:
System Performance of Circuit in Figure 5
110VAC
220VAC
Standby Power
0.09W
0.15W
Current Limit
0.75A
0.75A
Full Load Efficiency
65%
67%
Layout Considerations
The following should be observed when doing
layout for the ACT30:
1) Use a "star point" connection at the GND pin of
ACT30 for the VDD bypass components (C5 and
C6 in Figure 5), the input filter capacitor (C2 in
Figure 5) and other ground connections on the
primary side.
2) Keep the loop across the input filter capacitor,
the transformer primary windings, and the high
voltage transistor, and the ACT30 as small as
possible.
3) Keep ACT30 pins and the high voltage transistor
pins as short as possible.
4) Keep the loop across the secondary windings,
the output diode, and the output capacitors as
small as possible.
5) Allow enough copper area under the high voltage
transistor, output diode, and current shunt
resistor for heat sink.
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ACT30
Active-Semi
Rev 5, 05-Jun-09
PACKAGE OUTLINE
TO-92 PACKAGE OUTLINE AND DIMENSIONS (AMMO TAPE PACKING)
D1
P
∆P
∆k
H0
L1
F1 F2
P2
P1
W
b
W0
W1
D
H
W2
Φ
Q1
P0
t1
e
t2
e1
SYMBOL
DIMENSION IN
MILIMETERS
DIMENSION IN
INCHES
MIN
MAX
MIN
MAX
A
3.300
3.700
0.130
0.146
A1
1.100
1.400
0.043
b
0.380
0.550
c
0.360
D
4.400
D1
3.430
E
4.300
e
e1
Φ
h
DIMENSION IN
INCHES
MAX
MIN
MAX
∆k
-1.000
1.000
-0.039
0.039
0.055
F1, F2
2.200
2.800
0.087
0.110
0.015
0.022
H
19.00
21.00
0.748
0.827
0.510
0.014
0.020
H0
15.50
16.50
0.610
0.650
4.700
0.173
0.185
L1
2.500
P
12.40
13.00
0.488
0.512
∆P
-1.000
1.000
-0.039
0.039
P0
12.50
12.90
0.492
0.508
0.104
P1
3.550
4.150
0.140
0.163
0.063
P2
6.050
6.650
0.238
0.262
0.015
Q1
3.800
4.200
0.150
0.165
t1
0.350
0.450
0.014
0.018
t2
0.150
0.250
0.006
0.010
W
17.50
19.00
0.689
0.748
W0
5.500
6.500
0.217
0.256
W1
8.500
9.500
0.335
0.374
0.135
4.700
2.640
0.169
0.380
0.185
0.050 TYP
0.096
1.600
0.000
DIMENSION IN
MILIMETERS
MIN
1.270 TYP
2.440
SYMBOL
0.000
W2
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0.098
1.000
0.039
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ACT30
Active-Semi
Rev 5, 05-Jun-09
SOT23-B PACKAGE OUTLINE AND DIMENSIONS
D
θ
b
0.25
MAX
MIN
MAX
A
1.900
1.150
0.035
0.045
A1
0.000
0.100
0.000
0.004
A2
0.900
1.050
0.035
0.041
b
0.300
0.500
0.012
0.020
c
0.080
0.150
0.003
0.006
c
D
2.800
3.000
0.110
0.118
E
1.200
1.400
0.047
0.055
E1
2.250
2.550
0.089
0.100
L1
MIN
E
E1
DIMENSION IN
INCHES
L
SYMBOL
DIMENSION IN
MILLIMETERS
e
e
A
A2
A1
e1
e1
L
0.950 TYP
1.800
2.000
0.550 REF
0.037 TYP
0.071
0.079
0.022 REF
L1
0.300
0.500
0.012
0.020
θ
0°
8°
0°
8°
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
sales@active-semi.com or visit http://www.active-semi.com. For other inquiries, please send to:
2728 Orchard Parkway, San Jose, CA 95134-2012, USA
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ActiveSwitcherTM is a trademark of Active-Semi.
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Copyright © 2009 Active-Semi, Inc.