ETC QS74FCT374ATQ

QS54/74FCT374T, 2374T
High-Speed CMOS
Bus Interface
8-Bit Registers
Q
QUALITY
SEMICONDUCTOR, INC.
QS54/74FCT374T
QS54/74FCT2374T
FEATURES/BENEFITS
DESCRIPTION
• Pin and function compatible to the 74F374
74FCT374 and 74ABT374
• Industrial temperature –40°C to 85°C
• CMOS power levels: <7.5mW static
• Available in DIP, SOIC, QSOP, ZIP, HQSOP
• Undershoot clamp diodes on all inputs
• TTL-compatible input and output levels
• Ground bounce controlled outputs
• Reduced output swing of 0-3.5V
• Military product compliant to MIL-STD-883,
Class B
The QSFCT374T is a high-speed CMOS TTLcompatible 8-bit buffered registers with a buffered
common clock and a buffered output enable control.
The QSFCT2374T is a 25Ω resistor output version
useful for driving transmission lines and reducing
system noise. Data is stored in the register on the
rising edge of the clock. The FCT374 is a noninverting device. The high output current IOL and IOH
drive high capacitance loads. All inputs have clamp
diodes for undershoot noise suppression. All outputs
have ground bounce suppression (see QSI Application Note AN-001), and outputs will not load an active
bus when VCC is removed from the device.
FCT-T 374T
• JEDEC-FCT spec compatible
• Std., A, C, and D speed grades with 4.5ns tPD
for D
• IOL = 48mA Ind., 32mA Mil.
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pa
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C
FCT-T 2374T
• Built-in 25Ω series resistor outputs reduce
reflection and other system noise
• Std., A and C speed grades with 5.2ns tPD for C
• IOL = 12mA Ind.
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No
Figure 1. Functional Block Diagram
Di
CP
D
CP
Q
25Ω
Oi
FCT2374
Only
OE
MDSL-00017-04
DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
1
QS54/74FCT374T, 2374T
Figure 2. Pin Configurations (All Pins Top View)
PDIP, SOIC, QSOP, HQSOP
OE
O0
D0
D1
O1
O2
D2
D3
O3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ZIP
OE
D0
O1
D2
O3
CP
D4
O5
D6
O7
VCC
O7
D7
D6
O6
O5
D5
D4
O4
CP
1
3
5
7
9
11
13
15
17
19
O0
D1
O2
D3
GND
O4
D5
O6
D7
VCC
2
4
6
8
10
12
14
16
18
20
y
n
pa
m
o
C
Table 1. Pin Description
Name
I/O
Description
Di
I
Data Inputs
Oi
O
Data Outputs
CP
I
Clock Input
OE
I
Output Enable
n
a
w
No
Table 2. Function Table
2
Di
Internal
Q
Value
Outputs
Oi
X
X
X
Hi-Z
Disable Outputs
L
L
↑
↑
L
H
L
H
L
H
Load Input Data
Enable Outputs
H
H
↑
↑
L
H
L
H
Hi-Z
Hi-Z
Load Input Data
Disable Outputs
OE
Inputs
CP
H
Function
QUALITY SEMICONDUCTOR, INC.
MDSL-00017-04
DECEMBER 28, 1998
QS54/74FCT374T, 2374T
Table 3. Absolute Maximum Ratings
Supply Voltage to Ground ................................................. –0.5V to 7.0V
DC Output Voltage VOUT ................................................... –0.5V to 7.0V
DC Input Voltage VIN ......................................................... –0.5V to 7.0V
AC Input Voltage (for a pulse width ≤ 20ns) ................................. –3.0V
DC Input Diode Current with VIN < 0 ........................................... –20mA
DC Output Diode Current with VOUT < 0 ..................................... –50mA
DC Output Current Max. Sink Current/Pin .................................. 120mA
Maximum Power Dissipation .................................................... 0.5 watts
TSTG Storage Temperature ............................................... –65° to 150°C
Note: Stresses greater than
those listed under ABSOLUTE
MAXIMUM RATINGS may
cause permanent damage to
QSI devices that result in functional or reliability type failures.
Table 4. Capacitance(1)
TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
Pins(2)
SOIC
QSOP
PDIP
ZIP
Unit
1, 3, 4, 7, 8, 11, 13, 14, 17, 18
4
4
5
7
2, 5, 6, 9, 12, 15, 16, 19
8
8
9
10
y
n
pa
Notes:
1. Capacitance is characterized but not tested.
2. Pin reference for 20-pin package.
n
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pF
pF
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C
Table 5. Power Supply Characteristics
No
Symbol
Parameter
Test Conditions(1)
Quiescent Power
Supply Current
∆ICC
QCCD
ICC
Min
Max
Unit
VCC = Max., freq = 0
0V ≤ VIN ≤ 0.2V or VCC-0.2V ≤ VIN ≤ VCC
—
1.5
mA
Supply Current per
Input @ TTL HIGH
VCC = Max., VIN = 3.4V, freq = 0(2)
—
2.0
mA
Supply Current per
Input per MHz
VCC = Max., Outputs open and enabled
One bit toggling @ 50% duty cycle
Other inputs at GND or VCC(3,4)
—
0.25
mA/
MHz
Notes:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC specifications.
2. Per TTL driven input (VIN = 3.4V).
3. For flip-flops, QCCD is measured by switching one of the data input pins so that the output changes every clock cycle.
This is a measurement of device power consumption only and does not include power to drive load capacitance or tester
capacitance. This parameter is guaranteed by design but not tested.
4. IC can be computed using the above parameters as explained in the Technical Overview section.
MDSL-00017-04
DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
3
QS54/74FCT374T, 2374T
Table 6. DC Electrical Characteristics Over Operating Range
Commercial TA = –40°C to 85°C, VCC = 5.0V ±5%
Symbol
Military TA = –55°C to 125°C, VCC = 5.0V ±10%
Parameter
Test Conditions
Min
Typ(1)
Max
Unit
VIH
Input HIGH Voltage
Logic HIGH for All Inputs
2.0
—
—
V
VIL
Input LOW Voltage
Logic LOW for All Inputs
—
—
0.8
V
∆VT
Input Hysteresis
VTLH – VTHL for All Inputs
—
0.2
—
V
| IIH |
| IIL |
Input Current
Input HIGH or LOW
VCC = Max., 0 ≤ VIN < VCC
—
—
5
µA
| IOZ |
Off-State Output
Current (Hi-Z)
VCC = Max., 0 ≤ VIN ≤ VCC
—
—
5
µA
IOS
Short Circuit Current
(FCT374)
VCC = Max., VOUT = GND(2,3)
–60
—
—
mA
IOR
Current Drive
(FCT2374 – 25Ω)
VCC = Min., VOUT = 2.0V(3)
50
—
—
mA
VIC
Input Clamp Voltage
VCC = Min., IIN = –18mA, TA = 25°C(3)
—
VOH
Output HIGH Voltage
VCC = Min.
IOH = –12mA (MIL)
IOH = –15mA (IND)
2.4
2.4
VOL
Output LOW Voltage
(FCT374)
VCC = Min.
IOL = 32mA (MIL)
IOL = 48mA (IND)
VOL
Output LOW Voltage
(FCT2374 – 25Ω)
VCC = Min.
ROUT
Output Resistance
(FCT2374 – 25Ω)
VCC = Min.
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N
an
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–0.7
–1.2
V
—
—
—
—
V
—
—
—
—
0.50
0.50
V
IOL = 12mA (MIL)
IOL = 12mA (IND)
—
—
—
—
0.50
0.50
V
IOL = 12mA (MIL)
IOL = 12mA (IND)
—
20
25
28
—
40
Ω
m
o
C
Notes:
1. Typical values indicate VCC = 5.0V and TA = 25°C.
2. Not more than one output should be shorted and the duration is ≤1 second.
3. These parameters are guaranteed by design but not tested.
4
QUALITY SEMICONDUCTOR, INC.
MDSL-00017-04
DECEMBER 28, 1998
QS54/74FCT374T, 2374T
Table 7. Switching Characteristics Over Operating Range
Industrial TA = –40°C to 85°C, VCC = 5.0V ±5%
CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
Military TA = –55°C to 125°C, VCC = 5.0V ±10%
374
2374
Symbol
Description(1)
374A
2374A
374C
2374C
374D
Min Max Min Max Min Max Min Max Unit
tPHL
tPLH
Propagation Delay
CP to Oi, 374
IND
MIL
2
2
10
11
2
2
6.5
7.2
2
2
5.2
6
1.5
4.5
ns
tPHL
tPLH
Propagation Delay
CP to Oi, 2374
IND
MIL
2
2
10
11
2
2
6.5
7.2
2
2
5.2
6
—
—
—
—
ns
tPZH
tPZL
Output Enable Time
OE to Yi, 374
IND
MIL
1.5
1.5
12.5
14
1.5
1.5
6.5
7.5
1.5
1.5
5.5
6.2
1.5
—
5.5
—
ns
tPZH
tPZL
Output Enable Time
OE to Yi, 2374
IND
MIL
1.5
1.5
12.5
14
1.5
1.5
6.5
7.5
1.5
1.5
6.2
6.9
—
—
—
—
ns
tPHZ
tPLZ
Output Disable Time
OE to Yi
IND(2)
MIL(2)
1.5
1.5
8
8
1.5
1.5
5.5
6.5
1.5
1.5
5
6.5
1.5
—
5
—
ns
1.5
—
—
—
ns
1
—
—
—
ns
ns
p
m
Co
y
n
a
tS
Data Setup Time
Di to CP
IND
MIL
2
2
—
—
2
2
—
—
1.5
2
—
—
tH
Data Hold Time
Di to CP
IND
MIL
1.5
1.5
—
—
1.5
1.5
—
—
1
1
—
—
tW
Clock Pulse Width
HIGH or LOW
IND(2)
MIL(2)
7
7
—
—
5
6
—
4
—
4
—
—
5
—
—
—
n
a
w
Notes:
1. Minimums guaranteed but not tested for all parameters except tS and tH.
2. This parameter is guaranteed by design but not tested.
3. See Test Circuit and Waveforms.
No
MDSL-00017-04
DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
5