ETC NCP800SN1T1

NCP800
Product Preview
Lithium Battery Protection
Circuit for One Cell
Battery Packs
The NCP800 resides in a lithium battery pack where the battery cell
continuously powers it. In order to maintain cell operation within
specified limits, this protection circuit senses cell voltage, charge
current, and discharge current, and correspondingly controls the state
of two, N–channel, MOSFET switches. These switches reside in series
with the negative terminal of the cell and the negative terminal of the
battery pack. During a fault condition, the NCP800 open circuits the
pack by turning off one of these MOSFET switches, which
disconnects the current path.
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4
5
MARKING
DIAGRAM
2
1
6
TSOP–6
SN SUFFIX
CASE 318G
BAEyw
y = Year
w = Week
Internally Trimmed Precision Charge and Discharge Voltage Limits
Overvoltage Threshold Accuracy of ± 50 mV
Discharge Current Limit Detection
Automatic Reset from Discharge Current Faults
Low Current Standby State when Cells are Discharged
Available in a Low Profile Surface Mount Package
PIN CONNECTIONS
DO 1
6 Gnd
P– 2
5 Vcell
CO 3
4
Ct
Typical One Cell Smart Battery Pack
(Top View)
ORDERING INFORMATION
5
Device
Package
Shipping
NCP800SN1T1
TSOP–6
3000 Units/Rail
NCP800
6
4
1
3
2
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
 Semiconductor Components Industries, LLC, 2000
December, 2000 – Rev. 2
1
Publication Order Number:
NCP800/D
NCP800
Vcell
Ct
5
4
VD1
Level
Shift
VD2
VD3
Standby/Reset
VD1
10 kOhm
Delay
VD2
Short
Circuit
Detector
VD3
Rshort
6
1
3
2
Gnd
Do
Co
P–
Figure 1. Detailed Block Diagram
PIN FUNCTION DESCRIPTION
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Pin
Symbol
1
DO
This output connects to the gate of the discharge MOSFET allowing it to enable or disable battery pack.
Description
2
P–
This pin monitors cell discharge current. The excess current detector sets when the combined voltage drop of the
charge MOSFET and the discharge MOSFET exceeds the discharge current limit threshold voltage, V(DET3). The
short circuit detector activates when V(P–) is pulled within 0.8 V of the Vcell voltage. The Co driver is level shifted to
the voltage at this pin.
3
CO
This output connects to the gate of the charge MOSFET switch Q1 allowing it to enable or disable battery pack
charging.
4
Ct
This pin connects to the external capacitor for setting the output delay of the overvoltage detector (VD1).
5
Vcell
This input connects to the positive terminal of the cell for voltage monitoring and provides operating bias for the
integrated circuit.
6
Gnd
This is the ground pin of the IC.
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NCP800
MAXIMUM RATINGS
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Á
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Ratings
Symbol
Value
Unit
Supply Voltage (Pin 5 to Pin 6)
VDD
–0.3 to 12
V
Input Voltage
Charge Gate Drive Common/Current Limit (Pin 5 to Pin 2)
Overvoltage Delay Capacitor (Pin 4 to Pin 6)
VP–
VCt
V(pin5) + 0.3 to V(pin 5) – 8
0.3 to 12
Output Voltage
CO Pin Voltage (Pin 3 to Pin 2)
DO Pin Voltage (Pin 1 to Pin 6)
VCO
VDO
V(pin5) + 0.3 to V(pin 5) – 8
–0.3 to 12
V
V
Thermal Resistance, Junction–to–Air
SN Suffix, TSOP–6 Plastic Package, Case 318G
°C/W
RθJA
–
Operating Junction Temperature
TJ
–40 to 85
°C
Storage Temperature
Tstg
–55 to 125
°C
NOTES: ESD data available upon request.
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
Overvoltage Threshold, VDD Increasing
Overvoltage Hysteresis VDD Decreasing
VDET1
VHYS1
4.30
150
4.35
–
4.40
250
V
mV
Overvoltage Delay Time
t(DET1)
–
55
–
–
–
–
–
105
–
2.437
–
2.563
VOLTAGE SENSING
Ct = 510 pF
Ct = 0.01 µF
Ct = 0.047 µF
Undervoltage Threshold, VDD Decreasing
VDET2
ms
V
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Undervoltage Delay Time
t(DET2)
7.0
–
13
ms
VDET3
170
–
230
mV
CURRENT SENSING
Excess Current Threshold (Detect rising edge of P– pin voltage)
Short Protection Voltage (VDD = 3.0 V)
VSHORT
–
–
VDD – 0.5
V
Current Limit Delay Time (VDD = 3.0 V)
t(DET1)
t(SHORT)
9.0
–
–
5
13
–
ms
µs
RSHORT
50
–
150
k
Charge Gate Drive Output Low (Pin 3 to Pin 2)
(VDD = 4.4 V, Io = 50 µA)
Vol1
–
–
0.5
V
Charge Gate Drive Output High (Pin 5 to Pin 3)
(VDD = 3.9 V, Io = –50 µA)
Voh1
3.4
–
–
V
Discharge Gate Drive Output Low (Pin 1 to Pin 6)
(VDD = 2.4 V, Io = 50 µA)
Vol2
–
–
0.5
V
Discharge Gate Drive Output High (Pin 5 to Pin 1)
(VDD = 3.9 V, Io = –50 µA)
Voh2
3.4
–
–
V
3.0
0.3
–
–
6.0
0.6
µs
µs
1.5
–
12
V
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Reset Resistance
OUTPUTS
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TOTAL DEVICE
Supply Current
Operating (VDD = 3.9 V, VP– = 0 V)
Standby (VDD = 2.0 V)
Icell
Operating Voltage
VDD
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NCP800
PACKAGE DIMENSIONS
(TSOP–6)
SN SUFFIX
CASE 318G–02
ISSUE G
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
L
6
S
1
5
4
2
3
B
D
G
M
J
C
0.05 (0.002)
H
K
DIM
A
B
C
D
G
H
J
K
L
M
S
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.05
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.55
0
10 2.50
3.00
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0610
0
10 0.0985 0.1181
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NCP800/D