CGS64/74B2529 500 ps 2 to 10 Minimum Skew Clock Driver General Description Features This minimum skew clock driver is designed for Clock Generation and Support (CGS) applications operating from 33 MHz to 80 MHz. The devices guarantee minimum output skew across the outputs of a given device. Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clocking systems. The ’2529 is a minimum skew clock driver with two selectable inputs driving ten outputs. The SEL pin is used to determine which CLKn will have an active effect on the outputs of the circuit. When SEL e 1, the CLK1 input is selected and when SEL e 0, the CLK0 input is selected. The non-selected CLKn input will not have any effect on the logical output level of the circuit. The output pins act as a single entity and will follow the state of the CLK inputs. Y Y Y Y Y Y Y Y Y Y Clock Generation and Support (CGS) devices Ideal for high frequency signal generation or clock distribution applications CGS74B version features National’s Advanced Bipolar FASTÉ LSI process 2-to-10 low skew clock distribution 500 ps pin-to-pin output skew (V package) Specification for transition skew to meet duty cycle requirements 20-center pin VCC and GND configuration or PLCC to minimize high speed switching noise Current sourcing 48 mA and current sinking of 64 mA Low dynamic power consumption above 20 MHz Guaranteed 4 kV ESD protection Logic Symbols Connection Diagrams Pin Assignment SOIC TL/F/11923–1 Pin Descriptlon Pin Names Description CLK0, CLK1 Clock Input O0 – O9 Outputs SEL TL/F/11923 – 3 Pin Assignment for PLCC Clock Select Inputs Outputs CLK0 CLK1 SEL O0–O9 L H X X X X L H L L H H L H L H TL/F/11923 – 2 L e Low Logic Level H e High Logic Level X e Immaterial FASTÉ is a registered trademark of National Semiconductor Corporation. C1996 National Semiconductor Corporation TL/F/11923 TL/F/11923 – 4 RRD-B30M106/Printed in U. S. A. http://www.national.com CGS64/74B2529 500 ps 2 to 10 Minimum Skew Clock Driver September 1995 Absolute Maximum Ratings (Note) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) Input Voltage (VI) Operating Temperature 64 Grade 74 Grade Storage Temperature Range Airflow Typical iJA 0 LFM 225 LFM 500 LFM Supply Voltage (VCC) b 40§ C to a 85§ C 0§ C to a 70§ C V 64 52 45 9.6 ns max b 40§ C to a 85§ C 0§ C to a 70§ C Note: The Absolule Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the DC and AC Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions will define the conditions for actual device operation. b 65§ C to a 150§ C M 89 71 63 4.5V to 5.5V Input Rise and Fall Times (0.8V to 2.0V) Free Air Operating Temperature (TA) 64 Grade 74 Grade 7.0V 7.0V § C/W § C/W § C/W DC Electrical Characteristics Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC e 5V, TA e 25§ C Symbol Parameter VIK Input Clamp Voltage VIH Minimum Input High Level Voltage VIL Maximum Input Low Level Voltage VOH High Level Output Voltage Conditions IOH e b3 mA, VCC e 4.5V 2.4 IOH e 48 mA, VCC e 4.5V 2.0 Low Level Output Voltage VCC e 4.5V, IOL e 64 mA Input Current @ Max Input Voltage VCC e 5.5V, VIH e 7V IIH High Level Input Current VCC e 5.5V, VIH e 2.7V IIL Low Level Input Current VCC e 5.5V, VIL e 0.4V IO Output Drive Current VCC e 5.5V, VO e 2.25V Supply Current ’2529 VCC e 5.5V Input Capacitance VCC e 5.5V http://www.national.com Max Units b 1.2 V V 0.8 II CIN Typ 2.0 VOL ICC Min VCC e 4.5V, II e b18 mA V 0.35 b 0.5 b 50 0.5 V 0.1 mA 20 mA b 0.75 mA b 150 mA Outputs High 24 35 mA Outputs Low 45 65 mA 5 2 V pF AC Electrical Characteristics Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC e 5V, TA e 25§ C Symbol VCC e 4.5V to 5.5V CL e 50 pF RL e 500X Parameter Min Typ Units Max fMAX Frequency Maximum tPLH Low-to-High Propagation Delay CLK0,1 to On M 3.0 5.5 7.0 Low-to-High Propagation Delay CLK0,1 to On V 2.5 5.5 6.0 High-to-Low Propagation Delay CLK0,1 to On M 3.0 5.5 7.0 High-to-Low Propagation Delay CLK0,1 to On V 2.5 5.5 6.0 tPHL 80 MHz ns ns Extended AC Electrical Characteristics Over recommended operating conditions unless specified otherwise. All typical values are measured at VCC e 5V, TA e 25§ C Symbol Parameter VCC e 4.5V to 5.5V CL e 50 pF RL e 500X Package Min Typ Units Max tOSHL Maximum Skew Common Edge Output-to-Output Variation (Note 1) M V 500 500 ps tOSLH Maximum Skew Common Edge Output-to-Output Variation (Note 1) M V 500 500 ps tPS Maximum Skew Pin (Signal) Transition Variation (Note 1) M V 750 850 ps tSet (Note 2) Setup Time High Select to CLK0 or 1 Setup Time Low Select to CLK0 or 1 All tHold (Note 2) Hold Time High Sel to CLK0 Hold Time High Sel to CLK1 Hold Time Low Sel to CLK0 Hold Time Low Sel to CLK1 trise, tfail Rise/Fall Time (from 0.8V/2.0V to 2.0V/0.8V) b 2.0 b 2.0 ns 5.0 5.0 8.0 8.0 ns CGS74 1.5 CGS64 1.75 ns Note 1: tOSHL and tOSLH are characterized and guaranteed by design @ 1 MHz. Note 2: A negative setup time indicates that the correct logic levels may be initiated sometimes after the active transition of the timing pulse. 3 http://www.national.com Timing Diagrams for the CGS64/74B2529 tSet –High, CLK1 tSet – High, CLK0 TL/F/11923–6 TL/F/11923 – 7 tSet –Low, CLK1 tSet – Low, CLK0 TL/F/11923–8 TL/F/11923 – 9 tHold –High, CLK1 tHold – High, CLK0 TL/F/11923–10 TL/F/11923 – 11 tSet –Low, CLK1 tSet – Low, CLK0 TL/F/11923–12 http://www.national.com TL/F/11923 – 13 4 Timing Diagrams for the CGS64/74B2529 (Continued) TL/F/11923 – 14 TL/F/11923 – 15 Test Circuit RL is 500X CL is 50 pF for all prop delays and skew measurements. TL/F/11923 – 16 Note 3: Refer to Test Philosophy and Definitions, Minimum Skew Parameters Measurement Information for definitions of each skew specification, in section (TBD). Note 4: Load Capacitance includes the test jig. 5 http://www.national.com Ordering Information (Contact NSC Marketing for specific date of availability) CGS 74 Family Clock Generation and Support 252x WM Packaging WM e JEDEC SOIC V e PCC DWF e Die Wafer Form Operating Temperature Range 74 e Commercial 54 e Military/Aerospace Device Type 2528 2529 Technology B e Bipolar http://www.national.com B 6 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Molded Package (Small Outline 0.300 Wide) (WM) NS Package Number M20B 7 http://www.national.com CGS64/74B2529 500 ps 2 to 10 Minimum Skew Clock Driver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Molded Plastic Leaded Chip Carrier (PLCC) NS Package Number V28A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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