ETC BQ24012

ZèchnoloflV Research & AVlJ lication
bq24010/bq24012/bq24013 单片锤离子
和惶聚合物电池充电管理 IC s
山东临沂师范学院工程学院
山东大学电子工程系列
摘要
刘永良
李锋
bq240 1012/3 是德州仪器公司为使携式产品应用而定制的单片 Li+或捏聚合物 (Li-Pol )电池线
性充电管理 IC so 丈中介绍了 bq2401012/3 的内部结构、功能特点及其应用。
关键词
Li+ 电池;充电管理 IC s ; bq2401O/2/3
降至内部门限电平以下时, IC s 能自动重新充电。
1. 概述
美国德州仪器
C
当 V cc 撤除时 , IC s 则自动进入睡眠模式。
T1 )公司推出的
bq240 1O/b q240 12/bq240 13 bqTINYTM 系列 IC s ' 是
2. 内部结构及引脚功能
为在 PDA s 和 MP3 播放机、数码相机、因特网设备
和 UBS 充电器等空间被限制的便携式产品应用中,
bq240 1O/2/3 均采用尺寸为 3mmX3rllin 的 10
而专门设计和制作的高度集成度理离子 (Li+) 和
引脚 MLP 封装。三种 IC s 除 7 和 8 两个引脚外 , 1-6
理聚合物 CLi-PoD 电池线性充电管理器件。
引脚和 9/1 0 引脚名称完全相同,引脚排列如图 1 所
bq2401012/3 可以利用经稳压的或未经调整的
刁亏。
3-16.5V 的电流电压工作,输出调节精度为土 0.5%
在 bq2401012/3 芯片上,集成了 powerF可通路
的 4.20V 的充电电压,输入与输出之间的压差仅约
晶体管和电流传感器、精密电流和电压调整器、反
0.65Vo IC s 的输出充电电流可达 lA ,充电时间为
向阻塞保护和热关闭电路、充电控制、定时器和充
20650 秒。 bq2401012/3 的其它功能包括电池温度检
电状态显示电路等,其结构组成方框图如图 2 所示。
表 1 列出了 bq240 1O/2/3 的引脚功能。
测、电池插入和电池移开检测、电池反向泄漏与短
路保护、充电状态指示和充电终止等。当电池电压
表 1
引脚名称
r
,
JFLP
引脚号
bq24010
bq24012
IN
VCC
STAT1
STAT2
VSS
ISET
2
3
4
5
6
2
3
4
5
6
PG
7
7
TS
BAT
OUT
8
9
10
CE
TIE
引脚功能
bq24013
1
2
3
4
5
6
功能
1/10
.
1
1
充电输入电压,该脚必须连接 Vcc 脚
O
O
充电状态输出 1 C 开路漏极)
正电源电压输入端
充电状态输出 2 (开路漏极)
接地端
O
充电电流设定端
O
电源好状态输出
1
1
温度感测输入
电池电压感测输入
9
10
9
10
O
充电电流输出
8
7
1
充电赋能输入(有源低电平)
8
1
定时器和终止使能输入(有源低电平)
2003 年第 7 期〈牛咱咆 :~t4t>
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ZèchnoloflV ReSealτh & Avvlication
Vcc
充4:\巾止
V(TS2)
正常 i,\T, 度范凶
图 1
V(TS1)
bq240101bq240121bq24013 引脚排列
充电巾止
'N
V ss
VCC仨丑一 VO(REG)
图 4
TS 脚门限
位在
E 旧 BLE
I(FAULn
jift帝
I(DETECT)
ENABLE
3. 应用电路与工作原理
CHG ENABLE
允吃,,,在
图 3 为 bq24010 的典型应用电路。充电控制器
BAT
IC 的输入 DC 电压(可以是未经稳压的电源电压)
范围为 3-16.5V ,输出连接便携式产品中电池盒中
的 Li+ 电池。 bq24010 的输出电流 10 <OUTJ 范围从
STAT1
100mA到 1 OOOmA ,具体由 IC 脚 6 外部电阻 RSET
设定:
STAT2
bq24010lbq24012lbq24013 内部电路组成
方框图
. K(SET)
•
R SET
/E\
咽'A
图 2
V(S盯)
、、,,,
10 <OUTJ =
在上面公式中,输出电流设置电压 V <SETJ=2.50
土 O.05V; 输出电流设置因数 K<SETJ 在 10<0盯 J<50mA
DC.
时的典型值为 372 ,在 10 <0盯 J =50-1000mA 时的典
型值为 335 。
在充电进行中, bq24010 脚 STAT1驱动外部
LED 导通发光。在充电完成时,脚 STA2 外部 LED
亮,而 STAT1外部 LED 熄灭。状态输出脚也可用
作连接到主处理器。开路漏极 STAT1和 STAT2 输
司3
bq24010 应用电路
表2
出指示多种充电操作,如表 2 所列。
不同充电状态下的 STAT1和 STAT2 脚输出
充电状态
STAT1 脚
STAT2 脚
电池未插入
截止
截止
充电在进行中
开通
截止
充电完成
截止
开通
充电中止(过热. )
截止
截止
定时器故障
截止
截止
截止
截止
睡眠模式
,1
因
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>2003 年第 7 期
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E chnoloJlv Research & Aoplication
5R叩 .R中F
附近四c~~
RT1=--"
3(RTC -RTH )
R 一刀
一句,"
引 -nk
图 5
口
R
pi-r
(2)
r-PW
(3)
在公式 (2) 和公式(3)中, RTC 和 RTH 分别
bq24012 应用电路
是由制造商给定的冷态电阻和热态电阻值。
bq24012 和 bq24013 的应用电路分别如图 5 和
图 6 所示。在图 5 中, bq24012 的 STAT1、 STAT2 ,
PG 和 CE 脚与系统接口相连接。在图 6 所示的
USB 充电器电路中, bq24013 的 STAT1, STAT2 ,
图 6
词将叫~)f,
和 ITE 脚连接系统与 up 控制器相连接。
bq24013 应用电路
而嗣 'IJ 状忐
电丛调生在和充电些止状忐
I~ 流调将状忐
bq240 12/b q240 13 的 CE 脚上的一个低电丰信号使
调非 I~ 流
;###.卢
最小克山 I l!. lh
.#######一
............
/ 克\cg也n;
俨
,
...
一.'
E
H•
I(PRECHGl
--t4t
L主
充电使能,该脚上的一个高电平信号便充电截止。
bq24013 脚 ITE 被用作使快速充电定时器使能或
三、
同
t(CHGl
图 7 充电曲线
电源好 (power good) 状态输出 PG
CE
截止以及充电终止。在 ITE 脚上的一个由高到低的
过渡信号,可使所有定时器复位。
图 7 示出的是充电电流和充电电压曲线。
(开路漏
极)指示 ac 适配器(即 VCC ) 存在。一个有效 V CC
在充电周期期间,如果电池电压低于典型值是
2.95V 的门限电压 V
(LOWV)'
bq240 1O/2/3 将对电池
提供一个预充电电流 10 (PRECHG)' 预充电速率由 1C s
脚 1SET 与 V SS 之间的电阻 RSET 决定。在预调节状
被检测时,脚 PG 将驱动外部 LED 发光。
态 , 1C s 激活安全定时器。在走时器定时时间内,
bq24010 脚 TS 外部连接由盯C 热敏电阻 RT1
如果电池电压未达到 2.95V , 1C s 关断充电电器。
和 RT2 组成的电阻分压器,通过测量 TS 脚上电压
预充电时间 t(P阻CHG)典型值为 2065 秒。在预充
来监视电池温碍。 bq24010 脚 TS 内部有两个温度比
电过程中,充电电压逐渐升高。一旦预充电时间期
较器,该脚上门限电压 V (TS2) 典型值是 0.61Vcc '
满,充电器则由涓流充电进入恒流快速充电阶段。
下门限电压 V 币 P 典型值是 0.3V cc 。在 V (TSP 与 v
在这个阶段中,充电速率仍由 RSET 确定,电压调节
(TS2) 之间为正常温度范围,一旦 TS 脚上电压在 V
反馈通过 1C s 脚 BAT 实现,充电电压线性升高。
咽 P 与 V (TS2) 之外,则中止充电。在充电暂停时,
当电池电压土升到门限电压 V o (阻G) (4.2V)
内部 powerFET 阻断(定时器不复位)。只要电池温
时,则开始电压调节(恒压充电)阶段,充电电流
度回复到正常范围,充电继续进行。图 4 示出了
开始渐减 (taper) 。在充电模式中, 1C s 也监视充电
bq24010 的 TS 脚上的门限电压决定的正常温度范
时间。如果在充电时间周期 t(CHG>之内,渐减 (taper)
围。
门限不能被检测, 1C s 则关断充电器,并且在 STAT1
NTC 热敏电阻 RT1和 RT2 分别由公式。)和
公式。)计算其数值:
和 STAT2 脚上宣告故障(条件)。如果渐减门限电
(下转第 33 页)
F
2003 年第 7 期〈牛阎咆 ~t~ 理〉
圄
(上接第 29 页)
155"C. 则关闭其输出,暂停充电。若芯片结温降
流 I 咀PER) (范围为 10-100mm) 被检测, IC s 则启
至 130"C 以下. IC s 则重新开始对电池充电。
动渐减定时器(定时时间 t (TADER) 为 2065 秒)。在
充电器漏期之后,充电终止。万一充电电流回复到
作者简介
渐减门限 1 (TA四R) 电平以上, IC s 的渐减定时器则复
刘永良,男 • 1951 年生. 1978 年毕业于原山
东工学院,曾在国营第八 O 七二厂担任技术员负责
位。
在充电终止之后,如果电池电压降至门限 V
(RCHl
(Vo
(阻G) -0.lV=4.2V-0.1V=4.1V) 以下,
ICs
人,现为临沂师范学院工程学院副教授,曾出版《机
电制图》一书,发表论文多篇。
将重新开始充电。该特征可以保证电池在任何时
刻,都处于满容量状态。
如果 VCC 从电路移开 • IC s 则进入低功率睡眠
状态。在该模式下 .IC s 仅消耗不大于 5μA 的电流。
此外 • IC s 自动监测结温。只要芯片结温超过
2003 年第 7 期〈牛阁咆低博 'ID
,
,
,
曹
F
..
、
圄
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FEATURES
Small 3 mm × 3 mm MLP (QFN) Package
Ideal for Low-Dropout Designs for Single-Cell
Li−Ion or Li−Pol Packs in Space Limited
Applications
Integrated Power FET and Current Sensor for
Up to 1-A Charge Applications
Reverse Leakage Protection Prevents Battery
Drainage
Integrated Current and Voltage Regulation
± 0.5% Voltage Regulation Accuracy
Charge Termination by Minimum Current
and Time
Precharge Conditioning With Safety Timer
Status Outputs for LED or System Interface
Indicates Charge and Fault Conditions
Battery Insertion and Removal Detection
Works With Regulated and Unregulated
Supplies
Short-Circuit Protection
APPLICATIONS
Cellular Phones
PDAs, MP3 Players
Digital Cameras
Internet Appliances
DESCRIPTION
The bqTINY series are highly integrated Li-Ion and
Li-Pol linear charge management devices targeted at
space limited portable applications. The bqTINY
series offer integrated powerFET and current sensor,
reverse blocking protection, high accuracy current and
voltage regulation, charge status, and charge
termination, in a small package.
The bqTINY charges the battery in three phases:
conditioning, constant current, and constant voltage.
Charge is terminated based on minimum current. An
internal charge timer provides a backup safety feature
for charge termination. The bqTINY automatically
re-starts the charge if the battery voltage falls below an
internal threshold. The bqTINY automatically enters
sleep mode when VCC supply is removed.
In addition to the standard features, different versions
of the bqTINY offer a multitude of additional features.
These include temperature sensing input for detecting
hot or cold battery packs; power good (PG) output
indicating the presence of valid input power; a
TTL−level charge-enable input (CE) used to disable or
enable the charge process; and a TTL-level timer and
termination enable (TTE) input used to disable or
enable the fast-charge timer and charge termination.
bq24012DRC
AC ADAPTER
1
IN
OUT 10
2
VCC
BAT
3
STAT1
CE 8
4
STAT2
PG 7
5
VSS
PACK+
BATTERY
PACK
SYSTEM
+
9
PACK−
SYSTEM
INTERFACE
RSET
ISET 6
UDG−02106
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
bqTINY is a trademark of Texas Instruments Incorporated.
!"#$%&" ' ()##*& %' "! +),(%&" -%&*. #"-)(&'
("!"#$ &" '+*(!(%&"' +*# &/* &*#$' "! *0%' '&#)$*&' '&%-%#- 1%##%&2.
#"-)(&" +#"(*''3 -"*' "& *(*''%#,2 (,)-* &*'&3 "! %,, +%#%$*&*#'.
Copyright  2002−2005, Texas Instruments Incorporated
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
CHARGE
REGULATION
VOLTAGE (V)(1)
TA
−40°C
−40
C to 125
125°C
C
OPTIONAL
FUNCTIONS(1)
PART NUMBER(2)
MARKINGS
4.2
PG and TS
bq24010DRCR
AZN
4.2
PG and CE
bq24012DRCR
AZP
4.2
CE and TTE
bq24013DRCR
AZQ
bq24014DRCR
4.2
CE and TS
AZR
bq24014DRCT
(1) Contact Texas Instruments for other options.
(2) The DRC package is available only taped and reeled. Quantities are 3,000 devices per reel (e.g. bq24010DRCR) and 250 devices per mini-reel
(e.g. bq24014DRCT).
DISSIPATION RATINGS
PACKAGE
θJA
TA < 40°C
POWER RATING
DRC(1)
47 °C/W
1.5 W
DERATING FACTOR
ABOVE TA = 40°C
0.021 W/°C
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is connected to the
ground plane by a 2x3 via matrix.
ABSOLUTE MAXIMUM RATINGS(1)
UNIT
Supply voltage range, (VCC all with respect to VSS)
Input voltage range(2)
Voltage difference between VCC and IN inputs
VCC − VIN
Output sink/source current
Output current
−0.3 to 18
IN, STAT1, STAT2, TS, PG, CE, TTE
BAT, OUT, ISET
V
−0.3 to VCC
−0.3 to 7
VDC
± 0.5
V
STAT1, STAT2, PG
15
mA
IN, OUT
1.5
A
Operating free−air temperature range, TA
Junction temperature range, TJ
Storage temperature, Tstg
−40 to 125
°C
−65 to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are DC and with respect to VSS.
RECOMMENDED OPERATING CONDITIONS(1)
MIN
Supply voltage(1), VCC
Input voltage(1), VIN
Operating junction temperature range, TJ
(1) Pins VCC and IN must be tied together.
2
NOM
MAX
3.0
16.5
3.0
16.5
−40
125
UNIT
V
°C
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
ELECTRICAL CHARACTERISTICS
over 0C ≤ TJ ≤ 125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENT
VCC current, ICC(VCC)
VCC > VCC(min), STATx pins in OFF state
Sum of currents into OUT and BAT pins,
VCC < V(SLP)
Sleep current, ICC(SLP)
0
3.5
Input bias current on BAT pin, IIB(BAT)
VI(TS) ≤ 10 V
Input current on TS pin, IIB(TS)
5
mA
5
µA
500
nA
1
Input current on CE pin, IIB(CE)
1
Input bias current on TTE pin, IIB(TTE)
1
µA
VOLTAGE REGULATION VO(REG) + V(DO−MAX) ≤ VCC , I(TERM) < IO(OUT) ≤ 1 A
Output voltage, VO(REG)
4.20
TA = 25C
Voltage regulation accuracy
−0.5%
−1%
Dropout voltage (V(IN) − V(OUT)), V(DO)
VO(REG) + V(DO−MAX)) ≤ VCC, IO(OUT) = 1A
V
0.5%
1%
650
790
mV
1000
mA
V
CURRENT REGULATION
VCC ≥ 4.5 V, VIN ≥ 4.5 V, VI(BAT) > V(LOWV),
VIN − VI(BAT) > V(DO−MAX)
Output current range, IO(OUT) (1)
Voltage on ISET pin, VCC ≥ 4.5 V, VIN ≥ 4.5 V,
VI(BAT) > V(LOWV), VIN − VI(BAT) > V(DO−MAX)
VO(REG) = 4.2 V
50 mA ≤ IO(OUT) ≤ 1000 mA, VI(ISET) ≥ V(TAPER)
Output current set voltage, V(SET)
10 mA ≤ IO(OUT) < 50 mA,
Output current set factor, K(SET)
10 mA ≤ IO(OUT) < 50 mA,
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition
threshold, V(LOWV)
VI(ISET) ≥ V(TAPER)
VI(ISET) < V(TAPER)
Precharge set voltage, V(PRECHG)
Short circuit current, ISC
2.50
2.55
315
335
355
315
372
430
350
1000
Voltage on BAT pin
2.80
2.95
3.10
Voltage on BAT pin
1.0
1.4
1.8
V(SC) < VI(BAT) < V(LOWV), t < t(PRECHG)
Voltage on ISET pin,
V(SC) < VI(BAT) < V(LOWV)
V(SC) > VI(BAT)
225
250
280
660
900
1200
µA
100
mA
CHARGE TAPER AND TERMINATION DETECTION
Charge taper detection range, I(TAPER)(3) VI(BAT) > V(RCH), t < t(TAPER)
Charge taper detection set voltage,
V(TAPER)
Charge termination detection set voltage,
V(TERM)
TEMPERATURE COMPARATOR
Voltage on ISET pin,
VI(BAT) > V(RCH),
t < t(TAPER),
VI(BAT) = VO(REG)
Voltage on ISET pin,
VI(BAT) = VO(REG),
VI(BAT) >V(RCH),I(TERM) =K(SET)× V(TERM) /R(SET)
Lower threshold, V(TS1)
Upper threshold, V(TS2)
Hysteresis
IO(OUT) +
2.45
V
Precharge to short-circuit transition
threshold, V(SC)
Precharge range, IO(PRECHG)(2)
(1)
100
10
100
10
225
250
275
5.0
17.5
50.0
Voltage on TS pin
29
30
31
Voltage on TS pin
60
61
62
mV
mV
%VCC
1
ǒK(SET)
(2)
IO(PRECHG) +
(3)
IO(TAPER) +
Ǔ
V(SET)
RSET
ǒK(SET)
ǒK(SET)
Ǔ
V(PRECHG)
RSET
Ǔ
V(TAPER)
R SET
3
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
ELECTRICAL CHARACTERISTICS (continued)
over 0C ≤ TJ ≤ 125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO(REG)
−0.135
VO(REG)
−0.1
VO(REG)
−0.075
V
0.5
V
BATTERY RECHARGE THRESHOLD
Recharge threshold, V(RCH)
STAT1, STAT2, and PG OUTPUTS
Output (low) saturation voltage, VOL
IO = 10 mA
CHARGE ENABLE (CE) AND TIMER AND TERMINATION ENABLE (TTE) INPUTS
Low-level input voltage, VIL
High-level input voltage, VIH
IIL = 1 µA
IIH = 1 µA
0
0.8
2.0
V
TIMERS
Precharge time, t(PRECHG)
1,548
2,065
Taper time, t(TAPER)
1,548
2,065
2,581
2,581
Charge time, t(CHG)
15,480
20,650
25,810
s
SLEEP COMPARATOR
Sleep mode entry threshold voltage, VSLP
VCC ≤
VI(BAT)
+30 mV
VPOR ≤ V(IBAT) ≤ VO(REG)
VCC ≥
VI(BAT)
+22 mV
Sleep mode exit threshold voltage
VPOR ≤ V(IBAT) ≤ VO(REG)
Sleep mode deglitch time
VCC decreasing below threshold, 100 ns fall time,
10 mV overdrive
250
Battery detection current, I(DETECT)
2 V ≤ V(IBAT) ≤ V(RCH)
−3.1
−4.6
Battery detection time, t(DETECT)
2 V ≤ V(IBAT) ≤ V(RCH)
100
660
2.25
V
650
ms
−6.1
mA
125
150
ms
900
1200
µA
2.5
2.75
V
BATTERY DETECTION THRESHOLDS
Fault current, I(FAULT)
V(IBAT) < V(RCH) and/or t > t(PRECHG)
POWER−ON RESET AND INPUT VOLTAGE RAMP RATE
Power−on reset threshold voltage, VPOR(4)
(4)
4
Ensured by design. Not production tested.
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
DRC PACKAGE
(TOP VIEW)
VSS STAT2 STAT1 VCC
5
4
3
2
IN
1
DRC PACKAGE
(TOP VIEW)
VSS STAT2 STAT1 VCC
5
bq24010DRC
4
3
2
7
8
9
10
6
7
8
9
ISET
PG
TS
BAT
OUT
ISET
PG
CE
BAT
4
3
2
IN
1
VSS STAT2 STAT1 VCC
5
7
8
ISET
CE
TTE
9
OUT
4
3
2
IN
1
bq24014DRC
bq24013DRC
6
10
DRC PACKAGE
(TOP VIEW)
DRC PACKAGE
(TOP VIEW)
5
1
bq24012DRC
6
VSS STAT2 STAT1 VCC
IN
10
BAT OUT
6
7
8
ISET
CE
TS
9
10
BAT OUT
5
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
TERMINAL FUNCTIONS
TERMINAL
NAME
I/O
DESCRIPTION
bq24010
bq24012
bq24013
bq24014
BAT
9
9
9
9
I
Battery voltage sense input
CE
−
8
7
7
I
Charge enable input (active low)
IN
1
1
1
1
I
Charge input voltage. This input must be tied to the VCC pin.
ISET
6
6
6
6
O
Charge current set point
OUT
10
10
10
10
O
Charge current output
PG
7
7
−
−
O
Power good status output (open collector)
STAT1
3
3
3
3
O
Charge status output 1 (open collector)
STAT2
4
4
4
4
O
Charge status output 2 (open collector)
TTE
−
−
8
−
I
Timer and termination enable input (active low)
TS
8
−
−
8
I
Temperature sense input
VCC
2
2
2
2
I
VCC supply input
VSS
5
5
5
5
−
Ground input
−
There is an internal electrical connection between the exposed thermal pad
and VSS pin of the device. The exposed thermal pad must be connected to the
same potential as the Vss pin on the printed circuit board. Do not use the
thermal pad as the primary ground input for the device. VSS pin must be
connected to ground at all times.
Exposed
Thermal
PAD
6
pad
pad
pad
pad
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL BLOCK DIAGRAM
IN
OUT
VCC
VCC
+
VI(BAT)
VO(REG)
ISET
CHG ENABLE
VCC
REFERENCE
AND BIAS
VCC
V(ISET)
VSET
VO(REG)
I(DETECT)
ENABLE
+
I(FAULT)
ENABLE
CHG ENABLE
VI(BAT)
V(SLP)
DEGLITCH
I(FAULT) ENABLE
CE
I(DETECT) ENABLE
TS
CHG ENABLE
THERMAL
SHUTDOWN
VSS
VI(BAT)
CHARGE
CONTROL,
TIMER,
AND
DISPLAY
LOGIC
TTE
VO(REG)
VI(BAT)
V(RCH)
DEGLITCH
VI(BAT)
BAT
PG
PG
RECHARGE
PRECHARGE
STAT1
VSET
V(PRECHG)
V(TAPER)
VI(SET)
VI(SET)
V(TERM)
Dotted lines represent optional features
DEGLITCH
DEGLITCH
TAPER
TERM
STAT2
UDG−02108
7
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
TYPICAL CHARACTERISTICS
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
850
IO(OUT) = 1000 mA
750
Dropout Voltage − mV
650
IO(OUT) = 750 mA
550
450
IO(OUT) = 500 mA
350
250
IO(OUT) = 250 mA
150
50
−50
0
50
100
TJ − Junction Temperature − C
150
Figure 1
Regulation
Voltage
Pre-Conditioning
Phase
Current Regulation
Phase
Voltage Regulation
and Charge Termination Phase
Regulation
Current
Charge
Voltage
Minimum
Charge
Voltage
Charge
Complete
Charge
Current
Pre-Conditioning
and Taper Detect
t(PRECHG)
t(CHG)
t(TAPER)
Figure 2. Typical Charging Profile
8
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL DESCRIPTION
The bqTINY supports a precision Li-Ion, Li-Pol charging system suitable for single-cells . Figure 2 shows a typical charge
profile, application circuit and Figure 5 shows an operational flow chart.
BATTERY
PACK
bq24010DRC
DC +
1 IN
OUT 10
2 VCC
0.47 µF
PACK+
+
VCC
PACK−
BAT 9
0.1 µF
CHARGE
DONE
RT1
3 STAT1
TS 8
4 STAT2
PG 7
5 VSS
RT2
ISET 6
RSET
DC −
POWERGOOD
UDG−02109
Figure 3. Typical Application Circuit
USB PORT
D+
D−
bq24013DRC
PACK+
VBUS
1
IN
OUT 10
2
VCC
BAT
9
3
STAT1
TTE
8
4
STAT2
CE
7
5
VSS
ISET
6
BATTERY
PACK
+
GND
0.47 µF
0.1 µF
PACK−
2.26 kΩ
SYSTEM
&
USB
CONTROLLER
SI1032x
100 mA / 500 mA
9.09 kΩ
UDG−02127
Figure 4. USB Charger Circuit
9
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
POR
SLEEP MODE
VCC > VI(BAT)
checked at
all times
No
Indicate SLEEP
MODE
Yes
Regulate
IO(PRECHG)
VI(BAT) < V(LOWV)
Reset and Start
t(PRECHG) timer
Yes
Indicate
Charge-in-Progress
No
Reset all timers
start t(CHG)
timers
Regulate Current
or Voltage
Indicate
Charge-in-Progress
No
VI(BAT) < V(LOWV)
Suspend charge
TJ < t(SHTDWN)
Yes
No
Indicate
Charge Suspend
Yes
t(PRECHG)
expired?
Yes
No
TJ < t(SHTDWN)
t(CHG)
expired?
No
Yes
No
Yes
Fault Condition
Yes
VI(BAT) < V(LOWV)
Indicate Fault
No
I(TERM)
detection
?
VI(BAT) > V(RCH)
?
No
No
Yes
No
t(TAPER)
expired?
Enable
I(FAULT)
current?
I(TAPER)
detection
?
Yes
No
No
Yes
Yes
VI(BAT) > V(RCH)
?
Turn off charge
Yes
Indicate DONE
No
Disable
I(FAULT)
current?
VI(BAT) < V(RCH)
?
Yes
Enter Battery
Absent
Detection
Figure 5. Operational Flow Chart
10
UDG−02110
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL DESCRIPTION
TEMPERATURE QUALIFICATION
NOTE:The temperature qualifications apply only to versions with temperature sense input (TS) pin option (bq24010 and
bq24014).
Versions of the bqTINY with the TS pin option, continuously monitor battery temperature by measuring the voltage between
the TS and VSS pins. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically
develops this voltage (see Figure 3). The bqTINY compare this voltage against the internal V(TS1) and V(TS2) thresholds
to determine if charging is allowed (see Figure 6). The temperature sensing circuit is immune to any fluctuation in VCC since
both the external voltage divider and the internal thresholds are ratiometric to VCC.
Once a temperature outside the V(TS1) and V(TS2) thresholds is detected the bqTINY immediately suspend the charge. The
bqTINY suspends charge by turning off the powerFET and holding the timer value (i.e. timers are NOT reset). Charge is
resumed when the temperature returns to the normal range.
VCC
Charge Suspend
V(TS2)
Normal Temperature Range
V(TS1)
Charge Suspend
VSS
Figure 6. TS Pin Thresholds
The resistor values of RT1 and RT2 are calculated by equations (1) and (2) (for NTC Thermistors )
R T1 +
R T2 +
ǒ5
R TH
ǒ3
ǒR TC * R THǓǓ
ǒ5
ǒ2
R TCǓ
RTH
R TCǓ * ǒ7
(9)
R TCǓ
RTHǓ
(10)
Where RTC is the cold temperature resistance and RTH is the hot temperature resistance of thermistor, as specified
by the thermistor manufacturer.
RT1 or RT2 can be omitted If only one temperature (hot or cold) setting is required. Applying a constant voltage
between the VTS1 and VTS2 thresholds to pin TS disables the temperature-sensing feature.
11
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL DESCRIPTION
BATTERY PRE-CONDITIONING
During a charge cycle if the battery voltage is below the V(LOWV) threshold, the bqTINY applies a precharge current,
IO(PRECHG), to the battery. This feature revives deeply discharged cells. The resistor connected between the ISET
and VSS, RSET, determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in the
specifications table.
I O (PRECHG) +
V(PRECHG)
K(SET)
RSET
(11)
The bqTINY activates a safety timer, t(PRECHG), during the conditioning phase. If V(LOWV) threshold is not reached
within the timer period, the bqTINY turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins. Refer
to Timer Fault Recovery section for additional details.
BATTERY CHARGE CURRENT
The bqTINY offers on-chip current regulation with programmable set point. The resistor connected between the ISET
and VSS, RSET, determines the charge rate. The V(SET) and K(SET) parameters are specified in the specifications
table.
V(SET)
I O (OUT) +
K(SET)
RSET
(12)
BATTERY VOLTAGE REGULATION
Voltage regulation feedback is accomplished through the BAT pin. This input is tied directly and close to the positive
side of the battery pack. The bqTINY monitors the battery-pack voltage between the BAT and VSS pins. When the
battery voltage rises to VO(REG) threshold, the voltage regulation phase begins and the charging current begins to
taper down.
As a safety backup, the bqTINY also monitors the charge time in the charge mode. If termination does not occur within
this time period, t(CHG), the bqTINY turns off the charger and enunciates FAULT on the STAT1 and STAT1 pins. Refer
to the Timer Fault Recovery section for additional details.
CHARGE TAPER DETECTION, TERMINATION AND RECHARGE
The bqTINY monitors the charging current during the voltage regulation phase. Once the taper threshold, I(TAPER),
is detected the bqTINY initiates the taper timer, t(TAPER). Charge is terminated after the timer expires. The resistor
connected between the ISET and VSS, RSET, determines the taper detection level. The V(TAPER) and K(SET)
parameters are specified in the specifications table.
I (TAPER) +
V(TAPER)
K(SET)
RSET
(13)
The bqTINY resets the taper timer in the event that the charge current returns above the taper threshold, I(TAPER).
In addition to the taper current detection, the bqTINY terminates charge in the event that the charge current falls below
the I(TERM) threshold. This feature allows for quick recognition of a battery removal condition or insertion of a fully
charged battery. Note that taper timer is not used for I(TERM) detection. The resistor connected between the ISET
and VSS, RSET, determines the taper detection level. The V(TERM) and K(SET) parameters are specified in the
specifications table.
I (TERM) +
12
V(TERM)
K(SET)
R SET
(14)
www.ti.com
SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL DESCRIPTION
After charge termination, the bqTINY restarts the charge once the voltage on the BAT pin falls below the V(RCH)
threshold. This feature keeps the battery at full capacity at all times. Please see Battery Absent Detection section
for additional details.
SLEEP MODE
The bqTINY enters the low-power sleep mode if the VCC is removed from the circuit (PG pin is high impedance). This
feature prevents draining the battery during the absence of VCC. The status pins do not function when in sleep mode
or when VCC < VPOR and default to the OFF state.
CHARGE STATUS OUTPUTS
The open-collector STAT1 and STAT2 outputs indicate various charger operations as shown in the following table.
These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the
open-collector transistor is turned off. When VCC < VPOR or VCC < VBAT (Sleep Mode − PG OFF) the STAT pins default
to their OFF state. Note that this STAT1/STAT2 OFF/OFF state is shared by several operating conditions. Monitoring
IN, BAT, PG and TS, it is possible to decode the actual fault condition.
Table 2. Status Pins Summary
CHARGE STATE
Charge-in-progress
Charge done
Battery absent
Charge suspend (temperature)
Timer fault
Sleep mode
STAT1
STAT2
ON
OFF()
OFF
OFF
OFF
ON
() OFF means the open-collector output transistor on the STAT1
or STAT2 pins is in an off state.
PG OUTPUT
The open-collector PG (power good) indicates when the ac adapter (i.e. VCC) is present. The PG bipolar transistor
turns ON when a valid VCC is detected. This output is turned off in the sleep mode. The PG pin can be used to drive
an LED or communicate to the host processor.
CE INPUT (CHARGE ENABLE)
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the charge
and a high-level signal disables the charge. A high-to-low transition on this pin also resets all timers and fault
conditions and starts a new charge cycle.
TTE INPUT (TIMER AND TERMINATION ENABLE)
The TTE digital input is used to disable or enable the fast-charge timer and charge termination. A low-level signal
on this pin enables the fast-charge timer and termination and a high-level signal disables this feature. A high-to-low
transition on this pin also resets all timers.
THERMAL SHUTDOWN AND PROTECTION
The bqTINY monitors the junction temperature, TJ, of the die and suspends charging if TJ exceeds 155C. Charging
resumes when TJ falls below approximately 130C.
13
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL DESCRIPTION
BATTERY ABSENT DETECTION
For applications with removable battery packs, bqTINY provides a battery absent detection scheme to reliably detect
insertion and/or removal of battery packs.
The voltage at the BAT pin is held above the battery recharge threshold, V(RCH), by the charged battery following
fast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the battery or due
to battery removal, the bqTINY begins a battery absent detection test. This test involves enabling a detection current,
I(DETECT), for a period of t(DETECT) and checking to see if the battery voltage is below the pre-charge threshold,
V(LOWV). Following this, the precharge current, IO(PRECHG) is applied for a period of t(DETECT) and the battery voltage
checked again to be above the recharge threshold. The purpose is to attempt to close a battery pack with an open
protector, if one is connected to the bqTINY. Passing both of the discharge and charging tests indicates a battery
absent fault at the STAT pins. Failure of either test starts a new charge cycle. For the absent battery condition the
voltage on the BAT pin rises and falls between the V(LOWV) and VO(REG) thresholds indefinitely. See Figure 7.
Charge Done
or
Timer Fault
No
VI(BAT) <
V(RCH)
Yes
Enable
I(DETECT) for
t(DETECT)
VI(BAT) <
V(LOWV)
No
BATTERY
PRESENT
Begin Charge
No
BATTERY
PRESENT
Begin
Charge
Yes
Apply
IO(PRECHG) for
t(DETECT)
VI(BAT) >
V(RCH)
Yes
BATTERY
ABSENT
Figure 7. Battery Absent Detection
14
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
FUNCTIONAL DESCRIPTION
TIMER FAULT RECOVERY
As shown in Figure 5, bqTINY provides a recovery method to deal with timer fault conditions. The following conditions
summarize this method.
Condition #1: Charge voltage above recharge threshold (V(RCH)) and timeout fault occurs
Recovery method: bqTINY waits for the battery voltage to fall below the recharge threshold. This could happen as
a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the recharge threshold,
the bqTINY clears the fault and enters the battery absent detection routine. A POR or CE toggle also clears the fault.
Condition #2: Charge voltage below recharge threshold (V(RCH)) and timeout fault occurs
Recovery method: Under this scenario, the bqTINY applies the I(FAULT) current. This small current is used to detect
a battery removal condition and remains on as long as the battery voltage stays below the recharge threshold. If the
battery voltage goes above the recharge threshold, then the bqTINY disables the I(FAULT) current and executes the
recovery method described for condition #1. Once the battery falls below the recharge threshold, the bqTINY clears
the fault and enters the battery absent detection routine. A POR or CE toggle also clears the fault.
15
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
APPLICATION INFORMATION
SELECTING INPUT CAPACITOR
In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.47-µF ceramic, placed in close
proximity to VCC and VSS pins, works well. The bqTINY is designed to work with both regulated and unregulated
external dc supplies. If a non-regulated supply is chosen, the supply unit should have enough capacitance to hold
up the supply voltage to the minimum required input voltage at maximum load. If not, more capacitance has to be
added to the input of the charger.
SELECTING OUTPUT CAPACITOR
The bqTINY requires only a small output capacitor for loop stability. A 0.1-µF ceramic capacitor placed between the
BAT and ISET pins is typically sufficient for embedded applications (i.e. non-removable battery packs). For
application with removable battery packs a 1-µF ceramic capacitor ensure proper operation of the battery detection
circuitry. Note that the output capacitor can also be placed between BAT and VSS pins.
THERMAL CONSIDERATIONS
The bqTINY is packaged in a thermally enhanced MLP (also referred to as QFN) package. The package includes
a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full
PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment
Application Note (TI Literature No. SLUA271).
The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled)
from the device junction to the air surrounding the package surface (ambient). The mathematical expression for θJA
is:
q JA +
TJ * TA
P
(15)
Where:
TJ = device junction temperature
TA = ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of θJA include:
whether or not the device is board mounted
trace size, composition, thickness, and geometry
orientation of the device (horizontal or vertical)
volume of the ambient air surrounding the device under test and airflow
whether other surfaces are in close proximity to the device being tested
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET.
It can be calculated from the following equation:
P + V IN * V I(BAT)
I O(OUT)
(16)
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the
charge cycle when the battery voltage is at it’s lowest. See Figure 2.
16
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
APPLICATION INFORMATION
PCB LAYOUT CONSIDERATIONS
It is important to pay special attention to the PCB layout. The following provides some guidelines:
To obtain optimal performance, the decoupling capacitor from VCC to VSS and the output filter capacitors from
BAT to ISET should be placed as close as possible to the bqTINY, with short trace runs to both signal and VSS
pins.
All low-current VSS connections should be kept separate from the high-current charge or discharge paths from
the battery. Use a single-point ground technique incorporating both the small signal ground path and the power
ground path.
The BAT pin is the voltage feedback to the device and should be connected with its trace as close to the battery
pack as possible.
The high current charge paths into IN and from the OUT pins must be sized appropriately for the maximum charge
current in order to avoid voltage drops in these traces.
The bqTINY is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide
an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines
for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (TI
Literature No. SLUA271).
There is an internal electrical connection between the exposed thermal pad and VSS pin of the device. The
exposed thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do
not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all
times.
17
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SLUS530F − SEPTEMBER 2002 − REVISED AUGUST 2005
18
PACKAGE OPTION ADDENDUM
www.ti.com
25-Oct-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ24010DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24010DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24012DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24012DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24013DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24013DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24014DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24014DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
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