RHR1K160D
Data Sheet
January 2000
File Number
4788
1A, 600V Hyperfast Dual Diode
Features
[ /Title The RHR1K160D is a hyperfast dual diode with soft recovery
• Hyperfast with Soft Recovery . . . . . . . . . . . . . . . . . . <25ns
(RHR1 characteristics (t rr < 25ns). It has about half the recovery
• Operating Temperature. . . . . . . . . . . . . . . . . . . . . . .150oC
K160D time of ultrafast diodes and is silicon nitride passivated ion• Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .600V
implanted epitaxial planar construction.
)
/Sub• Thermal Impedance SPICE® Model
This device is intended for use as freewheeling/clamping
ject
diodes and rectifiers in a variety of switching power supplies
• Thermal Impedance SABER© Model
and other power switching applications. Its low stored charge
(1A,
• Avalanche Energy Rated
and hyperfast soft recovery minimize ringing and electrical
600V
• Planar Construction
Hyper- noise in many power switching circuits reducing power loss
in the switching transistors.
• Related Literature
fast
Formerly
developmental
type
TA49185.
- TB334, “Guidelines for Soldering Surface Mount
Dual
Components to PC Boards”
Diode) Ordering Information
/Autho
Applications
PART NUMBER
PACKAGE
BRAND
r ()
• Switching Power Supplies
RHR1K160D
MS-012AA
RHR1K160D
/Key• Power Switching Circuits
NOTE: When ordering, use the entire part number. For ordering in
words
tape and reel, add the suffix 96 to the part number, i.e.,
(Inter- RHR1K160D96.
• General Purpose
sil
Symbol
Corpo- Packaging
ration,
JEDEC MS-012AA
NC (1)
CATHODE 1 (8)
semiBRANDING DASH
conANODE 1 (2)
CATHODE 1 (7)
ductor,
5
Ava1
ANODE 2 (3)
CATHODE 2 (6)
2
lanche
3
4
Energy
NC (4)
CATHODE 2 (5)
Rated,
Switch
ing
Absolute Maximum Ratings (Per Leg) TA = 25oC, Unless Otherwise Specified
Power
RHR1K160D
UNITS
SupPeak Repetitive Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRRM
600
V
plies,
Working Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VRWM
600
V
600
V
Power DC Blocking Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VR
Average
Rectified
Forward
Current
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I
1
A
F(AV)
Switch
TA = 65oC
ing
Repetitive Peak Surge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IFRM
2
A
CirSquare Wave, 20kHz
Nonrepetitive Peak Surge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IFSM
10
A
cuits,
Halfwave, 1 phase, 60Hz
RectifiMaximum Power Dissipation (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
2.5
W
ers,
Avalanche Energy (See Figures 11 and 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
5
mJ
AVL
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSTG,TJ
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
1
-55 to 150
oC
300
260
oC
oC
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
SABER is a Copyright of Analogy, Inc.
RHR1K160D
(Per Leg) TA = 25oC, Unless Otherwise Specified
Electrical Specifications
SYMBOL
MIN
TYP
MAX
UNITS
IF = 1A
-
-
2.1
V
IF = 1A, TA = 150oC
-
-
1.7
V
VR = 600V
-
-
100
µA
VR = 600V, TA = 150oC
-
-
500
µA
trr
IF = 1A, dIF/dt = 200A/µs
-
-
25
ns
ta
IF = 1A, dIF/dt = 200A/µs
-
10.5
-
ns
tb
IF = 1A, dIF/dt = 200A/µs
-
5
-
ns
QRR
IF = 1A, dIF/dt = 200A/µs
-
20
-
nC
VR = 10V, IF = 0A
-
10
-
pf
VF
IR
CJ
RθJA
TEST CONDITION
Pad Area = 0.483 in2 (Note 1)
-
-
50
oC/W
Pad Area = 0.027 in2 (Note 2) (Figure 13)
-
-
201
oC/W
Pad Area = 0.006 in2 (Note 2) (Figure 13)
-
-
239
oC/W
DEFINITIONS
VF = Instantaneous forward voltage (pw = 300µs, D = 2%).
IR = Instantaneous reverse current.
trr = Reverse recovery time (See Figure 10), summation of ta + tb .
ta = Time to reach peak reverse current (See Figure 10).
tb = Time from peak IRM to projected zero crossing of IRM based on a straight line from peak IRM through 25% of IRM (See Figure 10).
Qrr = Reverse recovery charge.
CJ = Junction Capacitance.
RθJA = Thermal resistance junction to ambient.
pw = Pulse width.
D = Duty cycle.
NOTES:
1. Measured using FR-4 copper board at 0.8 seconds.
2. 2. Measured using FR-4 copper board at 1000 seconds.
Typical Performance Curve
10
IR, REVERSE CURRENT ( A)
IF, FORWARD CURRENT (A)
10
100oC
25oC
150oC
1
0.1
150oC
1
100oC
0.1
0.01
25oC
0.001
0
0.5
1
1.5
2
2.5
3
3.5
VF, FORWARD VOLTAGE (V)
FIGURE 1. FORWARD CURRENT vs FORWARD VOLTAGE
2
4
0
100
200
300
400
500
600
VR , REVERSE VOLTAGE (V)
FIGURE 2. REVERSE CURRENT vs REVERSE VOLTAGE
RHR1K160D
Typical Performance Curve
(Continued)
35
20
TA = 100oC, dIF/dt = 200A/µs
30
t, RECOVERY TIMES (ns)
t, RECOVERY TIMES (ns)
TA = 25oC, dIF/dt = 200A/µs
16
trr
12
ta
8
tb
4
trr
25
20
tb
15
ta
10
5
0
0.1
0.5
0
0.1
1
IF, FORWARD CURRENT (A)
IF, FORWARD CURRENT (A)
FIGURE 4. trr, ta AND tb CURVES vs FORWARD CURRENT
IF(AV), AVERAGE FORWARD CURRENT (A)
FIGURE 3. trr, ta AND tb CURVES vs FORWARD CURRENT
50
t, RECOVERY TIMES (ns)
TA = 150oC, dIF/dt = 200A/µs
40
trr
30
tb
20
ta
10
0
0.1
1
0.5
1.0
0.8
SQ. WAVE
0.6
0.4
0.2
0
25
50
75
CJ , JUNCTION CAPACITANCE (pF)
125
FIGURE 6. CURRENT DERATING CURVE
50
40
30
20
10
20
40
60
80
100
VR , REVERSE VOLTAGE (V)
FIGURE 7. JUNCTION CAPACITANCE vs REVERSE VOLTAGE
3
100
TA, AMBIENT TEMPERATURE (oC)
FIGURE 5. trr, ta AND tb CURVES vs FORWARD CURRENT
0
RθJA = 50oC/W
DC
IF, FORWARD CURRENT (A)
0
1
0.5
150
RHR1K160D
Typical Performance Curve
ZθJA, NORMALIZED
THERMAL IMPEDANCE
10
1
(Continued)
RθJA = 50oC/W
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.1
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
0.01
10-5
10-4
10-3
10-1
100
10-2
t, RECTANGULAR PULSE DURATION (s)
101
102
103
FIGURE 8. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
Test Circuits and Waveforms
VGE AMPLITUDE AND
RG CONTROL dIF/dt
t1 AND t2 CONTROL IF
L
DUT
RG
CURRENT
SENSE
+
IF
VDD
-
IGBT
VGE
dIF
trr
dt
ta
tb
0
t1
0.25 IRM
t2
IRM
FIGURE 9. trr TEST CIRCUIT
FIGURE 10. trr WAVEFORMS AND DEFINITIONS
L = 20mH
R < 0.1Ω
EAVL = 1/2LI2 [VR(AVL) /(VR(AVL) - VDD)]
Q1 = IGBT (BVCES > DUT VR(AVL))
L
R
VAVL
CURRENT
SENSE
+
VDD
Q1
IL
I V
DUT
VDD
-
FIGURE 11. AVALANCHE ENERGY TEST CIRCUIT
4
IL
t0
t1
t2
FIGURE 12. AVALANCHE CURRENT AND VOLTAGE
WAVEFORMS
t
RHR1K160D
Thermal Resistance vs Mounting Pad Area
(EQ. 1)
In using surface mount devices such as the SOP-8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power
dissipation ratings. Precise determination of PDM is complex
and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Intersil provides thermal information to assist the designer’s
preliminary application evaluation. Figure 13 defines the
RθJA for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 2 oz. copper after 1000 seconds of steady
state power with no air flow. This graph provides the
necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse
applications can be evaluated using the Intersil device
SPICE thermal model or manually utilizing the normalized
maximum transient thermal impedance curve.
RθJA = 110.2 - 25.24 x ln (AREA)
RθJA, THERMAL IMPEDANCE
( T JM – T A )
P DM = ----------------------------Z θJA
350
JUNCTION TO AMBIENT (oC/W)
The maximum rated junction temperature, TJM, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, PDM, in an
application. Therefore the application’s ambient temperature,
TA (oC), and thermal resistance RθJA (oC/W) must be
reviewed to ensure that TJM is never exceeded. Equation 1
mathematically represents the relationship and serves as
the basis for establishing the rating of the part.
300
239oC/W - 0.006in2
250
201oC/W - 0.027in2
200
150
100
Rθβ = 43.81 - 22.66 x ln (AREA)
50
0.001
0.01
0.1
AREA, TOP COPPER AREA (in2)
FIGURE 13. THERMAL RESISTANCE vs MOUNTING PAD AREA
Displayed on the curve are RθJA values listed in the
Electrical Specifications table. These points were chosen to
depict the compromise between the copper board area, the
thermal resistance and ultimately the power dissipation,
PDM . Thermal resistances corresponding to other
component side copper areas can be obtained from Figure
13 or by calculation using Equation 2. The area, in square
inches is the top copper board area, the thermal resistance
and ultimately the power dissipation, PDM .
R θJA = 110.18 – 25.24 × ln ( Area )
(EQ. 2)
While Equation 2 describes the thermal resistance of a
single die, the dual die SOP-8 package introduces an
additional thermal component, thermal coupling resistance,
Rθβ. Equation 3 describes Rθβ as a function of the top
copper mounting pad area.
R θβ = 43.81 – 22.66 × ln ( Area )
(EQ. 3)
The thermal coupling resistance vs. copper area is also
graphically depicted in Figure 13. It is important to note the
thermal resistance (RθJA) and thermal coupling resistance
(Rθβ) are equivalent for both die. For example at 0.1 square
inches of copper:
RθJA1 = RθJA2 = 168oC/W
Rθβ1 = Rθβ2 = 96oC/W
TJ1 and TJ2 define the junction temperature of the
respective die. Similarly, P1 and P2 define the power
dissipated in each die. The steady state junction
temperature can be calculated using Equation 4 for die 1
and Equation 5 for die 2.
Example: Use Equation 4 to calculate TJ1 and Equation 5 to
calculate TJ2 with the following conditions. Die 2 is
dissipating 0.5W; die 1 is dissipating 0W; the ambient
temperature is 60oC; the package is mounted to a top
copper area of 0.1 square inches per die.
5
RHR1K160D
copper pad area on single pulse transient thermal
impedance. Each trace represents a copper pad area in
square inches corresponding to the descending list in the
graph. SPICE and SABER thermal models are provided for
each of the listed pad areas.
.
T J1 = P 1 R θJA + P 2 R θβ + T A
(EQ. 4)
TJ1 = (0W)(168oC/W) + (0.5W)(96oC/W) + 60oC
TJ1 = 108oC
T J2 = P 2 R θJA + P 1 R θβ + T A
Copper pad area has no perceivable effect on transient
thermal impedance for pulse widths less than 100ms. For
pulse widths less than 100ms the transient thermal
impedance is determined by the die and package. Therefore,
CTHERM1 through CTHERM6 and RTHERM1 through
RTHERM5 remain constant for each of the thermal models.
A listing of the model component values is available in Table 1.
(EQ. 5)
TJ2 = (0.5W)(168oC/W) + (0W)(96oC/W) + 60oC
TJ2 = 144oC
The transient thermal impedance (ZθJA) is also effected by
varied top copper board area. Figure 14 shows the effect of
ZθJA, THERMAL
IMPEDANCE (oC/W)
200
150
COPPER BOARD AREA - DESCENDING ORDER
0.020 in2
0.140 in2
0.257 in2
0.380 in2
0.483 in2
100
50
0
10-1
100
101
102
t, RECTANGULAR PULSE DURATION (s)
FIGURE 14. TRANSIENT THERMAL IMPEDANCE vs MOUNTING PAD AREA
6
103
RHR1K160D
SPICE Thermal Model
JUNCTION
th
REV October 1998
RHR1K160D
Copper Area = 0.483 in2
CTHERM1 th 8 6e-6
CTHERM2 8 7 4e-5
CTHERM3 7 6 1.5e-4
CTHERM4 6 5 7.5e-4
CTHERM5 5 4 7e-3
CTHERM6 4 3 2e-2
CTHERM7 3 2 8e-2
CTHERM8 2 tl 2.5
RTHERM1
CTHERM1
8
RTHERM2
CTHERM2
7
RTHERM1 th 8 5e-2
RTHERM2 8 7 2.5e-1
RTHERM3 7 6 1.5
RTHERM4 6 5 2.5
RTHERM5 5 4 7.5
RTHERM6 4 3 22
RTHERM7 3 2 38
RTHERM8 2 tl 38
CTHERM3
RTHERM3
6
RTHERM4
CTHERM4
5
SABER Thermal Model
CTHERM5
RTHERM5
Copper Area = 0.483 in2
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 8 = 6e-6
ctherm.ctherm2 8 7 = 4e-5
ctherm.ctherm3 7 6 = 1.5e-4
ctherm.ctherm4 6 5 = 7.5e-4
ctherm.ctherm5 5 4 = 7e-3
ctherm.ctherm6 4 3 = 2e-2
ctherm.ctherm7 3 2 = 8e-2
ctherm.ctherm8 2 tl = 2.5
4
RTHERM6
CTHERM6
3
CTHERM7
RTHERM7
2
CTHERM8
RTHERM8
rtherm.rtherm1 th 8 = 5e-2
rtherm.rtherm2 8 7 = 2.5e-1
rtherm.rtherm3 7 6 = 1.5
rtherm.rtherm4 6 5 = 2.5
rtherm.rtherm5 5 4 = 7.5
rtherm.rtherm6 4 3 = 22
rtherm.rtherm7 3 2 = 38
rtherm.rtherm8 2 tl = 38
}
tl
AMBIENT
TABLE 1. THERMAL MODELS
0.02 in2
0.14 in2
0.257 in2
0.38 in2
0.483 in2
CTHERM7
7.5e-2
8e-2
8e-2
8e-2
8e-2
CTHERM8
1
1.5
2
2
2.5
RTHERM6
25
22
22
22
22
RTHERM7
65
45
40
38
38
RTHERM8
70
55
48
43
38
COMPONENT
7
RHR1K160D
MS-012AA
8 LEAD JEDEC MS-012AA SMALL OUTLINE PLASTIC PACKAGE
E
E1
INCHES
A
A1
1
e
2
6
D
5
b
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.004
0.0098
0.10
0.25
-
b
0.013
0.020
0.33
0.51
-
c
0.0075
0.0098
0.19
0.25
-
D
0.189
0.1968
4.80
5.00
2
E
0.2284
0.244
5.80
6.20
-
E1
0.1497
0.1574
3.80
4.00
3
e
h x 45o
c
0.004 IN
0.10 mm
L
0o-8o
0.060
1.52
0.050
1.27
0.024
0.6
0.155
4.0
0.275
7.0
MINIMUM RECOMMENDED FOOTPRINT FOR
SURFACE-MOUNTED APPLICATIONS
1.5mm
DIA. HOLE
MILLIMETERS
SYMBOL
0.050 BSC
1.27 BSC
-
H
0.0099
0.0196
0.25
0.50
-
L
0.016
0.050
0.40
1.27
4
NOTES:
1. All dimensions are within allowable dimensions of Rev. C of
JEDEC MS-012AA outline dated 5-90.
2. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.006 inches (0.15mm) per side.
3. Dimension “E1” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 0.010 inches
(0.25mm) per side.
4. “L” is the length of terminal for soldering.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. Controlling dimension: Millimeter.
7. Revision 8 dated 5-99.
4.0mm
2.0mm
USER DIRECTION OF FEED
1.75mm
CL
MS-012AA
12mm
12mm TAPE AND REEL
8.0mm
40mm MIN.
ACCESS HOLE
18.4mm
COVER TAPE
13mm
330mm
GENERAL INFORMATION
1. 2500 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION “A” SPECIFICATIONS.
8
50mm
12.4mm
RHR1K160D
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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9
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