PI49FCT20802/ PI49FCT20803 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 1:5/1:7 2.5V Clock Buffer for Networking Applications Features Description • High Frequency >150 MHz • High-speed, low-noise, non-inverting clock buffer – PI49FCT20802 is a 1:5 buffer – PI49FCT20803 is a 1:7 buffer • Low skew < 150ps • Low duty cycle distortion < 300ps • Low propagation delay < 3.5ns • Multiple VDD, GND pins for noise reduction • 2.5V supply voltage and 3V tolerant input • Packages: - 16-pin TSSOP (L) - 16-pin QSOP (Q) The PI49FCT2080x is 2.5V, high-speed, low noise, non-inverting clock buffer. It is designed to target networking applications that require low-skew, low-jitter, and high-frequency clock distribution. It provides output-to-output skew as low as 150ps, and is an ideal clock distribution device for synchronous systems. PI49FCT2080x is a clock buffer from a single input that produces five outputs on PI49FCT20802 and seven outputs on PI49FCT20803. PI49FCT2080x is characterized for operation from –40°C to 85°C. Pin Configuration (PI49FCT20802) Block Diagram (PI49FCT20802) BUF_IN 1 16 VDD GND 2 15 CLK4 CLK0 3 14 CLK3 VDD 4 13 GND CLK1 5 12 CLK2 GND 6 11 VDD NC 7 10 NC VDD 8 9 CLK0 CLK1 BUF_IN CLK2 CLK3 CLK4 GND Pin Configuration (PI49FCT20803) Block Diagram (PI49FCT20803) BUF_IN 1 16 VDD GND 2 15 CLK6 CLK0 3 14 CLK5 VDD 4 13 GND CLK1 5 12 CLK4 GND 6 11 VDD CLK2 7 10 CLK3 VDD 8 9 GND CLK0 CLK1 BUF_IN CLK2 ... CLK3 CLK6 1 PS8560A 09/27/04 PI49FCT20802/PI49FCT20803 1:5/1:7 2.5V Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Note: Storage Temperature .....................................–65°C to +150°C Stresses greater than those listed under MAXIMUM RATINGS Supply Voltage VDD .................................................. –0.5V to +3.6V may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other Input/Output Voltages(1) ................................ –0.5V to VDD+0.5V conditions above those indicated in the operational sections of this DC Output Current ...................................... –60mA to +60mA specification is not implied. Exposure to absolute maximum rating Power Dissipation ....................................................... 500mW conditions for extended periods may affect reliability. Operating Range VDD Voltage ........................................................... 2.5V ± 0.2V Industrial Temperature .................................... –40°C to +85°C Commercial Temperature ..................................... 0°C to +70°C Capacitive Loading ............................................. 10pF to 25pF DC Electrical Characteristics (Over the Operating Range) Parame te rs Te s t Conditions (2) De s cription VIH Input HIGH Voltage VIL Input LOW Voltage M ax. Units 0.7 VDD = 0 or VDD VIK Clamp Diode Voltage VDD = Min., IIN = –18mA VOH Output HIGH Voltage VDD = Min. Output LOW Voltage VDD = Min. VOL Typ.(3) 1. 7 Input Current II M in. ±1 –0.7 IOH = –1mA 2 IOH = –8mA 1.8(3) V mA –1 V IOL = 1mA 0.4 IOL = 8mA 0.6 Notes: 1. This value is limited to 3.6V maximum. 2. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 3. Typical values are at VDD = 2.5V, +25°C ambient and maximum loading. 2 PS8560A 09/27/04 PI49FCT20802/PI49FCT20803 1:5/1:7 2.5V Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Parame te rs Te s t Conditions (4) De s cription M in. Typ.(5) M ax. Units IDDQ Quiescent Power Supply Current VIN = 0 or VDD 0.1 20 ∆IDD Supply Current per Inputs VIN = VDD – 0.6V(6) 47 300 IDD Dynamic Supply Current (See Graph 1) VDD = 2.7V, 15pF & 33- ohm load, f = 150 MHz 136 µA mA Notes: 4. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 5. Typical values are at VDD = 2.5V, +25°C ambient and maximum loading. 6. Per TTL driven input (VIN = VDD – 0.6V); all other inputs at VDD or GND. Dynamic Current - IDD [mA] Graph 1. Dynamic Current vs. Clock Frequency 160 140 120 100 Load = 15pF & 33 ohms 80 60 Load = 0 40 20 0 0 50 100 150 200 Clock Frequency [MHz] Capacitance (TA = 25°C, f = 1 MHz) Parame te rs De s cription Te s t Conditions Typ(7) M ax. 3 4 CIN Input Capacitance VIN = 0V COUT Output Capacitance VOUT = 0V 6 Units pF Note: 7. This parameter is determined by device characterization but is not production tested. 3 PS8560A 09/27/04 PI49FCT20802/PI49FCT20803 1:5/1:7 2.5V Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics (VDD = 2.5V ± 0.2V, TA = 85°C) Parame te rs fCLK Output Frequency tR/tF Rise/Fall time VO = 0.7V ~ 1.7 V tPD Propagation Delay tSK(o) Output Skew tSK(p) Pulse Skew tSK(d) Te s t Conditions (8) De s cription Device- to- device skew(9) M in. Typ. M ax. Units 150 MHz CL = 22pF, 100 MHz 1.0 1. 2 5 CL = 12pF, 150 MHz 1.0 1. 2 CL = 22pF, 100 MHz 3.5 3.5 CL = 12pF, 150 MHz 2.4 2.7 CL = 22pF, 100 MHz 100 15 0 CL = 12pF, 150 MHz 100 15 0 CL = 22pF, 100 MHz 250 300 CL = 12pF, 150 MHz 250 300 CL = 12pF, 150 MHz 400 600 ns ps Notes: 8. See test circuit and waveforms. 9. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. Product Pin Description Pin Name PI49FCT20802 PI49FCT20803 De s cription BUF_IN BUF_IN Input CLK [0:4] CLK [0:6] Outputs GND GND GND VDD VDD Power Test Circuits for All Outputs VDD VOUT VIN Pulse Generator D.U.T. CL 4 PS8560A 09/27/04 PI49FCT20802/PI49FCT20803 1:5/1:7 2.5V Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Waveforms Pulse Skew – tSK(P) Propagation Delay 3V 3V Input Input 1.25V 1.5V 0V 0V tPLH tPLH tPHL 2.0V Output tPHL VOH VOH Output 1.25V 1.5V 0.6V VOL VOL tR tF tSK(p) = | tPHL – tPLH | Package Skew – tSK(T) Output Skew – tSK(O) 3V Input 3V 1.5V Input 1.5V 0V tPLHx 0V tPHLx tPLH1 VOH CLKx tSK(t) tSK(o) tSK(o) = tPLHy – tPLHx tSK(t) VOL tPHLy VOL VOH Package 2 Output 1.5V tPLHy 1.5V VOL VOH CLKy VOH Package 1 Output 1.5V tSK(o) tPHL1 1.5V tPLH2 VOL tPHL2 tSK(t) = tPLH2 – tPLH1 or tPHL2 – tPHL1 or tPHLy – tPHLx 5 PS8560A 09/27/04 PI49FCT20802/PI49FCT20803 1:5/1:7 2.5V Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Packaging Mechanical: 16-Pin TSSOP (L) 16 .169 .177 4.3 4.5 1 .193 .201 4.9 5.1 .004 .008 .047 max. 1.20 0.45 .018 0.75 .030 SEATING PLANE .0256 BSC 0.65 .007 .012 .002 .006 0.09 0.20 .252 BSC 6.4 0.05 0.15 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS 0.19 0.30 Packaging Mechanical: 16-Pin QSOP (Q) 16 .008 0.20 MIN. .150 .157 .008 .013 0.20 0.33 3.81 3.99 Guage Plane .010 0.254 1 Detail A .189 .197 4.80 5.00 .041 1.04 REF .015 x 45° 0.38 .008 0.203 REF .053 1.35 .069 1.75 Detail A .008 .012 0.203 0.305 .007 .010 0.178 0.254 0.41 .016 1.27 .050 SEATING PLANE .025 BSC 0.635 0˚-6˚ .016 .035 0.41 0.89 .228 .244 5.79 6.19 .004 0.101 .010 0.254 X.XX DENOTES DIMENSIONS IN MILLIMETERS X.XX 6 PS8560A 09/27/04 PI49FCT20802/PI49FCT20803 1:5/1:7 2.5V Clock Buffer for Networking Applications 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Ordering Information Ordering Code Package Code Package Description PI49FCT20802Q Q 16-pin 150-mil wide QSOP PI49FCT20802QE Q Pb-free & Green, 16-pin 150-mil wide QSOP PI49FCT20802L L 16-pin 173-mil wide TSSOP PI49FCT20802LE L Pb-free & Green, 16-pin 173-mil wide TSSOP PI49FCT20803Q Q 16-pin 150-mil wide QSOP PI49FCT20803QE Q Pb-free & Green, 16-pin 150-mil wide QSOP PI49FCT20803L L 16-pin 173-mil wide TSSOP PI49FCT20803LE L Pb-free & Green, 16-pin 173-mil wide TSSOP Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ Pericom Semiconductor Corporation • 1-800-435-2336 • http://www.pericom.com 7 PS8560A 09/27/04