Standard ICs Triple 2-channel analog multiplexer / demultiplexer BU4053BC / BU4053BCF / BU4053BCFV The BU4053BC, BU4053BCF, and BU4053BCFV are multiplexers / demultiplexers capable of selecting and combining analog signals and digital signals in a 2 ch × 3 configuration. Inhibit signals and control signals are used to turn on the switch corresponding to each of the channels. In addition, even if the logical amplitude (VDD-VSS) of the control signal is low, signals with a large amplitude (VDD-VEE) can be switched. Also, as each switch has a low ON resistance, it can be connected to a low impedance circuit. •Block diagram Y1 1 16 VDD Y0 2 15 Y Y1 Z1 Z 3 4 Z0 5 Y0 Y Z1 X Z X1 Z0 X0 INH INH 6 14 X 13 X1 12 X0 A 11 A B VEE C VEE 7 10 B VSS 8 9 •Logic circuit diagram •Truth table INH VDD (16) INH (6) A (11) B (10) C (9) LEVEL CONVERTER BINARY TO 1of 2 DECODER WITH INH VSS (8) VEE (7) X0 (12) X1 (13) Y0 (2) Y1 (1) Z0 (5) Z1 (3) C A B C ON SWITCH L L L L X0 Y0 Z0 L H L L X1 Y0 Z0 L L H L X0 Y1 Z0 L H H L X1 Y1 Z0 L L L H X0 Y0 Z1 L H L H X1 Y0 Z1 (14) X L L H H X0 Y1 Z1 (15) Y L H H H X1 Y1 Z1 H X X X NONE (4) Z X: Irrelevant 1 Standard ICs BU4053BC / BU4053BCF / BU4053BCFV •Absolute maximum ratings (Ta = 25°C) Symbol Limits Unit Power supply voltage1 Parameter VDD – 0.5 ~ + 20 V Power supply voltage2 VDD - VEE Power dissipation Pd mW Operating temperature Topr – 40 ~ + 85 °C Storage temperature Tstg – 55 ~ + 150 °C – 0.5 ~ VDD + 0.5 V Input voltage VIN characteristics •DCElectrical characteristics (unless otherwise noted, Ta = 25°C, V Parameter Symbol Input high-level voltage VIH Input low-level voltage VIL EE = VSS = 0V) Min. Typ. Max. 3.5 — — 7.0 — — Unit VDD (V) Conditions Measurement circuit 5 V 10 11.0 — — 15 — — 1.5 5 — — 3.0 — — 4.0 V 10 — Fig.1 — Fig.1 15 Input high-level current IIH — — 0.3 µA 15 VIH = 15V Fig.1 Input low-level current IIL — — – 0.3 µA 15 VIL = 0V Fig.1 — — 950 — — 250 VIN = VDD / 2 Fig.2 — — 160 — 10 — — 6 — RON resistance RON resistance deflexion OFF-channel leakage current Static current dissipation 2 V – 0.5 ~ + 20 1000 (DIP), 500 (SOP), 400 (SSOP) RON ∆RON IOFF IDD 5 Ω 10 15 5 Ω 10 — 4 — 15 — — 0.3 15 — — – 0.3 — — 5 — — 10 — — 15 µA 15 — Fig.2 — Fig.3 VI = VDD or GND — 5 µA 10 15 Standard ICs BU4053BC / BU4053BCF / BU4053BCFV Switching characteristics (unless otherwise noted, Ta = 25°C, VEE = VSS = 0V, RL = 1kΩ, CL = 50pF) Parameter Symbol Propagation delay time Switch IN➝OUT Min. Typ. Max. — 15 45 — 8 20 — 6 15 15 — 170 550 5 — 90 240 — 70 160 — 150 380 — 70 200 — 50 160 — 20 — tPLH,tPHL Propagation delay time CONT➝OUT tPHZ,tPLZ tPZH,tPZL Propagation delay time INH➝OUT tPHZ,tPLZ tPZH,tPZL Max. propagation frequency fMax. Unit VDD (V) Conditions Mesurement circuit — Fig.4 — Fig.5, 6 — Fig.5, 6 5 ns 10 ns 10 15 5 ns 10 15 MHz 5 VEE = – 5V∗1 Fig.7 Fig.7 Fig.7 Feedthrough attenuation FT — 0.5 — MHz 5 VEE = – 5V∗2 Sine wave distortion D — 0.02 — % 5 VEE = – 5V∗3 Input capacitance (control) CC — 5 — pF — — — Input capacitance (switch) CS — 10 — pF — — — ∗1 VIN = 5Vp-p sine wave, frequency that enables 20 log10 VOUT = – 3dB. VIN ∗2 VIN = 5Vp-p sine wave, frequency that enables 20 log10 VVOUT IN = – 50dB at channel off. ∗3 VIN = 5Vp-p sine wave. •Measurement circuits VDD IIN VDD A B C INH A VCONTROL IN VIN VDD COMMON OUT / IN VIN CHANNEL IN / OUT RON = RL VIN – 1 VOUT A B C INH VEE COMMON OUT / IN CHANNEL IN / OUT VEE V GND Fig. 1 Input voltage, current RL = 10kΩ VOUT VDD / 2 V RL = 10kΩ GND Fig. 2 ON resistance 3 Standard ICs BU4053BC / BU4053BCF / BU4053BCFV VDD A B C VCONTROLIN INH COMMON OUT / IN VDD or GND CHANNEL IN / OUT A GND or VDD VEE GND Fig. 3 Channel-OFF leakage current VDD VCONTROL IN A B C VDD INH Input 50% GND COMMON OUT / IN CHANNEL IN / OUT VEE RL P.G. CL Output 50% GND tPHL tPLH Fig. 4 Propagation delay time (Switch IN to OUT) VDD A B C INH P.G. VDD COMMON OUT / IN VDD Input OUT CHANNEL IN / OUT 50% GND 90% Output VEE RL 50% CL GND tPZH Fig. 5 Propagation delay time (CONT, INH to OUT) 4 tPHZ Standard ICs BU4053BC / BU4053BCF / BU4053BCFV VDD VDD A B C INH P.G. COMMON OUT / IN GND CL RL 50% Input CHANNEL IN / OUT OUT 50% VEE 10% Output GND tPZL tPLZ Fig. 6 Propagation delay time (CONT, INH to OUT) VDD VCONTROL A B C INH COMMON OUT / IN CHANNEL IN / OUT VEE RL ~ CL VEE V ~ D GND Fig. 7 Maximum propagation frequency, feedthrough, sine wave distortion •Electrical characteristic curve POWER DISSIPATION: Pd (mW) 1200 1000 DIP16 800 600 SOP16 400 SSOP-B16 200 0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta (°C) Fig. 8 Power dissipation vs. Ta 5 Standard ICs BU4053BC / BU4053BCF / BU4053BCFV •External dimensions (Units: mm) BU4053BCF BU4053BC 10.0 ± 0.2 19.4 ± 0.3 8 6.2 ± 0.3 0.51Min. 0.3 ± 0.1 0.5 ± 0.1 0.11 1.5 ± 0.1 3.2 ± 0.2 4.25 ± 0.3 7.62 2.54 9 1 8 1.27 0.4 ± 0.1 0.15 ± 0.1 1 16 4.4 ± 0.2 9 6.5 ± 0.3 16 0.3Min. 0° ~ 15° 0.15 DIP16 SOP16 BU4053BCFV 1 8 4.4 ± 0.2 9 0.65 0.15 ± 0.1 1.15 ± 0.1 0.1 6.4 ± 0.3 5.0 ± 0.2 16 0.22 ± 0.1 0.3Min. 0.1 SSOP-B16 6