CGS74B2525 1-to-8 Minimum Skew Clock Driver General Description Features This minimum skew clock driver is designed for Clock Generation and Support (CGS) applications operating well above 20 MHz (33 MHz, 50 MHz). The device guarantees minimum output skew across the outputs of a given device and also from device-to-device. Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clocking systems. The ’B2525 is a minimum skew clock driver with one input driving eight outputs specifically designed for signal generation and clock distribution applications. Y Y Y Y Y Y Y Y Y Y Logic Symbol Clock Generation and Support (CGS) DeviceÐIdeal for high frequency signal generation or clock distribution applications CGS74B version features National’s Advanced Bipolar FASTÉ LSI process 1-to-8 low skew clock distribution 600 ps pin-to-pin output skew Specifications for device-to-device variation of propagation delay Specification for transition skew to meet duty cycle requirements Center pin VCC and GND configuration to minimize high speed switching noise Current sourcing 48 mA and current sinking of 64 mA Low dynamic power consumption above 20 MHz Guaranteed 4 kV ESD protection Connection Diagram Pin Assignment for DIP and SOIC TL/F/10907 – 1 TL/F/10907 – 2 FASTÉ and TRI-STATEÉ are registered trademarks of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/10907 RRD-B30M115/Printed in U. S. A. CGS74B2525 1-to-8 Minimum Skew Clock Driver September 1995 Functional Description Truth Table Pin Description Pin Names CLK O0 – O7 Description Inputs Outputs Clock Input Outputs CLK O0 –O7 L H L H TL/F/10907 – 5 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) Input Voltage (VI) Operating Free Air Temperature Storage Temperature Range Junction Temperature (iJA) Plastic (N) Package JEDEC SOIC (M) Package Supply Voltage (VCC) 104 120 4.5V to 5.5V Input Rise and Fall Times (0.8V to 2.0V) Free Air Operating Temperature (TA) 7.0V 7.0V 0§ C to a 70§ C b 65§ C to a 150§ C 9.6 ns max 0§ C to a 70§ C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the DC and AC Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions will define the conditions for actual device operation. § C/W § C/W DC Electrical Characteristics over recommended operating conditions unless specified otherwise. All typical values are measured at VCC e 5V, TA e 25§ C. Symbol Parameter Conditions Min Typ VCC e 4.5V, II e b18 mA Max Units b 1.2 V VIK Input Clamp Voltage VIH Minimum Input High Level Voltage VIL Maximum Input Low Level Voltage VOH High Level Output Voltage IOH e b3 mA, VCC e 4.5V 2.4 IOH e b48 mA, VCC e 4.5V 2.0 VOL Low Level Output Voltage VCC e 4.5V, IOL e 64 mA II Input Current @ Max Input Voltage VCC e 5.5V, VIH e 7V IIH High Level Input Current VCC e 5.5V, VIH e 2.7V 20 mA IIL Low Level Input Current VCC e 5.5V, VIH e 0.4V b 0.5 mA IO Output Drive Current VCC e 5.5V, VO e 2.25V ICC Supply Current VCC e 5.5V CIN Input Capacitance VCC e 5V 2.0 V 0.8 V 0.35 b 50 0.5 V 0.1 mA b 150 mA Outputs High 8 15 mA Outputs Low 32 42 mA 5 3 V pF AC Electrical Characteristics Over recommended operating conditions unless specified otherwise. CGS74B2525 Symbol tPLH tPHL VCC e 4.5V to 5.5V RL e 500X, CL e 50 pF Parameter Propagation Delay CLK to On Units Min Typ Max 2 2 3.0 3.0 4.8 4.8 ns Extended AC Electrical Characteristics Over recommended operating conditions unless specified otherwise. CGS74B2525 Symbol VCC e 4.5V to 5.5V RL e 500X, CL e 50 pF, TA e 0§ C to 70§ C Parameter Min Typ Units Max fmax Maximum Operating Frequency tOSHL Maximum Skew Common Edge Output-to-Output Variation (Note 2) 150 600 ps Maximum Skew Common Edge Output-to-Output Variation (Note 2) 150 600 ps Maximum Skew Opposite Edge Output-to-Output Variation (Note 2) 0.7 1.5 ns 1.75 ns 1.5 ns 1.6 1.4 ns ns tOSLH tOST tPV tPS trise, tfall 50 MHz Maximum Skew Part-to-Part Variation Skew (Note 3) Maximum Skew Pin (Signal) Transition Variation (Note 2) 0.6 Maximum Rise/Fall Time (from 0.8V to 2.0V/2.0V to 0.8V) Note 2: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH) or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design. tOSHL and tOSLH are characterized and guaranteed by design @ 1 MHz. Note 3: Part-to-part skew is defined as the absolute value of the difference between the propagation delay for any outputs from device to device. The parameter is specified for a given set of conditions (i.e., capacitive load, VCC, temperature, Ý of outputs switching, etc.). Parameter guaranteed by design. Note 4: Load capacitance includes the test jig. 4 Timing Diagrams TL/F/10907 – 16 TL/F/10907 – 17 Test Circuit RL is 500X CL is 50 pF for all prop delays and skew measurements TL/F/10907 – 18 5 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: TL/F/10907 – 19 6 Physical Dimensions inches (millimeters) 14-Lead Small Outline Integrated Circuit NS Package Number M14A 7 CGS74B2525 1-to-8 Minimum Skew Clock Driver Physical Dimensions inches (millimeters) (Continued) 14-Lead Plastic Dual-In-Line Package NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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