'现里
EXDerts Forum
复合 PFC/PWM 新昂 CM6903/4 、 CM6805
芯片却能程圈、电骂街j险与应用电路
刘胜利
摘
深圳中电公司电力所
要:本文将分三个专题介绍新品 CM6903/4 和仅封装不同的 CM6805
关键词
CM6805
SOIC 贴片封装
CM6903/4
SIP 羊边引脚封装
CM6903/4 和 CM6905 的芯片内部电路结构设
大修改的第兰代新产品。其突出特点是:去掉了原
计完全相同，其差异之处仅在于外壳封装不同，以
ML4803 中的单脚误差放大器，取而代之的是用
适应各类用户的需要
GMV 增强跨导变化率电路(见图 l 左脚中部)，它
CM6805 是 SOIC 贴片封装
10 个引脚 IC; 而 CM6903/4 则是单侧→边 9 个引脚
立式 SIP 封装，它在印刷电路板的占地面积更小。
由黄新年主持设计的高颇开关电源 PFC 专用
把 PFC 电压环路的瞬态响应提高了 5~ 1O倍。
(请见图 1)
CM6903/4 和 CM6805 仍保留了关键的电路调
集成电路，在中小功率电源里有广泛的应用价值。
制技术 "LETE": 前沿调制 PFC 、后沿调制的 PWM
它们大体 t 可分为两类共 17 个品种:
控制技术，可尽量减小 PFC 输出直流储能电容器中
(一)、只单独输出 PFC 控制脉冲 IC (带 PWM 时
钟)者有:
1 、 CM6500/01: 外壳封装 16 脚、立插式/贴片
式(有 47% 的 PWM 时钟)
2 、 CM6503/04: 外壳封装 8 脚、立插式/贴片
式(有 50% 的 PWM 时钟)
3 、 CM656 1/2: 8 脚封装，立式/贴式，设计在
临界导通的单一 PFC
(二)、复合 PFC/PWM 两路控制脉冲输出的 IC 有:
(I)、小功率电源应用场合:几十瓦 ~300W
1, CM6805: 贴片封装、 10 个引脚(应用电路
详见前面 90W 电源内容)
2 、 CM6903/04: 立式单侧 9 引脚。前者均为
67阻缸，后者 PWM 为 134阻Iz 。
3 、 CM680~/04: 为 8 脚封装
(2)、中功率电源应用场合:几百瓦 ~1000W
(CM6800 的 UVLO=13V) CM6800/01 /24: 16 个
引脚、立式和贴片，与 ML4800 和 ML4824 兼容。
(3)、大功率电源应用场合:几千瓦范围
CM6900/0 1102: 是 20 个引脚封装，立插式/贴
片式。见另外资料。
图 1 是 CM6903/4 和 CM6805 的芯片内部电路
设计功能方框图和 IC 简化外国电路结构示意图。
的脉动电流。以及 "ICST": 输入电流整形的 PFC
技术。 IC 用于 BOOST-PFC 平均电流型控制升压式
功率因数校正器，可在连续导通 CCM 或者非连续
导通 DCM 两种状态下工作。新产品的电路和功能
改进还有如下特点:
1 、增加了 VinOK 电压比较器:见图 1 中部下
方。它能保证 PFC 到达稳态之前，仍然关断 PWM
输出脉冲。 Vin-OK 的门限电压是 2.5V 和 0.75V:
其滞后电压为1.75V (已经申报了专利)。
2 、在 PWM 系统增设了具有 10mS 数字式软起
动电路:见图中间下方。
3 、 PWM 控制电路的引脚减少到只有两个:
PWM-OUT 、 DC一一ILIMIT;
4 、增加了三种故障(过压、欠压、降压)检
测比较器:见图左侧下方 Tri-Fault Detect: 它简化
电路使之符合 ULl 950 安全标准。取消了内部齐纳
二极管。
5 、还有 VCC-OVP 电路:见图 l 左侧中部。
当 VCC>18V 或 19 .4V 时(具有1. 5V 滞后电压)，
关断 PFC 系统(已经申报专利)。
6 、不需要降压电阻器:用 RAC=500KQ 接在
IAC 脚与电网整流输出端之间，即可起动 IC 供电
VCC (早己申报专利)。
它们是对第 1 代 PFC/PWM 芯片 ML4803 又作出重
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图 1
CM6903/4 和 CM6805 内部功能方框与外电路
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7 、 CM6903/4 和 CM6805 用 IAC 脚实现自动斜
16 、热阻抗(
率补偿，提高了轻载时的信噪比，并改善高电网电
e JA);
80 oC/W
(请见图 2)
压时的 THD 。
CM6θ03/4 复合 PFCIPWM 芯片各引脚功能概
CM6903/4 可广泛用于个人电脑 PC 开关电源、
述:
交流适配器、网络服务器、 UPS 电源、显示器和彩
①脚
电、通讯电源、直流马达等。图 2 是 CM6903 的典
该脚接到原边 PWM 电流互感器或电流检测电
型应用电路。
DC一IUMIT
阻上，它为 PWM 级提供脉冲电流限制(出现在
设计 CM6903 的 PFC 和 PWM 工作频率均在
1. 5V) ，并为 PWM 级的电流控制提供峰值电流反馈
67KHz; CM6904 则让 PWM 工作频率在高两倍的
通路。电流斜坡在 IC 内部偏移1. 2V 后，再与光祸
134阻z ，它使 PWM 系统可选用更小的磁性组件，
反馈电压比较，以确定 PWM 的占空比。
而 PFC 仍维持最佳工作频率 67KHzo CM6903/4 各
②脚
引脚符号与功能简述在表 1 中。
是 IC 的供电输入引脚。 Vcc 的起动电流是 100
表 1
Vcc
μA 。空载时 V CC 电流是 2mA o Vcc 静态电流包括
符号
功能
IC 偏置电流与 PFC 和 PWM 的输出电流。给定了工
DCLuMIT
PWM 限流比较器输入
作频率和 MOSFET 栅电荷量 (Qg) ，就能计算出
2
Vcc
工作电压
PFC 和 PWM 的平均输出电流为 10盯=QgX 元。还
3
PWMOUT
PWM 驱动器输出
4
PFCOUT
PFC 驱动器输出
5
GND
接地
6
LSENSE
PFC 限流比较器的电流检测输入
7
VEAO
PFC 跨导电压误差放大器输出
8
VFB
PFC 跨导电压误差放大器输入
9
IAC
PFC 电流检测输入和起动系统
引脚
包括任何栅极驱动变换器所要求的平均磁化电流。
Vcc 电压值与 PFC 输出电压成比例。在内部它被连
接到 VccOVP 比较器C1 9 .4V) 上，为 PFC 级提供
CM6903/4 的极限工作电压、电流和温度范围:
1 、最高供电电压值
VccMAX=23V(IC 内部
BiCMOS 可驱动 IGBT)
2 、 IAC 脚电压
GND一。 .3V 到 1V (系统起动
后)
3 、 ISENSE 脚电压
GND-0.3V 到 Vcc+0.3V
5 , PWMOUT 电压
GND-0.3V 到 Vcc+0.3V
6 、 VEAO 脚电压
o 到 6.3V
7 、其它引脚电压
GND-o.3V 到 V REF+0.3V
8 、Icc 电流(平均值); 40mA (空载时 IC 电·
流 2mA)
9 、峰值 PFCOUT 电流
高质量瓷介旁路电容器、并尽量靠近 IC 。良好的旁
路滤波对 CM6903/4 的稳定工作极为重要。'
通常 Vcc 是从升压电感器的附加线圈上产生
的，其电压值和 PFC 输出电压成比例。由于 VccOVP
的最大电压是 19 .4V ，内部分流器限制 Vcc 过压在
一个合理的值上。或外接一个箱位电路(IN5250B) ，
③脚和④脚
1. 5μJ
这两个脚是大电流驱动器，能提供 ::!:0.5A 峰值
电流直接驱动功率 MOSFET 的栅极。这两种输出
在 Vcc 低于欠压锁定门限值或 REFOK 比较器输出
为低电平时，均被维持在低电位(无脉冲输出)。
⑤脚
GND
IC 的正常至关重要。因此需要采用高频率的接地技
术。详见稍后的专题实施要点。
⑥脚
0
150 C
0
-65. C 到 150 C
14 、工作温度范围
-45 C 到 85 C
ISENSE
它接到电阻器或传感 PFC 输入电流的电流互
0
13 、储藏温度范围
0
PFCOUT 和 PWMOUT
的零电位地线返回点。高质量、低阻抗的接地，对
0.5A
11 、每周期 PFC OUT 及 PWMOUT 的能量:
12 、结点温度
压为 15V 工作，而关闭电压为 10Vo Vcc 必须外接
GND 是所有与 PFC 和 PWM 电路系统均相关
0.5A
10 、峰值 PWMOUT 电流
到 UVLO 和 REFOK 电路上，使 IC 启动的 Vcc 电
但本芯片不必要的。
-5V 到 0.7V
4 、 PFCOUT 电压
冗余的高速过压保护 (OVP)o Vcc 还在内部被连接
感器上。相对于 IC 接地而言，它应该是负极性的。
0
15 、导线温度(焊接， 10 秒); 260 C
0
。
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它内接电流限制比较器和电流传感反馈信号。 IUMIT
输出电压的可调电阻器上，为 i去电压提供反馈通
关断电平是 -1 V
路，使 PFC 的输出调节在设定的数值上。
0
ISENsE 的反馈信号在内部被放大 4
倍的增益，并与内部的斜波比较，以设定 PFC 占空
⑨脚
比。升压感应器的电流与内部可调斜波的交点，决
它直接通过-前馈电阻 RAC (800KQ) 与 AC
定升压的停止时间 o 这需要在 ISENSE 和 PFC 升压
全波整流器的输出端相连接，具有两个重要的功
感应电阻之间加一个 RC 滤波器。
能， 1.系统起动前，为系统提供起动电流，这样系
⑦脚 V EAO
统就不需要另外加起动电阻了。 2. 系统起动后， RAC
该脚连接到 PFC 跨导电压误差放大器输出端，
七的电流将为系统提供自动斜波补偿，并且这个前
为放大器提供必需的反馈补偿网络。
@脚
I AC (j 分具有特色)
馈信号能在轻载或高电压输入的情况下，大大提高
V FB
系统的信噪比。
PFC 跨导电压误差放大器输入脚，它接到 PFC
表2
CM6903/4 电气特性参数(测量条件
Vcc=15V，RT=52.3KQ ， CT=470pF 。通常在室温下测)
条件
参数
符号
最小
典型
最大
单位
PFC-I UMIT 比较器
门限电压
-0.9
输出延时
150
1.1 5
300
V
ns
PWM 软启动
软启动时间
正常启动
10
ms
DC-IUMIT 比较器 (PWM)
门限电压
1.4
1. 5
150
1.6
300
62
67
74
60
0.3
2
67
0 .45
输出延时
V
ns
振荡器
初始精度
TA=25"C
电压稳定性
lOV<Vcc<15V
KHz
9毛
温度稳定件
总变化量
整个电网和温度范围内
死区时间
仅 PFC
9毛
74.5
0.65
KHz
O
%
'
μs
PFC
最小占空比
最大占 3号比
I Ac =100uA
V FB =2.55V
ISENSE=OV
IAc=OuA,V FB=2.0V,ISENSE=O
V
90
95
输出低阻抗
输出低电压
8
0.8
0 .4
8
14.2
50
I ouT: -100mA
I ouT :- lOmA，Vcc二8V
输出同阻坑
输出局电压
上升/下降时间
IoUT=100mA Vcc=15V
C L=1000pF
.
i'WM
占宅比
CM6903
CM6904
13.5
。-50
0-50
15
1.5
1.5
15
<
8
0.8
0.7
8
14.2
50
IouT : -100mA
I ouT : -lOmA, Vcc=8V
上升/下降时间
IoUT= 1OOmA ,V cc= 15V
CL=1000pF
13.5
Q
V
V
Q
V
ns
0 49.5
输出局阻坑
输出局电压
15
1.5
0.8
15
。-49.5
输出低阻抗
输出低电压
%
%
%
Q
V
V
Q
V
Ns
电源
启动电流
工作电流
Vcc=11 V,CL=O
Vcc=15V,C L=0
欠庄|羽锁门限
14.7
4.85
欠压闭锁滞后
100
2.5
15
5
150
4
15.3
5.15
uA
mA
V
V
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表3
CM6903 应用电路图中各电阻器数值清单
C55
12nF 、
16V
(4) 、低压铝电解电容器:精度 20%
(1)小功率金属膜电阻器:精度 1%
R12 R13
432KX 2
R46
100K
C17
470μF ，
R16 R17:
348KX 2
R48
10K
C18
470nF , 19V , 13.3mA, 5Q
4.6K
C24
68μF ，
R45
66. 5K
R4
158K
R65
475 Q 1. 5w
R18
255m Q 1W
(3) 热敏电阻器
RT1:
10mQ ， 0.lW，精度 20%
(4) 碳膜小功率电阻器:精度 10%
R2
560K
R8
33K 、
R3 、 R5
10KX2
R59
68Q
R35
1W
4.7 Q2WX2
R6
10 Q 、
1W
R1
100K 、
1W
(6) 小功率金属膜
表4
100 Q
R11 R28
22Q X2
R43 R44
1. OKX2
R61
604Q
只
R10:
R26
18芷、
R27
100K 、
2W
3W
17. 饵，精度 10%
CM6903 应用电路图中各电容器数值清单
368V ，陶瓷 X2
C2 、 C3:
1nF ,
C8:
100PF, 368V，瓷介
C9:
10nF ,
C10:
39μF ， 380V ，铝电解
C20:
1nF ， 456V ，陶瓷
380V ，瓷介
C2 1:
470PF ， 950V，瓷介
C23:
470PF , 456V , ......
C15
10nF ,
456V ，瓷介
C1 :
330nF 、
C5:
33nF 、
C38
1.
5nF 、
19V
C40
3.
3nF 、
19V
C6
1. 0 μF 、
C19
100nF 、
19V
C46
56nF 、
C51
390PF 、
L4
L5
203μH ，
20μH ，
8.6A , l 1. 3mQ
8A ， 11m Q
CM6903 应用电路中半导体器件规格
CM4312.5V 基准电压，
U1 :
U3:
2%
CM6903 复合 PFC!PWM
电网桥式整流器，
D4:
D5:
Boost 二极管，
368V , 1. 6A
380V , 2.54A 0.4W
GP 肖特基
D6 、 D7:
BAT85 ,
ZD1:
6.8V 齐纳二极管，
IS01:
D8 D10 D18:
H11A817C ，光祸 IC
D12 D13:
D11 D14 D20
D15 D17:
GP 肖特基工极管
GP 二极管 1N4002X 3 只
D9:
双高压二极管，
A~B
O.lW , 10%
'
局压二极管 X3 只 MUR1100 型
1N4148 ,
GPX2 只
160V , 4A , 5W
2 、 R18 (来自光电隔离器)必须把实体引脚对
接 IC 地线端脚。
3 、 C4 和 C5 电容器实体引脚，应直接焊到 R5 、
Rll 和 IC 接地脚。-
25V
25VX2
lμH ，
引脚。应使开关电流到芯片接地点的距离最短。
19V
100nF 、
3. 1A , 224m Q
L2 、 L3
撞为另一结点，再把该结点连接到芯片 IC 的地线
(3) 低压瓷介电容器:精度 20%
2nF 、
Boost 电感器， 2.4耐， 3.1A ， 449mQ ，
L1
l 、应先让 R5 和 Rll 两个电阻器的引脚对接相
16V
2.
CM6903 应用电路中电感器数值
键要点:
16V
C4
表5
高频开关电源印制板元器件实体布局连接关
(2) 低压瓷介电容器:精度 5%
C13
160V ，瓷介
表6
(1)高压电容器:精度均 20%
C11 、
10nF ,
精度 20%
R9
(5) 碳膜中功率电阻器:精度 10%
R34 、
C12
4.7 Q 2WX2
R34 、 R35
25V , 150mQ
(5) 高压电容器:精度 20%
(2) 巾功率金属膜电阻器:精度 1%
R31
19V , 362mA, 380M Q
4 、 Ql 三极管的源极脚也应直接焊到 R5 、 Rll 、
IC 地脚、和 C4 、 C5 结点上。
5 、除了 R18 之外，电路中其它元件的引脚也
16V
应只接"星状"结点，把它作为一个绝对的接点。
16V
y
China Power Supply SunJey
2004 年第 5 期(总第 42 期)(牛@J~说 t~'~
>
圄
|警咂立自
E xverts Forum
电间输入
电班植丑5
4昏-一...
IIN
1.0Aldiv
Boosl 输出
直配电压
+--20VI咀阳
100ms/div
IC Ground
ML4803
100ms/div
'c 附 \Il!.Ii.V'N=220V. c l 寸
CM6903/4
图 5 瞬态负载突变时的实测波形(在 OW 空载
图 3 高频接地技术的星状地线布局连接示意图
与
100W 加载之间通断开关) (左侧为原 ML4 803
两个波形，右侧为新 CM6903/4 两个波形)
电网输入
电同捕入
电流波形
i?;;二jjJ电?
‘1.0 div
......:.\.\‘-号，
I
j
1. 0A! div
A/
-←白?…叩牛斗 1\1)(1 民 l1Í1ù 山
:I
Boost 输川 l
j úiÆè 电压
1γ川寸
11 ←→
:i1
川 VdÎv
50ms/div
直i;í~ 电压
‘--一~
20V/div
L
ι...L...二4
100ms/div
50ms/div
CM690:3/ 1
ML4803
ML4803
图 4 瞬态响应测量波形:在 100W 负载下电网
[电网输入电川、 V川 ~220V"时)
100ms/div
CM6903/4
图 6 瞬态负载突变时的实测波形(在 OW 空载
变高从 100WV A<σ→200V AC (左侧为原 ML4803 两
与 lOOW 加载之间通断开关) (左侧为原 ML4803
个波形，右侧为新 CM6903/4 两个波形)
两个波形，右侧为新 CM6903/4 两个波形)
如果要在电源副边整流加同步整流电路，可采用图 7 电路结构和器件，有关电阻值也要作相应改动。
250V,d 2.15A
'
1、J
~
,
d一-30
.+
RYl
RY2
RY3
RY4
4 .7 M
4.7M
4.7M
.UM
F工严习。
'"
图 7
P
11
2004 年第 5 期(总第 42 期)(牛@咆侬博 'ID
China Po wer 亨咣pply Suruey
如果要在电源副边整流加同步整流电路，可采用图 7 电路结构和器件，有关电阻值也要作相应改动。
250VAc /2.15A
'
+ 19Vf4
N
z
,
m
.+
R"
寻Y2
RY3
阿Y4
4 .7 M
4.7M
4 , 7M
47M
仨与严习。
222
图 7
F
7越A
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
GENERAL DESCRIPTION
FEATURES
The CM6903/4 is a space-saving PFC-PWM controller for
!
power factor corrected, switched mode power supplies that
Patent Number #5,565,761, #5,747,977, #5,742,151,
#5,804,950, #5,798,635
offers very low start-up and operating currents. For the
!
Pin to pin compatible with FAN6903/4
power supply less than 500Watt, its input current shaping
!
Enable lowest BOM for power supply with PFC
PFC performance could be very close to CM6800 or
!
Internally synchronized PFC and PWM in one IC
ML4800 architecture.
!
Patented slew rate enhanced voltage error amplifier with
Power Factor Correction (PFC) offers the use of smaller,
!
Universal Line Input Voltage
lower cost bulk capacitors, reduces power line loading and
!
CCM boost or DCM boost with leading edge modulation
advanced input current shaping technique
stress on the switching FETs, and results in a power supply
fully compliant to IEC1000-3-2 specifications. The
PFC using Input Current Shaping Technique
!
CM6903/4 includes circuits for the implementation of a
Feedforward IAC pin to do the automatic slope
compensation
leading edge, input current shaping technique “boost” type
!
PFC and a trailing edge, PWM.
PFCOVP, PFC VCCOVP, Precision -1V PFC ILIMIT,
Tri-Fault Detect comparator to meet UL1950
The CM6903’s PFC and PWM operate at the same
!
No bleed resistor required
!
Low supply currents; start-up: 100uA typical, operating
frequency, 67kHz. The PFC frequency of the CM6904 is
current: 2mA typical.
automatically set at half that of the 134kHz PWM. This
!
Synchronized leading PFC and trailing edge modulation
higher frequency allows the user to design with smaller
PWM to reduce ripple current in the storage capacitor
PWM components while maintaining the optimum operating
between the PFC and PWM sections and to reduce
frequency for the PFC. An PFC OVP comparator shuts
switching noise in the system
down the PFC section in the event of a sudden decrease in
!
VINOK Comparator to guarantee to enable PWM when
PFC reach steady state
load. The PFC section also includes peak current limiting
for enhanced system reliability.
!
High efficiency trailing-edge current mode PWM
!
UVLO, REFOK, and brownout protection
!
Digital PWM softstart: CM6903 (10ms), CM6904 (5ms)
!
Precision PWM 1.5V current limit for current mode
operation
24 Hours Technical Support---WebSIM
Champion provides customers an online circuit simulation tool
called WebSIM. You could simply logon our website at
www.champion-micro.com for details.
!
UPS
!
Battery Charger
!
DC Motor Power Supply
!
Monitor Power Supply
!
Telecom System Power Supply
!
Distributed Power
2002/12/16 Preliminary Rev. 0.4
IAC
IPC Power Supply
VFB
!
VEAO
Internet Server Power Supply
ISENSE
!
GND
AC Adaptor
SOP-16 (S16)
Top View
PFCOUT
!
SIP-09 (Z09)
Front View
PWMOUT
Desktop PC Power Supply
VCC
!
PIN CONFIGURATION
DC ILIMIT
APPLICATIONS
1
2
3
4
5
6
7
8
9
1
PFC OUT
2
NC
16
GN D
NC
15
3
GN D
PW M O UT
14
4
I SEN SE
NC
13
5
VEAO
V CC
12
6
V FB
NC
11
7
I AC
DC I LIM IT
10
8
NC
NC
Champion Microelectronic Corporation
Page 1
9
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
PIN DESCRIPTION
Pin No.
Symbol
Description
Operating Voltage
Typ.
Max.
Min.
1
DC ILIMIT
PWM current limit comparator input
0
2
VCC
Positive supply
10
3
PWM OUT
PWM driver output
4
PFC OUT
PFC driver output
5
GND
Ground
6
ISENSE
Current sense input to the PFC current limit comparator
7
VEAO
8
VFB
PFC transconductance voltage error amplifier input
0
9
IAC
Feedforward input to do slope compensation and to start up
0
Unit
1.5
V
23
V
0
VCC
V
0
VCC
V
-5
0.7
V
0
6
V
3
V
1
V
PFC transconductance voltage error amplifier output
15
2.5
the system
BLOCK DIAGRAM
9
IAC
2
VCC
VREFOK
R1C
4K ohm
R1B
+
400K ohm
+
+
100K ohm
.
U1
R1A
-
ISENSE
6
.
.
OUT
S
.
ISENSEAMP
+
SUM
Q
4
PFCCMP
R
VREF OK
R
PFCOUT
Q
gmv
VFB
8
.
2.5V
.
RAMP
UVLO
.
+
VCC
.
.
UVLO
FAULTB
7
VEAO
VCC
VCC OVP
+
17.9V
16.4V
-
.
OSC
Tri-Fault
Detect
PFCCLKB
PFCCLKB
.
PWMCLK
.
-
PWMCLK
.
0.5V
+
PFC OVP
2.5V
-
VFB
-
0.75V
+
+
2.45V
+
2.75V
VREF OK
Q
PWMOUT
R
R
.
R
-
1.5V
10mS
.
+
S
Q
.
-
-1V
3
VIN OK
+
.
PFC ILIMIT
.
PWM CLK
1V
.
PWMCMP
CM6903
fpfc= 67KHz
fpwm=67KHz
.
SS
1
DCILIMIT
2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
CM6904
fpfc= 67KHz
fpwm=134KHz
5
GND
Page 2
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
ORDERING INFORMATION
Part Number
Temperature Range
CM6903IZ
-40℃ to 125℃
Package
9-Pin SIP (Z09)
CM6903IS
-40℃ to 125℃
16-Pin SOP (S16)
CM6904IZ
-40℃ to 125℃
9-Pin SIP (Z09)
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum ratings are those values beyond which the device could be permanently damaged.
Parameter
VCC MAX
IAC (after start up)
ISENSE Voltage
PFC OUT
PWM OUT
VEAO
Voltage on Any Other Pin
ICC Current (Average)
Peak PFC OUT Current, Source or Sink
Peak PWM OUT Current, Source or Sink
PFC OUT, PWM OUT Energy Per Cycle
Junction Temperature
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Thermal Resistance (θJA)
Min.
GND-0.3
-5
GND – 0.3
GND – 0.3
0
GND – 0.3
-65
-40
ELECTRICAL CHARACTERISTICS
Max.
23
1.0
0.7
VCC + 0.3
VCC + 0.3
6.3
VREF + 0.3
40
0.5
0.5
1.5
150
150
125
260
80
Units
V
V
V
V
V
V
V
mA
A
A
µJ
℃
℃
℃
℃
℃/W
Unless otherwise stated, these specifications apply Vcc=+15V,
TA=Operating Temperature Range (Note 1)
Symbol
Parameter
Test Conditions
CM6903/4
Min.
Typ.
Max.
Unit
Voltage Error Amplifier (gmv)
Input Voltage Range
Transconductance
0
VNONINV = VINV, VEAO = 3.75V
Feedback Reference Voltage
Input Bias Current
30
65
90
µmho
2.5
2.55
V
-0.5
-1.0
µA
5.8
Output Low Voltage
Sink Current
V
2.45
Note 2
Output High Voltage
5
6.0
0.1
V
0.4
V
VFB = 3V, VEAO = 6V
-20
-35
µA
VFB = 1.5V, VEAO = 1.5V
30
40
µA
50
60
dB
50
60
dB
850
1000
1150
Ohm
Threshold Voltage
17.4
17.9
18.4
V
Hysteresis
1.4
1.5
1.65
V
Source Current
Open Loop Gain
Power Supply Rejection Ratio
11V < VCC < 16.5V
IAC
Input Impedance
ISENSE = 0V
VCC OVP Comparator
2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
Page 3
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
ELECTRICAL CHARACTERISTICS (Conti.) Unless otherwise stated, these specifications apply
Vcc=+15V, RT = 52.3kΩ, CT = 470pF, TA=Operating Temperature Range (Note 1)
Symbol
Parameter
Test Conditions
CM6903/4
Unit
Min.
Typ.
Max.
2.70
2.77
2.85
V
290
mV
-1
-1.15
V
150
300
ns
2.35
2.45
2.55
V
1.65
1.75
1.85
V
PFC OVP Comparator
Threshold Voltage
Hysteresis
230
PFC ILIMIT Comparator
Threshold Voltage
-0.9
Delay to Output
VIN OK Comparator
Threshold Voltage
Hysteresis
PWM Digital Soft Start
Digital Soft Start Timer (Note 2)
Right After Start Up (CM6903)
10
ms
Right After Start Up (CM6904)
5
ms
DC ILIMIT Comparator
Threshold Voltage
1.4
1.5
1.6
V
150
300
ns
2.75
2.85
V
2
4
ms
0.4
0.5
0.6
V
62
67
74
kHz
Delay to Output (Note 2)
Tri-Fault Detect Comparator
Fault Detect HIGH
Time to Fault Detect HIGH
2.65
VFB=VFAULT DETECT LOW to VFB = OPEN,
470pF from VFB to GND
Fault Detect LOW
Oscillator
Initial Accuracy
TA = 25℃
Voltage Stability
10V < VCC < 15V
Temperature Stability
Total Variation
Line, Temp
PFC Dead Time (Note 2)
1
%
2
%
60
67
74.5
kHz
0.3
0.45
0.65
µs
0
%
PFC
Minimum Duty Cycle
IAC=100uA,VFB=2.55V, ISENSE = 0V
Maximum Duty Cycle
IAC=0uA,VFB=2.0V, ISENSE = 0V
90
Output Low Impedance
Output Low Voltage
Rise/Fall Time (Note 2)
2002/12/16 Preliminary Rev. 0.4
%
8
15
ohm
IOUT = -100mA
0.8
1.5
V
IOUT = -10mA, VCC = 8V
0.4
0.8
V
8
15
ohm
Output High Impendence
Output High Voltage
95
IOUT = 100mA, VCC = 15V
13.5
CL = 1000pF
Champion Microelectronic Corporation
14.2
V
50
ns
Page 4
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
ELECTRICAL CHARACTERISTICS (Conti.) Unless otherwise stated, these specifications apply
Vcc=+15V, RT = 52.3kΩ, CT = 470pF, TA=Operating Temperature Range (Note 1)
Symbol
Parameter
CM6903/4
Test Conditions
Min.
Typ.
Max.
Unit
PWM
Duty Cycle Range
CM6903
0-49.5
0-50
%
CM6904
0-49.5
0-50
%
8
15
ohm
IOUT = -100mA
0.8
1.5
V
IOUT = -10mA, VCC = 8V
0.7
1.5
V
8
15
ohm
Output Low Impedance
Output Low Voltage
Output High Impendence
Output High Voltage
IOUT = 100mA, VCC = 15V
Rise/Fall Time (Note 2)
13.5
CL = 1000pF
14.2
V
50
ns
Supply
Start-Up Current
VCC = 11V, CL = 0
100
150
uA
Operating Current
VCC = 15V, CL = 0
2.5
4.0
mA
Undervoltage Lockout Threshold
14.7
15
15.3
V
Undervoltage Lockout Hysteresis
4.85
5
5.15
V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: Guaranteed by design, not 100% production test.
TYPICAL PERFORMANCE CHARACTERISTIC
127
Transconductance (umho)
120
113
106
99
92
85
78
71
64
57
2
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
3
VFB (V)
Voltage Error Amplifier (gmv) Transconductance
2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
Page 5
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
Functional Description
The CM6903/4 consists of an ICST (Input Current Shaping
Technique), CCM (Continuous Conduction Mode) or DCM
(Discontinuous Conduction Mode) boost PFC (Power
Factor Correction) front end and a synchronized PWM
(Pulse Width Modulator) back end. The CM6903/4 is pin to
pin compatible with FAN6903/4 (9 pin SIP package), which
is the second generation of the ML4803 with 8 pin package.
It is distinguished from earlier combo controllers by its low
count, innovative input current shaping technique, and very
low start-up and operating currents. The PWM section is
dedicated to peak current mode operation. It uses
conventional trailing-edge modulation, while the PFC uses
leading-edge modulation. This patented Leading
Edge/Trailing Edge (LETE) modulation technique helps to
minimize ripple current in the PFC DC buss capacitor.
The main improvements from ML4803 are:
1.) Remove the one pin error amplifier and add back
the slew rate enhancement gmv, which is using
voltage input instead of current input. This
transconductance amplifier will increase the
transient response 5 to 10 times from the
conventional OP
2.) VFB PFC OVP comparator
3.) Tri-fault Detect for UL1950 compliance and
enhanced safety
4.) A feedforward signal from IAC pin is added to do
the automatic slope compensation. This
increases the signal to noise ratio during the light
load; therefore, THD is improved at light load and
high input line voltage.
5.) CM6903 does not require the bleed resistor and
it uses the less than 500k ohm resistor between
IAC pin and rectified line voltage to feed the
initial current before the chip wakes up.
6.) VINOK comparator is added to guaranteed PWM
cannot turn on until VFB reaches 2.5V in which PFC
boost output is about steady state, typical 380V.
7.) A 10mS digital PWM soft start circuit is added
8.) 9 pin SIP package
9.) No internal Zener but with VCCOVP comparator
Detailed Pin Descriptions
DCILIMIT (Pin 1)
This pin is tied to the primary side PWM current sense
resistor or transformer. It provides the internal pulse-by-pulse
current limit for the PWM stage (which occurs at 1.5V) and
the peak current mode feedback path for the current mode
control of the PWM stage. Besides current information, the
optocouple also goes into DCILIMIT pin. Therefore, it is the
SUM Amplifier input.
VCC (Pin 2)
VCC is the power input connection to the IC. The VCC
start-up current is 100uA. The no-load ICC current is 2mA.
VCC quiescent current will include both the IC biasing
currents and the PFC and PWM output currents. Given the
operating frequency and the MOSFET gate charge (Qg),
average PFC and PWM output currents can be calculated as
IOUT = Qg x F. The average magnetizing current required for
any gate drive transformers must also be included. The VCC
pin is also assumed to be proportional to the PFC output
voltage. Internally it is tied to the VCC OVP comparator
(17.9V) providing redundant high-speed over-voltage
protection (OVP) of the PFC stage. VCC also ties internally
to the UVLO circuitry and VREFOK comparator, enabling the
IC at 15V and disabling it at 10V. VCC must be bypassed
with a high quality ceramic bypass capacitor placed as close
as possible to the IC. Good bypassing is critical to the proper
operation of the CM6903/4.
VCC is typically produced by an additional winding off the
boost inductor or PFC Choke, providing a voltage that is
proportional to the PFC output voltage. Since the VCC OVP
max voltage is 17.9V, an internal shunt limits VCC
overvoltage to an acceptable value. An external clamp, such
as shown in Figure 1, is desirable but not necessary.
VCC
The CM6903 operates both PFC and PWM sections at
67kHz, while the CM6904 operates the PWM section at
twice the frequency (134kHz) of the PFC. This allows the
use of smaller PWM magnetic and output filter components,
while minimizing switching losses in the PFC stage.
Several protection features have been built into the
CM6903/4. These include soft-start, redundant PFC
overvoltage protection, Tri-Fault Detect, VINOK, peak
current limiting, duty cycle limiting, under-voltage lockout,
reference ok comparator and VCCOVP.
1N 5250B
GND
Fig ure 1. O ptional V C C C lam p
This limits the maximum VCC that can be applied to the IC
while allowing a VCC which is high enough to trip the VCC
OVP. An RC filter at VCC is required between boost trap
winding and VCC.
2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
Page 6
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
PFC OUT (Pin 4) and PWM OUT (Pin3)
PFC OUT and PWM OUT are the high-current power driver
capable of directly driving the gate of a power MOSFET
with peak currents up to -1A and +0.5A. Both outputs are
actively held low when VCC is below the UVLO threshold
level which is 15V or VREFOK comparator is low.
GND (Pin 5)
GND is the return point for all circuits associated with this
part. Note: a high-quality, low impedance ground is critical
to the proper operation of the IC. High frequency grounding
techniques should be used.
ISENSE (Pin 6)
This pin ties to a resistor which senses the PFC input
current. This signal should be negative with respect to the
IC ground. It internally feeds the pulse-by-pulse current limit
comparator and the current sense feedback signal. The
ILIMIT trip level is –1V. The ISENSE feedback is internally
multiplied by a gain of four and compared against the
internal programmed ramp to set the PFC duty cycle. The
intersection of the boost inductor current downslope with
the internal programming ramp determines the boost
off-time.
It requires a RC filter between ISENSE and PFC boost
sensing resistor.
VEAO (Pin 7)
This is the PFC slew rate enhanced transconductance
amplifier output which needs to connected with a
compensation network.
VFB (Pin 8)
Besides this is the PFC slew rate enhanced
transconductance input, it also tie to a couple of protection
comparators, PFCOVP, and Tri-Fault Detect
IAC (pin 9)
Typically, it has a feedforward resistor, RAC, 100K~200K
ohm resistor connected between this pin and rectified line
input voltage.
This pin serves 2 purposes:
1.) During the startup condition, it supplies the startup
current; therefore, the system does not requires
additional bleed resistor to start up the chip.
2.) The current of RAC will program the automatic
slope compensation for the system. This
feedforward signal can increase the signal to noise
ratio for the light load condition or the high input
line voltage condition.
Power Factor Correction
Power factor correction makes a nonlinear load look like a
resistive load to the AC line. For a resistor, the current
drawn from the line is in phase with and proportional to the
line voltage, so the power factor is unity (one). A common
class of nonlinear load is the input of most power supplies,
which use a bridge rectifier and capacitive input filter fed
from the line. The peak-charging effect, which occurs on
2002/12/16 Preliminary Rev. 0.4
the input filter capacitor in these supplies, causes brief
high-amplitude pulses of current to flow from the power line,
rather than a sinusoidal current in phase with the line
voltage. Such supplies present a power factor to the line of
less than one (i.e. they cause significant current harmonics of
the power line frequency to appear at their input). If the input
current drawn by such a supply (or any other nonlinear load)
can be made to follow the input voltage in instantaneous
amplitude, it will appear resistive to the AC line and a unity
power factor will be achieved.
To hold the input current draw of a device drawing power
from the AC line in phase with and proportional to the input
voltage, a way must be found to prevent that device from
loading the line except in proportion to the instantaneous line
voltage. The PFC section of the CM6903/4 uses a
boost-mode DC-DC converter to accomplish this. The input
to the converter is the full wave rectified AC line voltage. No
bulk filtering is applied following the bridge rectifier, so the
input voltage to the boost converter ranges (at twice line
frequency) from zero volts to the peak value of the AC input
and back to zero.
By forcing the boost converter to meet two simultaneous
conditions, it is possible to ensure that the current draws
from the power line matches the instantaneous line voltage.
One of these conditions is that the output voltage of the
boost converter must be set higher than the peak value of
the line voltage. A commonly used value is 385VFB, to allow
for a high line of 270VACrms. The other condition is that the
current that the converter is allowed to draw from the line at
any given instant must be proportional to the line voltage.
PFC Control: Leading Edge Modulation with Input
Current Shaping Technique
(I.C.S.T.)
The only differences between the conventional PFC control
topology and I.C.S.T. is:
the current loop of the conventional control method is a close
loop method and it requires a detail understanding about the
system loop gain to design. With I.C.S.T., since the current
loop is an open loop, it is very straightforward to implement it.
The end result of the any PFC system, the power supply is
like a pure resistor at low frequency. Therefore, current is in
phase with voltage.
In the conventional control, it forces the input current to
follow the input voltage. In CM6903, the chip thinks if a boost
converter needs to behave like a low frequency resistor, what
the duty cycle should be.
The following equations is CM6903 try to achieve:
Re =
Vin
I in
I l = I in
Champion Microelectronic Corporation
(1)
(2)
Page 7
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
Equation 2 means: average boost inductor current equals
to input current.
∴Vin × I l ≈ Vout × I d
(3)
Id × d ' =
Therefore, input instantaneous power is about to equal to
the output instantaneous power.
∴ Id = d
For steady state and for the each phase angle, boost
converter DC equation at continuous conduction mode is:
∴ Id =
Vout
Vin
= 1
(4)
(1 − d )
Rearrange above equations, (1), (2),(3), and (4) in term of
Vout and d, boost converter duty cycle and we can get
average boost diode current equation (5):
2
I d = (1 − d ) × Vout
Re
(5)
Also, the average diode current can be expressed as:
Id =
1
Tsw
∫
Toff
0
I d (t ) ⋅ dt
(6)
If the value of the boost inductor is large enough, we can
assume
I d (t ) ~ I d . It means during each cycle or we
can say during the sampling, the diode current is a
constant.
Therefore, equation (6) becomes:
Id =
I d × toff
Tsw
= I d × d ' = I d × (1 − d )
(7)
'
( d ' ) 2 × Vout
× Vout
Re
Re
(8)
Vout toff
×
Re Tsw
From this simple equation (8), we implement the PFC control
section of the CM6903.
Leading/Trailing Modulation
Conventional Pulse Width Modulation (PWM) techniques
employ trailing edge modulation in which the switch will turn
ON right after the trailing edge of the system clock. The error
amplifier output is then compared with the modulating ramp.
When the modulating ramp reaches the level of the error
amplifier output voltage, the switch will be turned OFF. When
the switch is ON, the inductor current will ramp up. The
effective duty cycle of the trailing edge modulation is
determined during the ON time of the switch. Figure 2 shows
a typical trailing edge control scheme.
In case of leading edge modulation, the switch is turned OFF
right at the leading edge of the system clock. When the
modulating ramp reaches the level of the error amplifier
output voltage, the switch will be turned ON. The effective
duty-cycle of the leading edge modulation is determined
during OFF time of the switch. Figure 3 shows a leading
edge control scheme.
Combine equation (7) and equation (5), and we get:
2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
Page 8
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
One of the advantages of this control technique is that it
required only one system clock. Switch 1(SW1) turns OFF
and switch 2 (SW2) turns ON at the same instant to
minimize the momentary “no-load” period, thus lowering
ripple voltage generated by the switching action. With such
synchronized switching, the ripple voltage of the first stage
is reduced. Calculation and evaluation have shown that the
120Hz component of the PFC’s output ripple voltage can be
reduced by as much as 30% using this method,
substantially reducing dissipation in the high-voltage PFC
capacitor.
Typical Applications
PFC Section:
PFC Voltage Loop Error Amp, VEAO
The ML4803 utilizes an one pin voltage error amplifier in
the PFC section (VEAO). In the CM6903/4, it is using the
slew rate enhanced transconductance amplifier, which is
the same as error amplifier in the CM6800. The unique
transconductance profile can speed up the conventional
transient response by 10 times. The internal reference of
the VEAO is 2.5V. The input of the VEAO is VFB pin.
PFC Voltage Loop Compensation
The voltage-loop bandwidth must be set to less than 120Hz
to limit the amount of line current harmonic distortion. A
typical crossover frequency is 30Hz.
The Voltage Loop Gain (S)
∆VOUT ∆VFB ∆VEAO
*
*
∆VEAO ∆VOUT ∆VFB
PIN * 2.5V
≈
* GMV * ZCV
2
VOUTDC * ∆VEAO * S * CDC
=
2002/12/16 Preliminary Rev. 0.4
ZCV: Compensation Net Work for the Voltage Loop
GMv: Transconductance of VEAO
PIN: Average PFC Input Power
VOUTDC: PFC Boost Output Voltage; typical designed value is
380V.
CDC: PFC Boost Output Capacitor
∆VEAO: This is the necessary change of the VEAO to deliver
the designed average input power. The average value is
6V-3V=3V since when the input line voltage increases, the
delta VEAO will be reduced to deliver the same to the output.
To over compensate, we choose the delta VEAO is 3V.
Internal Voltage Ramp
The internal ramp current source is programmed by way of
VEAO pin voltage. When VEAO increases the ramp current
source is also increase. This current source is used to
develop the internal ramp by charging the internal 30pF +12/
-10% capacitor. The frequency of the internal programming
ramp is set internally to 67kHz.
Design PFC ISENSE Filtering
ISENSE Filter, the RC filter between Rs and ISENSE:
There are 2 purposes to add a filter at ISENSE pin:
1.) Protection: During start up or inrush current
conditions, it will have a large voltage cross Rs,
which is the sensing resistor of the PFC boost
converter. It requires the ISENSE Filter to attenuate
the energy.
2.) Reduce L, the Boost Inductor: The ISENSE Filter
also can reduce the Boost Inductor value since the
ISENSE Filter behaves like an integrator before
going ISENSE which is the input of the current error
amplifier, IEAO.
Champion Microelectronic Corporation
Page 9
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
The ISENSE Filter is a RC filter. The resistor value of the
ISENSE Filter is between 100 ohm and 50 ohm. By selecting
RFILTER equal to 50 ohm will keep the offset of the IEAO less
than 5mV. Usually, we design the pole of ISENSE Filter at
fpfc/6, one sixth of the PFC switching frequency. Therefore,
the boost inductor can be reduced 6 times without
disturbing the stability. Therefore, the capacitor of the ISENSE
Filter, CFILTER, will be around 283nF.
IAC, RAC, Automatic Slope Compensation, DCM at high line
and light load, and Startup current
There are 4 purposes for IAC pin:
1.) For the leading edge modulation, when the duty
cycle is less than 50%, it requires the similar slope
compensation, as the duty cycle of the trailing
edge modulation is greater than 50%. In the
CM6903/4, it is a relatively easy thing to design.
Use an less than 500K ohm resistor, RAC to
connect IAC pin and the rectified line voltage. It
will do the automatic slope compensation. If the
input boost inductor is too small, the RAC may
need to be reduced more.
2.) During the startup period, Rac also provides the
initial startup current, 100uA;therefore, the bleed
resistor is not needed.
3.) Since IAC pin with RAC behaves as a feedforward
signal, it also enhances the signal to noise ratio
and the THD of the input current.
4.) It also will try to keep the maximum input power to
be constant. However, the maximum input power
will still go up when the input line voltage goes up.
Start Up of the system, UVLO, and VREFOK
During the Start-up period, RAC resistor will provide the start
up current~100uA from the rectified line voltage to IAC pin.
Inside of CM6903/4 during the start-up period, IAC is
connected to VCC until the VCC reaches UVLO voltage
which is 15V and internal reference voltage is stable, it will
disconnect itself from VCC.
PFC section wakes up after Start up period
After Start up period, PFC section will softly start since
VEAO is zero before the start-up period. Since VEAO is a
slew rate enhanced transconductance amplifier (see figure
3), VEAO has a high impedance output like a current
source and it will slowly charge the compensation net work
which needs to be designed by using the voltage loop gain
equation.
Before PFC boost output reaches its design voltage, it is
around 380V and VFB reaches 2.5V, PWM section is off.
2002/12/16 Preliminary Rev. 0.4
PWM section wakes up after PFC reaches steady state
PWM section is off all the time before PFC VFB reaches
2.45V. Then internal 10mS digital PWM soft start circuit
slowly ramps up the soft-start voltage.
PFC OVP Comparator
PFC OVP Comparator sense VFB pin which is the same the
voltage loop input. The good thing is the compensation
network is connected to VEAO. The PFC OVP function is a
relative fast OVP. It is not like the conventional error amplifier
which is an operational amplifier and it requires a local
feedback and it make the OVP action becomes very slow.
The threshold of the PFC OVP is 2.5V+10% =2.75V with
250mV hysteresis.
Tri-Fault Detect Comparator
To improve power supply reliability, reduce system
component count, and simplify compliance to UL1950 safety
standards, the CM6903/4 includes Tri-Fault Detect. This
feature monitors VFB (Pin 8) for certain PFC fault conditions.
In case of a feedback path failure, the output of the PFC
could go out of safe operating limits. With such a failure, VFB
will go outside of its normal operating area. Should VFB go
too low, too high, or open, Tri-Fault Detect senses the error
and terminates the PFC output drive.
Tri-Fault detect is an entirely internal circuit. It requires no
external components to serve its protective function.
VCC OVP and generate VCC
For the CM6903/4 system, if VCC is generated from a source
that is proportional to the PFC output voltage and once that
source reaches 17.9V, PFCOUT, PFC driver will be off.
The VCC OVP resets once the VCC discharges below
16.4V, PFC output driver is enabled. It serves as redundant
PFC OVP function.
Typically, there is a bootstrap winding off the boost inductor.
The VCC OVP comparator senses when this voltage
exceeds 17.9V, and terminates the PFC output drive. Once
the VCC rail has decreased to below 16.4V the PFC output
drive be enabled. Given that 16V on VCC corresponds to
380V on the PFC output, 17.9V on VCC corresponds to an
OVP level of 460V.
It is a necessary to put RC filter between bootstrap winding
and VCC. For VCC=15V, it is sufficient to drive either a
power MOSFET or a IGBT.
Champion Microelectronic Corporation
Page 10
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
UVLO
The UVLO threshold is 15V providing 5V hysteresis.
Therefore, DCILIMIT actually is a summing node from
voltage information which is from photo couple and CM431
and current information which is from one end of PWM
sensing resistor and the signal goes through a single pole,
RC filter then enter the DCILIMIT pin.
PFCOUT and PWMOUT
Both PFCOUT and PWMOUT are CMOS drivers. They both
have adaptive anti-shoot through to reduce the switching
loss. Its pull-up is a 30ohm PMOS driver and its pull-down
is a 15ohm NMOS driver. It can source 0.5A and sink 1A if
the VCC is above 15V.
PWM Section
After 10mS digital soft start, CM6903/4’s PWM is operating
as a typical current mode. It requires a secondary
feedback, typically, it is configured with CM431, and photo
couple.
Since PWM Section is different from CM6800 family, it
needs the emitter of the photo couple to connected with
DCILIMIT instead of the collector. The PWM current
information also goes into DCILIMIT. Usually, the PWM
current information requires a RC filter before goes into the
DCILIMIT.
2002/12/16 Preliminary Rev. 0.4
This RC filter at DCILMIT also serves several functions:
1.) It protects IC.
2.) It provides level shift for voltage information.
3.) It filters the switching noise from current information.
The pole location of the RC filter should be greater than one
sixth of the PWM switching frequency which is 67Khz for
CM6903 and which is 134Khz for CM6904. Since the typical
photo couple should be biased around 1mA, the resistor of
the RC filter should be around 1.5V/1mA~1.5K ohm and we
suggest R is 1K ohm. Therefore, for CM6903, C should be
around 14nF and for CM6904, C should be around 1.2nF.
The maximum input voltage of the DCILIMIT pin is 1.5V.
Component Reduction
Components associated with the VRMS and IEAO pins of a
typical PFC controller such as the CM6800 have been
eliminated. The PFC power limit and bandwidth does vary
with line voltage. Double the power can be delivered from a
220V AC line versus a 110V AC line. Since this is a
combination PFC/PWM, the power to the load is limited by
the PWM stage.
Champion Microelectronic Corporation
Page 11
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
APPLICATION CIRCUIT (CM6903/4)
VOUT
D1
R13
L1
R8
R7
Z1
AC IN
C9
C4
R5
L2
D13
R2
R20
D7
T2
R17
C21
U2
C17
C19
R12
RAC
F1
D12
Q2
C10
D2
C1
R9
R14
T1
D5
R16
C18
SR1
R15
C5
Q1
VCC_CIRCLE
Q3
R10
R4
C16
D6
R22
D10
D3
R3
R19
D8
Q4
D11
R11
D9
C13
C14
C11
T1
C15
C7
C8
D14
R23
9
IAC
2
VCC
VREFOK
R1C
4K ohm
R1B
RFIlter
100K ohm
.
400K ohm
+
+
6
D15
+
U1
R1A
-
ISENSE
.
.
OUT
-
CFilter
S
.
ISENSEAMP
PFCCMP
R
VREF OK
R
D8
.
2.5V
.
RAMP
UVLO
.
+
VCC
7
.
.
UVLO
FAULTB
VEAO
VCC OVP
VCC
+
17.9V
.
-
16.4V
R21
PFCOUT
Q
gmv
VFB
8
C8
Q
4
+
SUM
D16
C9
OSC
Tri-Fault
Detect
PFCCLKB
PFCCLKB
.
PWMCLK
.
-
PWMCLK
.
0.5V
3
VIN OK
+
PFC OVP
2.5V
+
2.75V
VFB
-
1.5V
+
+
S
.
VREF OK
Q
PWMOUT
R
R
R
Q
.
-
2.5V
1.5V
.
10mS
.
-1V
+
PWMCMP
.
PFC ILIMIT
.
D10
+
.
CM6903
fpfc= 67KHz
fpwm=67KHz
SS
PWM CLK
1V
1
DCILIMIT
2002/12/16 Preliminary Rev. 0.4
CM6904
fpfc= 67KHz
fpwm=134KHz
5
GND
Champion Microelectronic Corporation
Page 12
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
PACKAGE DIMENSION
9-PIN SIP (Z09)
16-PIN SOP (S16)
PIN 1 ID
θ
θ
2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
Page 13
CM6903/4
Low Pin Count PFC/PWM CONTROLLER COMBO
IMPORTANT NOTICE
Champion Microelectronic Corporation (CMC) reserves the right to make changes to its products or to discontinue any integrated
circuit product or service without notice, and advises its customers to obtain the latest version of relevant information to verify,
before placing orders, that the information being relied on is current.
A few applications using integrated circuit products may involve potential risks of death, personal injury, or severe property or
environmental damage.
CMC integrated circuit products are not designed, intended, authorized, or warranted to be suitable for
use in life-support applications, devices or systems or other critical applications.
understood to be fully at the risk of the customer.
Use of CMC products in such applications is
In order to minimize risks associated with the customer’s applications, the
customer should provide adequate design and operating safeguards.
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5F, No. 11, Park Avenue II,
Science-Based Industrial Park,
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T E L : +886-2-8692 1591
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2002/12/16 Preliminary Rev. 0.4
Champion Microelectronic Corporation
Page 14