ETC IDT74FCT162952CTPV

IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
16-BIT REGISTERED
TRANSCEIVER
FEATURES:
•
•
•
•
•
•
•
•
•
•
IDT74FCT162952AT/CT/ET
DESCRIPTION:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤ 1µA (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Balanced Output Drivers (±24mA)
Reduced system switching noise
Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,
TA = 25°C
Power off disable outputs permit “live insertion”
Available in SSOP and TSSOP packages
The FCT162952T 16-bit registered transceiver is built using advanced dual
metal CMOS technology. These high-speed, low-power devices are organized
as two independent 8-bit D-type registered transceivers with separate input and
output control for independent control of data flow in either direction. For example,
the A-to-B Enable (xCEAB) must be low to enter data from the A port. xCLKAB
controls the clocking function. When xCLKAB toggles from low-to-high the data
present on the A port will be clocked into the register. xOEAB performs the output
enable function on the B port. Data flow from the B port to A port is similar but
requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is
achieved by tying the control pins of the independent transceivers together.
The FCT162952T have balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall
times–reducing the need for external series terminating resistors. The
FCT162952T is a plug-in replacement for the FCT16952T and ABT16952 for
on-board bus interface applications.
FUNCTIONAL BLOCK DIAGRAM
54
31
2 CEBA
1 CEBA
30
55
2 CLKBA
1 CLKBA
28
1
2 OEAB
1 OEAB
26
3
2 CEAB
1 CEAB
2
27
2 CLKAB
1 CLKAB
29
56
2 OEBA
1 OEBA
C
CE
5
1A 1
D
15
2A 1
52
1B 1
C
CE
D
42
2B 1
C
CE
D
C
CE
D
TO SEVEN OTHE R CH ANN ELS
TO SEVE N OTHER CHANN ELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
MAY 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-5443/3
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
Description
Max
Unit
1OEAB
1
56
1OEBA
VTERM(2)
Terminal Voltage with Respect to GND
–0.5 to 7
V
1CLKAB
2
55
1CLKBA
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
1CEAB
3
54
1CEBA
TSTG
Storage Temperature
–65 to +150
°C
GND
4
53
GND
IOUT
DC Output Current
–60 to +120
mA
1A 1
5
52
1B1
1A 2
6
51
1B2
VCC
7
50
VCC
1A 3
8
49
1B3
1A 4
9
48
1B4
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
1A 5
10
47
1B5
GND
11
46
GND
1A 6
12
45
1B6
1A 7
13
44
1B7
Symbol
Conditions
Typ.
Max.
1A 8
14
43
1B8
CIN
Input Capacitance
VIN = 0V
3.5
6
pF
2A 1
15
42
2B1
COUT
Output Capacitance
VOUT = 0V
3.5
8
pF
2A 2
16
41
2B2
2A 3
17
40
2B3
GND
18
39
GND
2A 4
19
38
2B4
2A 5
20
37
2B5
2A 6
21
36
2B6
VCC
22
35
VCC
2A 7
23
34
2B7
2A 8
24
33
2B8
GND
25
32
GND
2CEAB
26
31
2CEBA
2CLKAB
27
30
2CLKBA
2OEAB
28
29
2OEBA
CAPACITANCE (TA = +25°C, f = 1.0MHz)
FUNCTION TABLE(1, 3)
xCEAB
H
X
L
L
X
Description
A-to-B Output Enable Input (Active LOW)
xOEBA
B-to-A Output Enable Input (Active LOW)
xCEAB
A-to-B Clock Enable Input (Active LOW)
xCEBA
B-to-A Clock Enable Input (Active LOW)
xCLKAB
A-to-B Clock Input
xCLKBA
B-to-A Clock Input
xAx
A-to-B Data Inputs or B-to-A 3-State Outputs(1)
xBx
B-to-A Data Inputs or A-to-B 3-State Outputs(1)
Inputs
xCLKAB
xOEAB
X
L
L
L
↑
L
↑
L
X
H
xAx
X
X
L
H
X
Outputs
xBx
B(2)
B(2)
L
H
Z
NOTE:
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA,
and xOEBA.
2. Level of B before the indicated steady-state input conditions were established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH Transition
Z = High-Impedance
PIN DESCRIPTION
xOEAB
Unit
NOTE:
1. This parameter is measured at characterization but not tested.
SSOP/ TSSOP
TOP VIEW
Pin Names
Parameter(1)
2
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current (Input pins)(4)
VCC = Max.
—
—
±1
µA
—
—
±1
VI = VCC
Input HIGH Current (I/O pins)(4)
IIL
Input LOW Current (Input pins)(4)
VI = GND
—
—
±1
—
—
±1
VO = 2.7V
—
—
±1
VO = 0.5V
—
—
±1
Input LOW Current (I/O pins)(4)
IOZH
High Impedance Output Current
IOZL
(3-State Output pins)(4)
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
IOS
Short Circuit Current
VCC = Max., VO = GND(3)
–80
–140
–250
mA
VH
Input Hysteresis
—
100
—
mV
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
—
5
500
µA
VCC = Max.
—
VCC = Max.
VIN = GND or VCC
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
IODL
IODH
VOH
VOL
Parameter
Output LOW Current
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Test Conditions(1)
VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3)
VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3)
VCC = Min.
IOH = –24mA
VIN = VIH or VIL
VCC = Min.
IOL = 24mA
VIN = VIH or VIL
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This test limit for this parameter is ±5µA at TA = –55°C.
3
Min.
60
–60
2.4
Typ.(2)
115
–115
3.3
Max.
200
–200
—
Unit
mA
mA
V
—
0.3
0.55
V
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆ICC
ICCD
Parameter
Quiescent Power Supply
Current TTL Inputs HIGH
Dynamic Power Supply Current(4)
IC
Total Power Supply Current(6)
Test Conditions(1)
VCC = Max.
VIN = 3.4V(3)
VCC = Max.
Outputs Open
xOEAB or xOEBA = GND
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz (xCLKAB)
50% Duty Cycle
xOEAB = xCEAB = GND
xOEBA = VCC
One Bit Toggling
fi = 5MHz
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz (xCLKAB)
50% Duty Cycle
xOEAB = xCEAB = GND
xOEBA = VCC
Sixteen Bits Toggling
fi = 2.5MHz
50% Duty Cycle
Min.
—
Typ.(2)
0.5
Max.
1.5
Unit
mA
VIN = VCC
VIN = GND
—
75
120
µA/
MHz
VIN = VCC
VIN = GND
—
0.8
1.7
mA
VIN = 3.4V
VIN = GND
—
1.3
3.2
VIN = VCC
VIN = GND
—
3.8
6.5(5)
VIN = 3.4V
VIN = GND
—
8.3
20(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, I CCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
4
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT162952AT
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tSU
tH
tW
tSK(o)
Parameter
Propagation Delay
xCLKAB, xCLKBA to xBx, xAx
Output Enable Time
xOEBA, xOEAB to xAx, xBx
Output Disable Time
xOEBA, xOEAB to xAx, xBx
Set-up Time, HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
Hold Time HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
Set-up Time, HIGH or LOW
xCEAB, xCEBA to xCLKAB, xCLKBA
Hold Time HIGH or LOW
xCEAB, xCEBA to xCLKAB, xCLKBA
Pulse Width HIGH or LOW
xCLKAB or xCLKBA(3)
Condition(1)
CL = 50pF
RL = 500Ω
Output Skew(4)
FCT162952CT
Max.
10
Min.(2)
2
Max.
6.3
Min.(2)
1.5
Max.
3.7
Unit
ns
1.5
10.5
1.5
7
1.5
4.4
ns
1.5
10
1.5
6.5
1.5
3.6
ns
2.5
—
2.5
—
1.5
—
ns
2
—
1.5
—
0
—
ns
3
—
3
—
2
—
ns
2
—
2
—
0
—
ns
3
—
3
—
3
—
ns
—
0.5
—
0.5
—
0.5
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Guaranteed but not tested
4. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
5
FCT162952ET
Min.(2)
2
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC
SWITCH POSITION
7.0V
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
500 Ω
V O UT
V IN
Pulse
Generator
D.U.T.
50pF
RT
500 Ω
CL
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tREM
tSU
3V
1.5V
0V
3V
1.5V
0V
LOW -HIGH-LOW
PULS E
1.5V
tW
3V
1.5V
0V
HIGH-LOW -HIGH
PULS E
1.5V
3V
1.5V
0V
tH
Pulse Width
Set-up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t PLH
tPHL
OUTPUT
t PLH
OPPOSITE P HASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
DISABLE
3V
CONTROL
INPUT
1.5V
tPZL
VOH
1.5V
VOL
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SW ITCH
CLOSE D
SW ITCH
OPEN
3.5V
3.5V
1.5V
0.3V
tPZH
OUTPUT
NORMALLY
HIGH
0V
tPLZ
VOL
tPHZ
0.3V
V OH
1.5V
0V
0V
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XX
FCT
Temp. Range
XXX
Family
XXXX
Device Type
XX
Package
PV
PA
Shrink Small Outline Package
Thin Shrink Small Outline Package
952AT 16-Bit Registered Transceiver
952CT
952ET
162
Double-Density, 5 Volt, Balanced Drive
74
– 40°C to +85°C
DATA SHEET DOCUMENT HISTORY
1/21/2002
Removed Military temp grade
4/10/2002
Removed B speed grade
5/21/2002
Removed TVSOP package
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7
for Tech Support:
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