Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) FEATURES • 16-bit bus interface • Multiple VCC and GND pins minimize MB2240 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model switching noise • Power-up 3-State • 3-State buffers • Live insertion/extraction permitted • Output capability: +64 mA/–32mA • Latch-up protection exceeds 500mA DESCRIPTION The MB2240 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The MB2240 device is an inverting 16-bit buffer that is ideal for driving bus lines. The device features four Output Enables (1OE, 2OE, 3OE, 4OE), each controlling four of the 3-State outputs. per Jedec JC40.2 Std 17 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.2 ns tPLH tPHL Propagation delay nAx to nYx CL = 50pF; VCC = 5V CIN Input capacitance VI = 0V or VCC 4 pF COUT Output capacitance VO = 0V or VCC 3-State 7 pF ICCZ Total supply current Outputs disabled; VCC = 5.5V 65 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 52-pin plastic QFP –40°C to +85°C MB2240BB 1418B 52 51 50 49 48 47 È È È 46 45 44 43 42 1A3 1A2 GND 1A1 1A0 20E GND LOGIC SYMBOL 1OE 1Y0 1Y1 GND 1Y2 1Y3 PIN CONFIGURATION 41 40 È È È VCC 1 39 V CC 2Y0 2 38 2A0 2Y1 3 37 2A1 GND 4 36 GND 2Y2 5 35 2A2 MB2240 52-pin PQFP 2Y3 6 GND 7 30 GND 3Y2 11 29 3A2 3Y3 12 28 3A3 VCC 13 27 V CC 43 1A1 1Y1 1A2 1Y2 1A3 1Y3 40 47 1OE 38 2A0 2Y0 2A1 2Y1 35 2A2 2Y2 34 2A3 2Y3 37 45 2OE 48 32 3A0 3Y0 49 31 3A1 3Y1 51 29 3A2 3Y2 52 28 3A3 3Y3 8 9 11 12 21 3OE 2 26 4A0 4Y0 4A1 4Y1 3 25 5 23 4A2 4Y2 6 22 4A3 4Y3 19 14 15 17 18 4OE 26 4A0 4A1 GND 4A2 4A3 GND 21 22 23 24 25 4OE 17 18 19 20 4Y3 14 15 16 3OE GND 10 4Y2 31 3A1 4Y0 3Y1 9 GND 1Y0 41 33 GND 32 3A0 4Y1 1A0 34 2A3 3Y0 8 August 23, 1993 44 1 853–1624 10582 Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 FUNCTION TABLE INPUTS OUTPUTS nOE nAx nYx L L H L H L H X Z LOGIC SYMBOL (IEEE/IEC) 21 47 EN3 EN1 44 48 32 43 49 31 41 51 29 11 40 52 28 12 1 45 8 3 9 19 EN4 EN2 2 26 37 3 25 15 35 5 23 17 34 6 22 18 38 2 14 4 PIN DESCRIPTION PIN NUMBER SYMBOL 44, 43, 41, 40, 38, 37, 35, 34, 32, 31, 29, 28, 26, 25, 23, 22 1A0 – 1A3, 2A0 – 2A3, 3A0 – 3A3, 4A0 – 4A3 Data inputs 14, 15, 17, 18, 8, 9, 11, 12, 2, 3, 5, 6, 48, 49, 51, 52 4Y0 – 4Y3, 3Y0 – 3Y3, 2Y0 – 2Y3, 1Y0 – 1Y3 Data outputs 47, 45, 21, 19 1OE, 2OE, 3OE, 4OE Output enables 4, 7, 10, 16, 20, 24, 30, 33, 36, 42, 46, 50 GND Ground (0V) 1, 13, 27, 39 VCC Positive supply voltage August 23, 1993 NAME AND FUNCTION 2 Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range August 23, 1993 2.0 3 V Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH VOL Input clamp voltage High–level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA Typ Max –0.9 –1.2 Min UNIT Max –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V Low–level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-state output current3 VCC = 2.1V; VO = 0.5V; VI = GND or VCC, V OE = Don’t care ±5.0 ±50 ±50 µA IOZH 3–State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IOZL 3–State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA –70 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 65 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 48 60 60 mA VCC = 5.5V; Outputs 3–State; VI = GND or VCC 65 250 250 µA Outputs enabled, one input at 3.4V, other inputs at VCC or GND; VCC = 5.5V 0.5 1.5 1.5 mA II IOFF IPU/IPU IO Output current1 ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. This parameter is valid for any VCC between 0V and 2.1V with a transistion time of up to 10µsec from VCC = 2.1V to VCC = 5V ± 10% a transistion time of up to 100µsec is permitted. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V WAVEFORM Tamb = –40°C to +85°C VCC = +5.0V ±0.5V Min Typ Max Min Max UNIT tPLH tPHL Propagation delay nAx to nYx 1 1.0 1.4 3.1 3.5 4.5 4.5 1.0 1.4 5.1 5.1 ns tPZH tPZL Output enable time to High and Low level 2 1.1 1.4 3.2 4.1 4.3 5.2 1.1 1.4 5.2 6.0 ns tPHZ tPLZ Output disable time from High and Low level 2 1.2 1.3 4.0 3.6 5.1 4.8 1.2 1.3 5.8 5.5 ns August 23, 1993 4 Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V nOE INPUT nAx INPUT VM VM VM tPZL VM tPLZ nYx OUTPUT tPHL 3.5V VM tPLH VOL + 0.3V VOL tPHZ tPZH VM VM nYx OUTPUT VOH VOH – 0.3V nYx OUTPUT VM 0V Waveform 1. Waveforms Showing the Input (An) to Output (Yn) Propagation Delays Waveform 2. Waveforms Showing the 3-State Output Enable and Disable Times TEST CIRCUIT AND WAVEFORMS VCC 7.0V VOUT VIN PULSE GENERATOR tW 90% VM NEGATIVE PULSE CL 10% 0V RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. MB RT = Termination resistance should be equal to ZOUT of pulse generators. August 23, 1993 AMP (V) VM 10% RL D.U.T RT 90% 5 Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nYx 6 Adjustment of tPLH for Load Capacitance and # of Outputs Switching nAx to nYx 5 MAX 5 4 16 switching 8 switching 3 1 switching Offset in ns 4 ns 4.5VCC 3 5.5VCC 2 1 2 0 MIN 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 150 200 pF Adjustment of tPHL for Load Capacitance and # of Outputs Switching nAx to nYx tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nYx 7 100 4 6 3 16 switching 8 switching 1 switching MAX 5 Offset in ns 2 ns 4 4.5VCC 5.5VCC 3 1 0 2 MIN –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 150 Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOE to nYx 5 MAX 5 4 16 switching 8 switching 3 Offset in ns 4 4.5VCC ns 200 pF tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nYx 6 100 3 5.5VCC 1 switching 2 1 2 0 MIN 1 –1 0 –55 –2 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 6 150 200 Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nYx 7 Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOE to nYx 4 6 MAX 3 16 switching 8 switching 1 switching 5 2 4 Offset in ns 4.5VCC ns 5.5VCC 3 2 1 0 MIN –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 200 Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOE to nYx 5 7 16 switching 8 switching 1 switching 4 6 3 MAX Offset in ns 5 ns 150 pF tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nYx 8 100 4 4.5VCC 3 2 1 5.5VCC 2 0 MIN –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 200 Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nOE to nYx 6 5 6 MAX Offset in ns 4.5VCC 5.5VCC ns 4 3 2 16 switching 8 switching 1 switching 4 5 3 2 1 0 MIN 1 –1 0 –55 150 pF tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nYx 7 100 –2 –35 –15 5 25 45 65 85 105 125 0 °C August 23, 1993 50 100 pF 7 150 200 Philips Semiconductors Advanced BiCMOS Products Product specification 16-bit inverting buffer/line driver (3-State) MB2240 tTLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching 4 Adjustment of tTLH for Load Capacitance and # of Outputs Switching 3 Offset in ns 4.5VCC ns 5.5VCC 2 1 –55 –35 –15 5 25 45 65 85 105 11 10 9 8 7 6 5 4 3 2 1 0 –1 –2 –3 16 switching 8 switching 1 switching 0 125 50 °C 150 200 pF tTHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching 3.0 100 Adjustment of tTHL for Load Capacitance and # of Outputs Switching 5 4 2.5 16 switching 8 switching 1 switching Offset in ns 3 ns 2.0 4.5VCC 5.5VCC 2 1 0 1.5 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 100 150 VOHV and VOLP vs Load Capacitance VCC = 5V, VIN = 0 to 3V VOHP and VOLV vs Load Capacitance VCC = 5V, VIN = 0 to 3V 4.0 6 3.5 125°C 25°C –55°C 3.0 5 4 125°C 25°C –55°C 2.5 3 volts 2.0 volts 200 pF 1.5 1.0 2 1 0.5 125°C 25°C –55°C 0.0 125°C 25°C –55°C 0 –1 –0.5 –1 –2 0 50 100 150 200 0 pF August 23, 1993 50 100 pF 8 150 200