Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 • Latch-up protection exceeds 500mA per FEATURES • Independent registers for A and B buses The MB2646 dual transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (nOE) and Direction (nDIR) pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. Jedec JC40.2 Std 17 • ESD protection exceeds 2000V per MIL • Multiple VCC and GND pins minimize STD 883 Method 3015 and 200V per Machine Model switching noise • Live insertion/extraction permitted • Power-up 3-State • Power-up reset DESCRIPTION The MB2646 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. • Multiplexed real-time and stored data • Outputs sink 64mA and source 32mA QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay nAx to nBx CL = 50pF; VCC = 5V 3.2 ns CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance VO = 0V or VCC; 3-State 7 pF ICCZ Total supply current Outputs disabled; VCC = 5.5V 500 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 52-pin plastic Quad Flat Pack -40°C to +85°C MB2646BB 1418B PIN CONFIGURATION LOGIC SYMBOL 52 51 1A2 1A3 50 49 48 47 46 45 44 43 42 Vcc 1B1 1B0 GND 1SBA 1CPBA 1OE 1DIR 1CPAB 1SAB 1A0 1A1 Vcc 50 39 1B2 2 1 2 3 5 6 7 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 41 40 1 51 38 1B3 1A4 3 37 1B4 GND 4 36 1B5 1A5 5 1A6 6 1A7 7 2A0 8 32 2B1 2A1 9 31 2B2 48 1CPAB 49 1SAB 47 1DIR 45 1CPBA 44 1SBA 46 1OE 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 35 1B6 MB2646 52-pin PQFP 34 1B7 33 2B0 41 39 38 37 36 35 34 8 9 10 11 12 13 15 16 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 30 GND 2A2 10 42 19 2CPAB 18 2SAB 2DIR 20 2A5 13 27 2B5 22 2CPBA 23 2SBA 2B6 2B7 26 2SBA 21 22 23 24 25 2CPBA 2DIR 2CPAB 2SAB 2A7 17 18 19 20 2A6 14 15 16 Vcc 28 2B4 2OE 2A4 12 GND 29 2B3 Vcc 2A3 11 21 2OE 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 33 August 23, 1993 1 32 31 29 28 27 25 24 853-1617 10589 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time. active Low. In the isolation mode (nOE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. When an output DESCRIPTION (continued) The select (nSAB, nSBA) pins determine whether data is stored or transferred through the device in real-time. The nDIR determines which bus will receive data when the nOE is PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 48, 45, 19, 22 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A 49, 44, 18, 23 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A 47, 20 1DIR, 2DIR Direction control inputs 50, 51, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 16 1A0 – 1A7, 2A0 – 2A7 Data inputs/outputs (A side) 42, 41, 39, 38, 37, 36, 35, 34, 33, 32, 31, 29, 28, 27, 25, 24 1B0 – 1B7, 2B0 – 2B7 Data inputs/outputs (B side) 46, 21 1OE, 2OE Output enable inputs 4, 17, 30, 43 GND Ground (0V) 14, 26, 40, 52 VCC Positive supply voltage LOGIC SYMBOL (IEEE/IEC) 46 21 G3 3EN1 [BA] G3 3EN1 [BA] 47 3EN2 [AB] 20 3EN2 [AB] 44 G6 23 G6 49 G7 18 G7 45 C4 22 C4 48 C5 19 C5 50 ≥1 ∇1 8 ≥1 ∇1 6 4D 42 6 6 1 5D 7 1 7 33 6 1 ≥1 5D 7 1 7 2∇ August 23, 1993 4D ≥1 2∇ 51 41 9 32 1 39 10 31 2 38 11 29 3 37 12 28 5 36 13 27 6 35 15 25 7 34 16 24 2 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 The following examples demonstrate the four fundamental bus-management functions that can be performed with the MB2646. REAL TIME BUS TRANSFER BUS B TO BUS A A REAL TIME BUS TRANSFER BUS A TO BUS B B A B nOE L nDIR nCPAB nCPBA nSAB nSBA H X X L X nOE L L H TRANSFER STORED DATA TO A OR B A B } nOE L L August 23, 1993 B } nDIR nCPAB nCPBA nSAB nSBA L X X X L A } } nOE L STORAGE FROM A, B, OR A AND B nDIR nCPAB nCPBA nSAB nSBA L X H|L X H H H|L X 3 H X nDIR nCPAB nCPBA nSAB nSBA H ↑ X X X L X X ↑ ↑ ↑ X X X X Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 LOGIC DIAGRAM nOE nDIR nCPBA nSBA nCPAB nSAB 1of 8 Channels 1D C1 Q nB0 nA0 1D C1 Q nA1 nB1 nA2 nB2 nA3 nB3 DETAIL A X 7 nA4 nB4 nA5 nB5 nA6 nB6 nA7 nB7 FUNCTION TABLE INPUTS H L X ↑ * DATA I/O OPERATING MODE nOE nDIR nCPAB nCPBA nSAB nSBA nAx nBx X X ↑ X X X Input Unspecified output* Store A, B unspecified X X X ↑ X X Unspecified output* Input Store B, A unspecified H H X X ↑ H or L ↑ H or L X X X X Input Input Store A and B data Isolation, hold storage L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus L L H H X H or L X X L H X X Input Output Real time A data to B bus Stored A data to B bus = = = = High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOE input. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. August 23, 1993 4 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current VI < 0 VOUT DC output voltage3 output in Off or High state –0.5 to +5.5 V IOUT DC output current output in Low state 128 mA Tstg Storage temperature range –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range August 23, 1993 2.0 5 V Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VIK VOH Input clamp voltage High–level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low–level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output voltageNO TAG VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V II Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current4 VCC = 2.1V; VO = 0.5V; VI = GND or VCC; VOE = Don’t care ±5.0 ±50 ±50 µA IIH + IOZH 3–State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3–State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA Output current1 VCC = 5.5V; VO = 2.5V –80 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 120 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 37 60 60 mA VCC = 5.5V; Outputs 3–State; VI = GND or VCC 120 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA IOFF IPU/PD IO ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. August 23, 1993 6 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM MAX MIN UNIT MIN TYP fMAX Maximum clock frequency 1 130 190 MAX tPLH tPHL Propagation delay nCPAB to nBx or nCPBA to nAx 1 2.2 2.4 3.9 4.6 5.1 5.4 2.2 2.4 5.6 5.9 ns tPLH tPHL Propagation delay nAx to nBx or nBx to nAx 2 1.5 1.5 3.1 3.3 4.3 4.5 1.5 1.5 4.8 5.0 ns tPLH tPHL Propagation delay nSAB to nBx or nSBA to nAx 2, 3 1.5 1.8 3.7 3.9 4.8 4.9 1.5 1.8 5.5 5.6 ns tPZH tPZL Output enable time nOE to nAx or nBx 5 6 1.5 2.1 3.5 4.4 4.8 5.6 1.5 2.1 5.6 6.4 ns tPHZ tPLZ Output disable time nOE to nAx or nBx 5 6 2.1 1.5 3.8 3.1 5.0 4.2 2.1 1.5 5.7 4.7 ns tPZH tPZL Output enable time nDIR to nAx or nBx 5 6 1.5 2.3 4.2 4.9 5.4 6.2 1.5 2.3 6.2 6.9 ns tPHZ tPLZ Output disable time nDIR to nAx or nBx 5 6 2.1 1.5 3.8 3.2 5.0 4.3 2.1 1.5 5.7 5.0 ns 130 MHz AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER +25oC Tamb = VCC = +5.0V WAVEFORM Tamb = -40 to +85oC VCC = +5.0V ±0.5V MIN TYP MIN UNIT ts(H) ts(L) Setup time nAx to nCPAB, nBx to nCPBA 4 2.0 1.5 0.7 0.0 2.0 1.5 ns th(H) th(L) Hold time nAx to nCPAB, nBx to nCPBA 4 1.5 1.0 0.0 –0.7 1.5 1.0 ns tw(H) tw(L) Pulse width, High or Low nCPAB or nCPBA 1 4.5 3.0 2.5 2.0 4.5 3.0 ns August 23, 1993 7 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) MB2646 AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX nCPBA or nCPAB nSBA or nSAB VM VM tw(H) tPLH VM nAx or nBx ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ nAx or nBx nAx or nBx VM VM VM ts(H) tPLH VM ÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉ Waveform 2. Propagation Delay, nSAB to nBx or nSBA to nAx, nAx to nBx or nBx to nAx VM tPHL VM th(H) nCPBA or nCPAB VM VM ts(L) VM th(L) VM Waveform 4. Data Setup and Hold Times Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx nOE, nDIR nOE, nDIR VM VM VM VM nDIR nDIR tPZH nAx or nBx VM nAx or nBx VM tPHL VM Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency nSBA or nSAB nAx or nBx VM tPLH tw(L) tPHL nAx or nBx VM VM tPHZ VM tPZL VOH –0.3V nAx or nBx tPLZ VM 0V VOL +0.3V 0V Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. August 23, 1993 8 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) VCC VOUT PULSE GENERATOR tW 90% 7.0V VIN MB2646 VM NEGATIVE PULSE 10% 0V tTHL (tF) CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. MB RT = Termination resistance should be equal to ZOUT of pulse generators. August 23, 1993 AMP (V) VM 10% RL D.U.T RT 90% 9 Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nCPAB to nBx or nCPBA to nAx 7 MB2646 Adjustment of tPLH for Load Capacitance and # of Outputs Switching nCPAB to nBx or nCPBA to nAx 5 4 6 MAX 3 16 switching 8 switching 2 1 switching Offset in ns ns 5 4.5VCC 4 5.5VCC 1 3 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 6 200 Adjustment of tPHL for Load Capacitance and # of Outputs Switching nCPAB to nBx or nCPBA to nAx 5 4 MAX 5 4.5VCC 5.5VCC 4 Offset in ns ns 150 pF tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nCPAB to nBx or nCPBA to nAx 7 100 3 16 switching 8 switching 2 1 switching 1 3 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 150 200 pF tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nBx or nBx to nAx 6 100 Adjustment of tPLH for Load Capacitance and # of Outputs Switching nAx to nBx or nBx to nAx 5 4 5 MAX 16 switching 8 switching 3 Offset in ns ns 4 4.5VCC 5.5VCC 3 1 switching 2 1 2 0 MIN 1 –1 0 –55 –2 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 10 150 200 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nBx or nBx to nAx 6 MB2646 Adjustment of tPHL for Load Capacitance and # of Outputs Switching nAx to nBx or nBx to nAx 5 5 4 MAX 3 16 switching 8 switching 2 1 switching Offset in ns ns 4 4.5VCC 5.5VCC 3 2 1 0 MIN 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 150 Adjustment of tPLH for Load Capacitance and # of Outputs Switching nSAB to nBx or nSBA to nAx 4 6 3 16 switching 8 switching MAX 5 Offset in ns 2 4 ns 4.5VCC 5.5VCC 3 2 1 switching 1 0 MIN –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nSAB to nBx or nSBA to nAx 7 Adjustment of tPHL for Load Capacitance and # of Outputs Switching nSAB to nBx or nSBA to nAx 5 4 6 MAX 16 switching 8 switching 3 Offset in ns 5 ns 200 pF tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nSAB to nBx or nSBA to nAx 7 100 4.5VCC 4 5.5VCC 3 1 switching 2 1 0 MIN 2 –1 1 –55 –2 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 11 150 200 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 8 Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 5 7 4 MAX 6 4.5VCC 3 5.5VCC 2 MIN Offset in ns 4 16 switching 8 switching 3 5 ns MB2646 1 switching 2 1 0 –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 150 200 pF tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 8 100 Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 5 7 4 16 switching 8 switching MAX 3 5 Offset in ns 6 ns 4.5VCC 5.5VCC 4 1 switching 2 1 3 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 150 Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 10 6 16 switching 8 switching 1 switching 8 MAX 6 4 2 MIN ns 3 4.5VCC 5.5VCC Offset in ns 5 4 2 0 1 –2 0 –55 200 pF tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 7 100 –4 –35 –15 5 25 45 65 85 105 125 0 °C August 23, 1993 50 100 pF 12 150 200 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 8 Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 5 7 4 MAX 6 4.5VCC 3 5.5VCC 2 MIN Offset in ns 4 16 switching 8 switching 3 5 ns MB2646 1 switching 2 1 0 –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 150 200 pF tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 8 100 Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 5 7 4 16 switching 8 switching MAX 3 5 Offset in ns 6 ns 4.5VCC 5.5VCC 4 1 switching 2 1 3 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 150 Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 10 6 16 switching 8 switching 1 switching 8 MAX 6 4 2 MIN ns 3 4.5VCC 5.5VCC Offset in ns 5 4 2 0 1 –2 0 –55 200 pF tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 7 100 –4 –35 –15 5 25 45 65 85 105 125 0 °C August 23, 1993 50 100 pF 13 150 200 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nAx or nBx 6 Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nOE to nAx or nBx 6 5 5 MAX 3 Offset in ns 4.5VCC 5.5VCC 3 16 switching 8 switching 1 switching 4 4 ns MB2646 2 2 1 MIN 0 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 200 Adjustment of tPZH for Load Capacitance and # of Outputs Switching nDIR to nAx or nBx 5 7 4 3 16 switching 8 switching 2 1 switching MAX 6 Offset in ns 5 4.5VCC ns 150 pF tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nDIR to nAx or nBx 8 100 4 5.5VCC 3 1 0 2 MIN –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 7 5 200 Adjustment of tPZL for Load Capacitance and # of Outputs Switching nDIR to nAx or nBx 4 MAX 6 16 switching 8 switching 3 Offset in ns 4.5VCC 5 ns 5.5VCC 4 3 1 switching 2 1 0 MIN 2 –1 1 –55 150 pF tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nDIR to nAx or nBx 8 100 –2 –35 –15 5 25 45 65 85 105 125 0 °C August 23, 1993 50 100 pF 14 150 200 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nDIR to nAx or nBx 7 MB2646 Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nDIR to nAx or nBx 10 16 switching 8 switching 1 switching 8 6 MAX 6 Offset in ns ns 5 4 4.5VCC 3 5.5VCC 2 2 0 MIN –2 1 –55 4 –4 –35 –15 5 25 45 65 85 105 0 125 50 °C 6 4 4 4.5VCC 5.5VCC 3 2 Offset in ns ns 16 switching 8 switching 5 MAX MIN 1 switching 3 2 1 0 1 –1 0 –2 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tTLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching Adjustment of tTLH for Load Capacitance and # of Outputs Switching 4 9 7 16 switching 8 switching 1 switching 3 Offset in ns 5 ns 200 Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nDIR to nAx or nBx 5 –55 150 pF tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nDIR to nAx or nBx 6 100 4.5VCC 2 5.5VCC 3 1 1 –1 0 –55 –3 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 15 150 200 Philips Semiconductors Products Product specification Dual octal bus transceiver/registers (3-State) tTHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching 4 MB2646 Adjustment of tTHL for Load Capacitance and # of Outputs Switching 5 4 20 switching 10 switching 3 Offset in ns ns 3 4.5VCC 2 5.5VCC 1 switching 2 1 0 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 200 VOHP and VOLV vs Load Capacitance VCC = 5V, VIN = 0 to 3V 6 3.5 5 125°C 25°C –55°C 3.0 125°C 25°C –55°C 4 3 Volts 2.5 Volts 150 pF VOHV and VOLP vs Load Capacitance VCC = 5V, VIN = 0 to 3V 4.0 100 2.0 1.5 2 1 0 125°C 25°C –55°C 1.0 0.5 125°C 25°C –55°C –1 –2 0 –3 0 50 100 150 0 200 pF August 23, 1993 50 100 pF 16 150 200