OKI Semiconductor ML9208-xx FEDL9208-01 Issue Date: Feb. 23, 2004 5 × 7 Dot Character × 16-Digit Display Controller/Driver with Character RAM GENERAL DESCRIPTION The ML9208-xx is a dot matrix vacuum fluorescent display tube controller driver IC which displays characters, numerics and symbols. Dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from a micro-controller. A display system is easily realized by internal ROM and RAM for character display. FEATURES • Logic power supply and vacuum fluorescent display tube drive power supply (VDD) : 3.3 V ±10% or 5.0 V ±10% • Fluorescent display tube drive power supply (VFL) : VDD –20 V to VDD –42 V • VFD driver output current (VFD driver output can be connected directly to the fluorescent display tube. No pull-down resistor is required.) - Segment driver (SEG1 to SEG35) : –6 mA (VFL = VDD –42 V) - Segment driver (AD1 and AD2) : –15 mA (VFL = VDD –42 V) - Grid driver (COM1 to COM16) : –30 mA (VFL = VDD –42 V) • General output port output current - Output driver (P1 and P2) : ±1 mA (VDD = 3.3 V ±10%) ±2 mA (VDD = 5.0 V ±10%) • Content of display - CGROM 5 × 7 dots : 248 types (character data) - CGRAM 5 × 7 dots : 8 types (character data) - ADRAM 16 (display digit) × 2 bits (symbol data) - DCRAM 16 (display digit) × 8 bits (register for character data display) - General output port 2 bits (static operation) • Display control function - Display digit : 9 to 16 digits - Display duty (contrast adjustment) : 8 stages - All lights ON/OFFs • 3 interfaces with microcontroller : DA, CS, CP (4 interfaces when RESET is added) • 1-byte instruction execution (excluding data write to RAM) • Built-in oscillation circuit (external R and C) • Package options: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (ML9208-xxGA) 64-pin plastic SSOP (SSOP64-P-525-0.80-K) (ML9208-xxMB) 1/33 FEDL9208-01 OKI Semiconductor ML9208 BLOCK DIAGRAM VDD GND VFL DCRAM 16w × 8b SEG1 CGROM 248w × 35b Segment Driver CGRAM 8w × 35b RESET DA CP CS 8 bit Shift Register ADRAM 16w × 2b SEG35 AD1 AD Driver AD2 Address Selector Command Decoder Write Address Counter Read Address Counter Control Circuit P2 Digit Control Duty Control Timing Generator 1 P1 Port Driver COM1 Grid Driver COM16 Timing Generator 2 OSC0 Oscillator OSC1 2/33 FEDL9208-01 OKI Semiconductor ML9208 49 GND 52 RESET 51 OSC1 50 OSC0 CS 53 54 CP 56 VDD 55 DA 57 P1 59 AD2 58 P2 60 AD1 61 SEG1 63 SEG3 62 SEG2 64 SEG4 PIN CONFIGURATION (TOP VIEW) SEG14 10 39 COM8 SEG15 11 38 COM7 SEG16 12 37 COM6 SEG17 13 36 COM5 SEG18 14 35 COM4 SEG19 15 34 COM3 SEG20 16 33 COM2 COM1 32 40 COM9 SEG35 31 41 COM10 SEG13 9 SEG34 30 SEG12 8 SEG33 29 42 COM11 SEG32 28 43 COM12 SEG11 7 SEG31 27 SEG10 6 SEG30 26 44 COM13 SEG29 25 45 COM14 SEG9 5 SEG28 24 SEG8 4 SEG26 22 SEG27 23 46 COM15 SEG25 21 47 COM16 SEG7 3 SEG24 20 SEG6 2 SEG23 19 48 VFL SEG21 17 SEG22 18 SEG5 1 64-Pin Plastic QFP 3/33 FEDL9208-01 OKI Semiconductor ML9208 P1 1 64 VDD P2 2 63 DA AD2 3 62 CP 61 AD1 4 SEG1 5 SEG2 6 CS 60 RESET 59 OSC1 SEG3 7 58 OSC0 SEG4 8 57 GND SEG5 9 56 VFL SEG6 10 SEG7 11 SEG8 12 55 COM16 54 COM15 SEG9 13 SEG10 14 52 COM13 SEG11 15 50 COM11 SEG12 16 SEG13 17 49 COM10 53 COM14 51 COM12 SEG14 18 48 COM9 47 COM8 SEG15 19 46 COM7 SEG16 20 45 COM6 SEG17 21 SEG18 22 44 COM5 SEG19 23 SEG20 24 42 COM3 SEG21 25 SEG22 26 40 COM1 39 SEG35 SEG23 27 SEG24 28 38 SEG34 SEG25 29 36 SEG32 SEG26 30 35 SEG31 SEG27 31 34 SEG30 33 SEG29 43 COM4 41 COM2 37 SEG33 SEG28 32 64-Pin Plastic SSOP 4/33 FEDL9208-01 OKI Semiconductor ML9208 PIN DESCRIPTION Pin Type Connects to 5 to 39 SEG1 to 35 O Fluorescent tube anode electrode Fluorescent display tube anode electrode drive output. Directly connected to fluorescent display tube and a pull-down resistor is not necessary. IOH > –6 mA O Fluorescent tube grid electrode Fluorescent display tube grid electrode drive output. 32 to 47 40 to 55 COM1 to 16 Fluorescent tube anode electrode Fluorescent display tube anode electrode drive output. O O LED drive control pins — Power supply QFP 1 to 31, 61 to 64 59, 60 SSOP 3, 4 Symbol AD1, AD2 57, 58 1, 2 P1, P2 56 64 VDD 49 57 GND 48 56 VFL 55 63 DA I Microcontroller 54 62 CP I Microcontroller 53 61 CS I Microcontroller Description Directly connected to fluorescent display tube and a pull-down resistor is not necessary. IOH > –30 mA Directly connected to fluorescent display tube and a pull-down resistor is not necessary. IOH > –15 mA General port output. Output of these pins in static operation, so these pins can drive the LED. VDD-GND are power supplies for internal logic. VDD-VFL are power supplies for driving fluorescent tubes. Apply VFL after VDD is applied. Serial data input (positive logic). Input from LSB. Shift clock input. Serial data is shifted on the rising edge of CP. Chip select input. Serial data transfer is disabled when CS pin is “H” level. Reset input. “Low” initializes all the functions. Initial status is as follows. • Address of each RAM ⋅⋅⋅⋅ address “00”H • Data of each RAM ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ Content is undefined 52 60 RESET I • Display digit ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ 16 digits Microcontroller • Contrast adjustment ⋅⋅⋅⋅⋅⋅⋅ 8/16 or C2, R2 • All lights ON or OFF ⋅⋅⋅⋅⋅⋅⋅ OFF mode • All outputs ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ “Low” level RESET (Circuit when R and C are connected externally) R2 C2 See Application Circuit. External RC pin for RC oscillation. 50 58 OSC0 Connect R and C externally. The RC time constant depends on the VDD voltage used. Set the target oscillation frequency to 2 MHz. I C1, R1 OSC0 51 59 OSC1 R1 O OSC1 (RC oscillation circuit) C1 See Application Circuit. 5/33 FEDL9208-01 OKI Semiconductor ML9208 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit Supply Voltage (1) VDD — –0.3 to 6.5 V Supply Voltage (2) VFL — –45 to VDD +0.3 V Input Voltage VIN — –0.3 to VDD +0.3 V Power Dissipation PD Storage Temperature Output Current Ta ≥ 25°C QFP 541 SSOP 590 mW TSTG — –55 to 150 °C IO1 COM1 to 16 –40 to 0.0 mA IO2 AD1, AD2 –20 to 0.0 mA IO3 SEG1 to 35 –10 to 0.0 mA IO4 P1, P2 –4.0 to 4.0 mA RECOMMENDED OPERATING CONDITIONS-1 When the power supply voltage is 5 V (typ.) Symbol Condition Min. Typ. Max. Unit Supply Voltage (1) Parameter VDD — 4.5 5.0 5.5 V Supply Voltage (2) VFL — –36.5 — –20 V High Level Input Voltage VIH All input pins excluding OSC0 pin 0.7 VDD — — V Low Level Input Voltage VIL All input pins excluding OSC0 pin — — 0.3 VDD V CP Frequency fC — — — 2.0 MHz Oscillation Frequency fOSC R1 = 3.3 kΩ, C1 = 39 pF 1.5 2.0 2.5 MHz Frame Frequency fFR DIGIT = 1 to 16, R1 = 3.3 kΩ, C1 = 39 pF 183 244 305 Hz Operating Temperature Top — –40 — 85 °C 6/33 FEDL9208-01 OKI Semiconductor ML9208 RECOMMENDED OPERATING CONDITIONS-2 When the power supply voltage is 3.3 V (typ.) Symbol Condition Min. Typ. Max. Unit Supply Voltage (1) Parameter VDD — 3.0 3.3 3.6 V Supply Voltage (2) VFL — –38.4 — –20 V High Level Input Voltage VIH All input pins excluding OSC0 pin 0.8 VDD — — V Low Level Input Voltage VIL All input pins excluding OSC0 pin — — 0.2 VDD V CP Frequency fC — — — 2.0 MHz Oscillation Frequency fOSC R1 = 3.3 kΩ, C1 = 39 pF 1.5 2.0 2.5 MHz Frame Frequency fFR DIGIT = 1 to 16, R1 = 3.3 kΩ, C1 = 39 pF 183 244 305 Hz Operating Temperature Top — –40 — 85 °C ELECTRICAL CHARACTERISTICS DC Characteristics-1 (VDD = 5.0 V ±10%, VFL = VDD –42 V, Ta = –40 to +85°C, unless otherwise specified) Parameter Symbol Applied pin Condition Min. Max. Unit High Level Input Voltage VIH CS, CP, DA, RESET — 0.7 VDD — V Low Level Input Voltage VIL CS, CP, DA, RESET — — 0.3 VDD V High Level Input Current IIH CS, CP, DA, RESET VIH = VDD –1.0 1.0 µA Low Level Input Current IIL CS, CP, DA, RESET VIL = 0.0 V –1.0 1.0 µA VOH1 COM1 to 16 IOH1 = –30 mA VDD –1.5 — V VOH2 AD1, AD2 IOH2 = –15 mA VDD –1.5 — V VOH3 SEG1 to 35 IOH3 = –6 mA VDD –1.5 — V VOH4 P1, P2 IOH4 = –2 mA VDD –1.0 — V VOL1 COM1 to 16 AD1, AD2 SEG1 to 35 — — VFL +1.0 V VOL2 P1, P2 IOL1 = 2 mA — 1.0 V — 4 mA — 3 mA High Level Output Voltage Low Level Output Voltage Duty = 15/16 IDD1 Current Consumption fOSC = VDD IDD2 2 MHz, no load Digit = 1 to 16 All output lights ON Duty = 8/16 Digit = 1 to 9 All output lights OFF 7/33 FEDL9208-01 OKI Semiconductor ML9208 DC Characteristics-2 (VDD = 3.3 V ±10%, VFL = VDD –42 V, Ta = –40 to +85°C, unless otherwise specified) Parameter Symbol Applied pin Condition Min. Max. Unit High Level Input Voltage VIH CS, CP, DA, RESET — 0.8 VDD — V Low Level Input Voltage VIL CS, CP, DA, RESET — — 0.2 VDD V High Level Input Current IIH CS, CP, DA, RESET VIH = VDD –1.0 1.0 µA Low Level Input Current IIL CS, CP, DA, RESET VIL = 0.0 V –1.0 1.0 µA VOH1 COM1 to 16 IOH1 = –30 mA VDD –1.5 — V VOH2 AD1, AD2 IOH2 = –15 mA VDD –1.5 — V VOH3 SEG1 to 35 IOH3 = –6 mA VDD –1.5 — V VOH4 P1, P2 IOH4 = –1 mA VDD –1.0 — V VOL1 COM1 to 16 AD1, AD2 SEG1 to 35 — — VFL +1.0 V VOL2 P1, P2 IOL1 = 1 mA — 1.0 V — 3 mA — 2 mA High Level Output Voltage Low Level Output Voltage Duty = 15/16 IDD1 FOSC = VDD Current Consumption IDD2 2 MHz, no load Digit = 1 to 16 All output lights ON Duty = 8/16 Digit = 1 to 9 All output lights OFF 8/33 FEDL9208-01 OKI Semiconductor ML9208 AC Characteristics-1 (VDD = 5.0 V ±10%, VFL = VDD –42 V, Ta = –40 to +85°C, unless otherwise specified) Parameter Symbol Condition Min. Max. Unit fC — — 2.0 MHz CP Pulse Width tCW — 250 — ns DA Setup Time tDS — 250 — ns DA Hold Time tDH — 250 — ns CP Frequency CS Setup Time tCSS — 250 — ns CS Hold Time tCSH R1 = 3.3 kΩ, C1 = 47 pF 16 — µs CS Wait Time tCSW — 250 — ns Data Processing Time tDOFF R1 = 3.3 kΩ, C1 = 47 pF 8 — µs RESET Pulse Width tWRES When RESET signal is input from microcontroller etc. externally 250 — ns RESET Time tRSON When RESET signal is input from microcontroller etc. externally 250 — ns R2 = 1.0 kΩ, C2 = 0.1 µF — 200 µs — 250 — ns tR = 20 to 80% — 2.0 µs tF = 80 to 20% — 2.0 µs DA Wait Time All Output Slew Rate tRSOFF tR tF Cl = 100 pF VDD Rise Time tPRZ When mounted in the unit — 100 µs VDD Off Time tPOF When mounted in the unit, VDD = 0.0 V 5.0 — ms AC Characteristics-2 (VDD = 3.3 V ±10%, VFL = VDD –42 V, Ta = –40 to +85°C, unless otherwise specified) Parameter Symbol Condition Min. Max. Unit fC — — 2.0 MHz CP Pulse Width tCW — 250 — ns DA Setup Time tDS — 250 — ns DA Hold Time tDH — 250 — ns CP Frequency CS Setup Time tCSS — 250 — ns CS Hold Time tCSH R1 = 3.3 kΩ, C1 = 39 pF 16 — µs CS Wait Time tCSW — 250 — ns Data Processing Time tDOFF R1 = 3.3 kΩ, C1 = 39 pF 8 — µs RESET Pulse Width tWRES When RESET signal is input from microcontroller etc. externally 250 — ns RESET Time tRSON When RESET signal is input from microcontroller etc. externally 250 — ns R2 = 1.0 kΩ, C2 = 0.1 µF — 200 µs — 250 — ns tR = 20 to 80% — 2.0 µs tF = 80 to 20% — 2.0 µs DA Wait Time All Output Slew Rate tRSOFF tR tF Cl = 100 pF VDD Rise Time tPRZ When mounted in the unit — 100 µs VDD Off Time tPOF When mounted in the unit, VDD = 0.0 V 5.0 — ms 9/33 FEDL9208-01 OKI Semiconductor ML9208 TIMING DIAGRAM Symbol VDD = 3.3 V ±10% VDD = 5.0 V ±10% VIH 0.8 VDD 0.7 VDD VIL 0.2 VDD 0.3 VDD • Data Timing tCSS CS tCSW tCSH fC tDOFF CP tCW VIH VIL VIH VIL tCW tDH tDS DA VALID VALID VIH VIL VALID VALID • Reset Timing VDD tPRZ When input externally tRSON tWRES tRSOFF When external R and C are connected = RESET tPOF tRSOFF 0.8 VDD 0.0 V VIH 0.5 VDD VIL VIH VIL DA • Output Timing All outputs tR tF 0.8 VDD 0.2 VFL 10/33 FEDL9208-01 OKI Semiconductor ML9208 • Digit Output Timing (for 16-digit display, at a duty of 15/16) T = 8/fOSC COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 AD1, 2 SEG1-35 Frame cycle t1 = 1024T (t1= 4.096 ms when fosc = 2.0 MHz) Display timing t2 = 60T (t2 = 240 µs when fosc = 2.0 MHz) Blank timing t3 = 4T (t3 = 16 µs when fosc = 2.0 MHz) VDD VFL VDD VFL 11/33 FEDL9208-01 OKI Semiconductor ML9208 FUNCTIONAL DESCRIPTION Commands List Command 1st byte LSB 2nd byte MSB LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7 1 DCRAM data write 2 CGRAM data write 3 ADRAM data write X0 X1 X2 X3 X0 X1 X2 X0 X1 X2 X3 4 General output port set P1 P2 * 5 Display duty set D0 D1 D2 6 Number of digits set K0 K1 K2 7 All lights ON/OFF Test mode * L H * 1 0 1 0 1 1 0 0 0 0 0 C0 C1 C2 C3 C4 C5 C6 C7 C0 C5 C10 C15 C20 C25 C30 * 2nd byte C1 C6 C11 C16 C21 C26 C31 * 3rd byte C2 C7 C12 C17 C22 C27 C32 * 4th byte C3 C8 C13 C18 C23 C28 C33 * 5th byte C4 C9 C14 C19 C24 C29 C34 * 6th byte 0 C0 C1 *: Don’t care Xn: Address specification for each RAM Cn: Character code specification for each RAM Pn: General output port status specification Dn: Display duty specification Kn: Number of digits specification H: All lights ON instruction L: All lights OFF instruction * 0 0 1 0 * 1 0 1 0 * 0 1 1 0 * 1 1 1 0 * * * * * * When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously, addresses are internally incremented automatically. Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes. Note: The test mode is used for inspection before shipment. It is not a user function. 12/33 FEDL9208-01 OKI Semiconductor ML9208 Positional Relationship Between SEGn and ADn (one digit) C0 AD1 ADRAM written data. Corresponds to 2nd byte C1 AD2 C0 SEG1 C5 C1 SEG2 C6 C2 SEG3 C7 C3 SEG4 C8 C4 SEG5 C9 SEG6 SEG7 SEG8 SEG9 SEG10 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 C20 C21 C22 C23 C24 SEG21 SEG22 SEG23 SEG24 SEG25 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 CGRAM written data. Corresponds to 2nd byte CGRAM written data. Corresponds to 3rd byte CGRAM written data. Corresponds to 4th byte CGRAM written data. Corresponds to 6th byte CGRAM written data. Corresponds to 5th byte 13/33 FEDL9208-01 OKI Semiconductor ML9208 Data Transfer Method and Command Write Method Display control command and data are written by an 8-bit serial transfer. Write timing is shown in the figure below. Setting the CS pin to “Low” level enables a data transfer. Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first). As shown in the figure below, data is read by the shift register at the rising edge of the shift clock, which is input into the CP pin. If 8-bit data is input, internal load signals are automatically generated and data is written to each register and RAM. Therefore it is not necessary to input load signals from the outside. Setting the CS pin to “High” disables data transfer. Data input from the point when the CS pin changes from “High” to “Low” is recognized in 8-bit units. CS tDOFF tCSH CP DA When data is written to DCRAM* B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7 LSB LSB LSB 1st byte MSB Command and address data 2nd byte MSB Character code data 2nd byte MSB Character code data of the next address * When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are internally incremented automatically. Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes. Reset Function Reset is executed when the RESET pin is set to “L”, (when turning power on, for example) and initializes all functions. Initial status is as follows. • Address of each RAM ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ address “00”H • Data of each RAM ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ All contents are undefined • General output port ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ All general output ports go “Low” • Display digit ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ 16 digits • Contrast adjustment ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ 8/16 • All display lights ON or OFF ⋅⋅⋅⋅ OFF mode • Segment output ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ All segment outputs go “Low” • AD output ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ All AD outputs go “Low” Please set again according to “Setting Flowchart” after reset. 14/33 FEDL9208-01 OKI Semiconductor ML9208 Description of Commands and Functions 1. DCRAM data write (Specifies the address of DCRAM and writes the character code of CGROM and CGRAM.) DCRAM (Data Control RAM) has a 4-bit address to store character code of CGROM and CGRAM. The character code specified by DCRAM is converted to a 5 × 7 dot matrix character pattern via CGROM or CGRAM. (The DCRAM can store 16 characters.) [Command format] LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 1st byte (1st) X0 X1 X2 X3 LSB 1 0 0 0 MSB : selects DCRAM data write mode and specifies DCRAM address (Ex: Specifies DCRAM address 0H) B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (2nd) C0 C1 C2 C3 C4 C5 C6 C7 : specifies character code of CGROM and CGRAM (written into DCRAM address 0H) To specify the character code of CGROM and CGRAM continuously to the next address, specify only character code as follows. The addresses of DCRAM are automatically incremented. Specification of an address is unnecessary. 15/33 FEDL9208-01 OKI Semiconductor ML9208 LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (3rd) C0 C1 C2 C3 C4 C5 C6 C7 LSB : specifies character code of CGROM and CGRAM (written into DCRAM address 1H) MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (4th) C0 C1 C2 C3 C4 C5 C6 C7 LSB : specifies character code of CGROM and CGRAM (written into DCRAM address 2H) MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (17th) C0 C1 C2 C3 C4 C5 C6 C7 LSB : specifies character code of CGROM and CGRAM (written into DCRAM address FH) MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (18th) C0 C1 C2 C3 C4 C5 C6 C7 : specifies character code of CGROM and CGRAM (DCRAM address 0H is rewritten) X0 (LSB) to X3 (MSB) : DCRAM addresses (4 bits: 16 characters) C0 (LSB) to C7 (MSB) : Character code of CGROM and CGRAM (8 bits: 256 characters) [COM positions and set DCRAM addresses] HEX X0 X1 X2 X3 COM position 0 0 0 0 0 COM1 1 1 0 0 0 COM2 2 0 1 0 0 COM3 3 1 1 1 0 COM4 4 0 0 1 0 COM5 5 1 0 1 0 COM6 6 0 1 1 0 COM7 7 1 1 1 0 COM8 8 0 0 0 1 COM9 9 1 0 0 1 COM10 A 0 1 0 1 COM11 B 1 1 0 1 COM12 C 0 0 1 1 COM13 D 1 0 1 1 COM14 E 0 1 1 1 COM15 F 1 1 1 1 COM16 16/33 FEDL9208-01 OKI Semiconductor ML9208 2. CGRAM data write (Specifies the addresses of CGRAM and writes character pattern data.) CGRAM (Character Generator RAM) has a 3-bit address to store 5 × 7 dot matrix character patterns. A character pattern stored in CGRAM can be displayed by specifying the character code (address) by DCRAM. The address of CGRAM is assigned to 00H to 07H. (All the other addresses are the CGROM addresses.) (The CGRAM can store 8 types of character patterns.) [Command format] LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 1st byte (1st) X0 X1 X2 * 0 1 0 LSB 0 MSB : selects CGRAM data write mode and specifies CGRAM address. (Ex: specifies CGRAM address 00H) B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (2nd) C0 C5 C10 C15 C20 C25 C30 LSB * : specifies 1st column data (rewritten into CGRAM address 00H) MSB B0 B1 B2 B3 B4 B5 B6 B7 3rd byte (3rd) C1 C6 C11 C16 C21 C26 C31 LSB * : specifies 2nd column data (rewritten into CGRAM address 00H) MSB B0 B1 B2 B3 B4 B5 B6 B7 4th byte (4th) C2 C7 C12 C17 C22 C27 C32 LSB * : specifies 3rd column data (rewritten into CGRAM address 00H) MSB B0 B1 B2 B3 B4 B5 B6 B7 5th byte (5th) C3 C8 C13 C18 C23 C28 C33 LSB * : specifies 4th column data (rewritten into CGRAM address 00H) MSB B0 B1 B2 B3 B4 B5 B6 B7 6th byte (6th) C4 C9 C14 C19 C24 C29 C34 * : specifies 5th column data (rewritten into CGRAM address 00H) To specify character pattern data continuously to the next address, specify only character pattern data as follows. The addresses of CGRAM are automatically incremented. Specification of an address is therefore unnecessary. The 2nd to 6th byte (character pattern data) are regarded as one data item, so 250 ns is sufficient for tDOFF time between bytes. 17/33 FEDL9208-01 OKI Semiconductor ML9208 LSB 2nd byte (7th) MSB B0 B1 B2 B3 B4 B5 B6 B7 C0 C5 C10 C15 C20 C25 C30 * : specifies 1st column data (rewritten into CGRAM address 01H) LSB 6th byte (11th) MSB B0 B1 B2 B3 B4 B5 B6 B7 C4 C9 C14 C19 C24 C29 C34 * : specifies 5th column data (rewritten into CGRAM address 01H) X0 (LSB) to X2 (MSB) : CGRAM addresses (3 bits: 8 characters) C0 (LSB) to C34 (MSB) : Character pattern data (35 bits: 35 outputs per digit) * : Don’t care [CGROM addresses and set CGRAM addresses] Refer to ROMCODE table HEX X0 X1 X2 CGROM address 00 0 0 0 RAM00(00000000B) 01 1 0 0 RAM01(00000001B) 02 0 1 0 RAM02(00000010B) 03 1 1 0 RAM03(00000011B) 04 0 0 1 RAM04(00000100B) 05 1 0 1 RAM05(00000101B) 06 0 1 1 RAM06(00000110B) 07 1 1 1 RAM07(00000111B) 18/33 FEDL9208-01 OKI Semiconductor ML9208 Positional relationship between the output area of CGROM and that of CGRAM C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 area that corresponds to 2nd byte (1st column) area that corresponds to 3rd byte (2nd column) area that corresponds to 6th byte (5th column) area that corresponds to 5th byte (4th column) area that corresponds to 4th byte (3rd column) Note: CGROM (Character Generator ROM) has an 8-bit address to generate 5 × 7 dot matrix character patterns. CGRAM can store 248 types of character patterns. 19/33 FEDL9208-01 OKI Semiconductor ML9208 3. ADRAM data write (specifies address of ADRAM and writes symbol data) ADRAM (Additional Data RAM) has a 2-bit address to store symbol data. Symbol data specified by ADRAM is directly output without CGROM and CGRAM. (The ADRAM can store 2 types of symbol patterns for each digit.) The terminal to which the contents of ADRAM are output can be used as a cursor. [Command format] LSB 1st byte (1st) MSB B0 B1 B2 B3 B4 B5 B6 B7 X0 X1 X2 X3 1 1 0 0 LSB 2nd byte (2nd) MSB B0 B1 B2 B3 B4 B5 B6 B7 C0 C1 * * * * * * : selects ADRAM data write mode and specifies ADRAM address (Ex: specifies ADRAM address 0H) : sets symbol data (written into ADRAM address 0H) To specify symbol data continuously to the next address, specify only symbol data as follows. The address of ADRAM is automatically incremented. Specification of addresses is therefore unnecessary. LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (3rd) C0 C1 * * * * * LSB * MSB : sets symbol data (written into ADRAM address 1H) B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (4th) C0 C1 * * * * * * : sets symbol data (written into ADRAM address 2H) LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (17th) C0 C1 * * * * * LSB * : sets symbol data (written into ADRAM address FH) MSB B0 B1 B2 B3 B4 B5 B6 B7 2nd byte (18th) C0 C1 * * * * * * : sets symbol data (ADRAM address 0H is rewritten.) X0 (LSB) to X3 (MSB) : ADRAM addresses (4 bits: 16 characters) C0 (LSB) to C1 (MSB) : Symbol data (2 bits: 2-symbol data per digit) * : Don’t care 20/33 FEDL9208-01 OKI Semiconductor ML9208 [COM positions and ADRAM addresses] HEX X0 X1 X2 X3 COM position 0 0 0 0 0 COM1 1 1 0 0 0 COM2 2 0 1 0 0 COM3 3 1 1 1 0 COM4 4 0 0 1 0 COM5 5 1 0 1 0 COM6 6 0 1 1 0 COM7 7 1 1 1 0 COM8 8 0 0 0 1 COM9 9 1 0 0 1 COM10 A 0 1 0 1 COM11 B 1 1 0 1 COM12 C 0 0 1 1 COM13 D 1 0 1 1 COM14 E 0 1 1 1 COM15 F 1 1 1 1 COM16 4. General output port set (specifies the general output port status) The general output port is an output for 2-bit static operation. It is used to control other I/O devices and turn on LED. (static operation) When at the “High” level, this output becomes the VDD voltage, and when at the “Low” level, it becomes the ground potential. Therefore, the fluorescent display tube cannot be driven. [Command format] LSB MSB B0 B1 B2 B3 B4 B5 B6 B7 1st byte P1 P2 * * 0 0 1 0 : selects a general output port and specifies the output status P1, P2 : general output port * : don’t care [Set data and set state of general output port] P1 P2 Display state of general output port 0 0 Sets P1 and P2 to low 1 0 Sets P1 to high and P2 to low 0 1 Sets P1 to low and P2 to high 1 1 Sets P1 and P2 to high ← (The state when power is applied or when RESET is input.) 21/33 FEDL9208-01 OKI Semiconductor ML9208 5. Display duty set (writes display duty value to duty cycle register) Display duty adjusts contrast in 8 stages using 3-bit data. When power is turned on or when the RESET signal is input, the duty cycle register value is “0”. Always execute this instruction before turning the display on, then set a desired duty value. [Command format] LSB 1st byte MSB B0 B1 B2 B3 B4 B5 B6 B7 D0 D1 D2 * 1 0 1 0 : selects display duty set mode and sets duty value D0 (LSB) to D2 (MSB) : display duty data (3 bits: 8 stages) * : don’t care [Relation between setup data and controlled COM duty] HEX D0 D1 D2 COM duty 0 0 0 0 8/16 1 1 0 0 9/16 2 0 1 0 10/16 3 1 1 0 11/16 4 0 0 1 12/16 5 1 0 1 13/16 6 0 1 1 14/16 7 1 1 1 15/16 ← (The state when power is turned on or when RESET signal is input.) 22/33 FEDL9208-01 OKI Semiconductor ML9208 6. Number of digits set (writes the number of display digits to the display digit register) The number of digits set can display 9 to 16 digits using 3-bit data. When power is turned on or when a RESET signal is input, the number of digit register value is “0”. Always execute this instruction to change the number of digits before turning the dispaly on. [Command format] LSB 1st byte MSB B0 B1 B2 B3 B4 B5 B6 B7 K0 K1 K2 * 0 1 1 0 : selects the number of digit set mode and specifies the number of digit value K0 (LSB) to K2 (MSB) : number of digit data (3 bits: 8 digits) * : don’t care [Relation between setup data and controlled COM] HEX K0 K1 K2 Number of digits of COM 0 0 0 0 COM1 to 16 1 1 0 0 COM1 to 9 2 0 1 0 COM1 to 10 3 1 1 0 COM1 to 11 4 0 0 1 COM1 to 12 5 1 0 1 COM1 to 13 6 0 1 1 COM1 to 14 7 1 1 1 COM1 to 15 ← (The state when power is turned on or when RESET signal is input.) 23/33 FEDL9208-01 OKI Semiconductor ML9208 7. All display lights ON/OFF set (turns all dispaly lights ON or OFF) All display lights ON is used primarily for display testing. All display lights OFF is primarily used for display blink and to prevent malfunction when power is turned on. This command cannot control the general output port. [Command format] LSB 1st byte MSB B0 B1 B2 B3 B4 B5 B6 B7 L H * * 1 1 1 0 : selects all display lights ON or OFF mode L: sets all lights OFF H: sets all lights ON *: Don’t care [Set data and display state of SEG and AD] L H Display state of SEG and AD 0 0 Normal display 1 0 Sets all outputs to Low 0 1 Sets all outputs to High 1 1 Sets all outputs to High ← (The state when power is applied or when RESET is input.) ← (All lights ON mode has priority.) 24/33 FEDL9208-01 OKI Semiconductor ML9208 Setting Flowchart (Power applying included) Apply VDD Apply VFL All display lights OFF Status of all outputs by RESET signal input General output port setting Number of digits setting Display duty setting Select a RAM to be used DCRAM CGRAM ADRAM Data write mode Data write mode Data write mode (with address setting) (with address setting) (with address setting) Address is automatically incremented Address is automatically incremented DCRAM Character code NO DCRAM Is character code write ended? Address is automatically incremented CGRAM Character code NO YES CGRAM Is character code write ended? YES YES ADRAM Character code NO ADRAM Is character code write ended? YES Another RAM to be set? NO Releases all display lights OFF mode Display operation mode End 25/33 FEDL9208-01 OKI Semiconductor ML9208 Power-off Flowchart Display operation mode Turn off VFL Turn off VDD 26/33 FEDL9208-01 OKI Semiconductor ML9208 APPLICATION CIRCUIT Heater Transformer 5 × 7-dot matrix fluorescent display tube ANODE ANODE GRID (SEGMENT) (SEGMENT) (DIGIT) VDD 2 R2 VDD 35 VDD 16 RESET VDD AD1, 2 SEG1 to 35 COM1 to 16 R4 C2 VDD C3 Microcontroller Output Port GND VFL C4 LED ML9208-01 CS CP DA 2 P1, 2 GND VFL R3 GND OSC0 OSC1 R1 NPN Tr GND C1 GND ZD Notes: 1. The VDD value depends on the power supply voltage of the microcontroller used. Adjust the values of the constants R1, R2, R4, C1, and C2 to the power supply voltage used. 2. The VFL value depends on the fluorescent display tube used. Adjust the values of the constants R3 and ZD to the power supply voltage used. 27/33 FEDL9208-01 OKI Semiconductor ML9208 Reference data The figure below shows the relationship between the VFL voltage and the output current of each driver. Take care that the total power consumption to be used does not exceed the power dissipation. VFL Voltage-Output Current of Each Driver (mA) –30 COM1 to 16 (Condition: VOH = VDD – 1.5 V) Output Current (mA) –25 –20 –15 AD1 and AD2 (Condition: VOH = VDD – 1.5 V) –10 SEG1 to 35 (Condition: VOH = VDD – 1.5 V) –5 0 –17 –22 –27 –32 –37 –42 (V) VFL Voltage (VDD – n) 28/33 FEDL9208-01 OKI Semiconductor ML9208 ML9208-01 ROM CODE * ROM CODE_A is the character set for SEGA1 to SEGA35. *00000000b(00h) to 00001111b(0Fh) are the CGRAM_A addresses. MSB 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 LSB 0000 RAM0 0001 RAM1 0010 RAM2 0011 RAM3 0100 RAM4 0101 RAM5 0110 RAM6 0111 RAM7 1000 1001 1010 1011 1100 1101 1110 1111 29/33 FEDL9208-01 OKI Semiconductor ML9208 PACKAGE DIMENSIONS (Unit: mm) QFP64-P-1414-0.80-BK Mirror finish 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (J5µm) 0.87 TYP. 6/Feb. 23, 2001 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 30/33 FEDL9208-01 OKI Semiconductor ML9208 (Unit: mm) SSOP64-P-525-0.80-K Mirror finish 5 Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 1.34 TYP. 3/Dec. 5, 1996 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 31/33 FEDL9208-01 OKI Semiconductor ML9208 REVISION HISTORY Document No. FEDL9208-02 Date Feb. 23, 2004 Page Previous Current Edition Edition – – Description Final edition 1 32/33 FEDL9208-01 OKI Semiconductor ML9208 NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. 6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd. 33/33