FREESCALE MRF6V14300HSR3

Freescale Semiconductor
Technical Data
Document Number: MRF6V14300H
Rev. 2, 11/2008
RF Power Field Effect Transistors
N - Channel Enhancement - Mode Lateral MOSFETs
MRF6V14300HR3
MRF6V14300HSR3
RF Power transistors designed for applications operating at frequencies
between 1200 and 1400 MHz, 1% to 12% duty cycle. These devices are
suitable for use in pulsed applications.
• Typical Pulsed Performance: VDD = 50 Volts, IDQ = 150 mA, Pout =
330 Watts Peak (39.6 W Avg.), f = 1400 MHz, Pulse Width = 300 μsec,
Duty Cycle = 12%
Power Gain — 18 dB
Drain Efficiency — 60.5%
• Capable of Handling 5:1 VSWR, @ 50 Vdc, 1400 MHz, 330 Watts Peak
Power
1400 MHz, 330 W, 50 V
PULSED
LATERAL N - CHANNEL
RF POWER MOSFETs
Features
• Characterized with Series Equivalent Large - Signal Impedance Parameters
• Internally Matched for Ease of Use
• Qualified Up to a Maximum of 50 VDD Operation
• Integrated ESD Protection
• Greater Negative Gate - Source Voltage Range for Improved Class C
Operation
• RoHS Compliant
• In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel.
CASE 465 - 06, STYLE 1
NI - 780
MRF6V14300HR3
CASE 465A - 06, STYLE 1
NI - 780S
MRF6V14300HSR3
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain- Source Voltage
VDSS
- 0.5, +100
Vdc
Gate- Source Voltage
VGS
- 6.0, +10
Vdc
Storage Temperature Range
Tstg
- 65 to +150
°C
Case Operating Temperature
TC
150
°C
Operating Junction Temperature
TJ
200
°C
Symbol
Value (1,2)
Unit
RθJC
0.13
°C/W
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 65°C, 330 W Pulsed, 300 μsec Pulse Width, 12% Duty Cycle
1. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes - AN1955.
© Freescale Semiconductor, Inc., 2008. All rights reserved.
RF Device Data
Freescale Semiconductor
MRF6V14300HR3 MRF6V14300HSR3
1
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22 - A114)
1C (Minimum)
Machine Model (per EIA/JESD22 - A115)
A (Minimum)
Charge Device Model (per JESD22 - C101)
IV (Minimum)
Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
IGSS
—
—
10
μAdc
100
—
—
Vdc
Off Characteristics
Gate- Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
Drain- Source Breakdown Voltage
(VGS = 0 Vdc, ID = 100 mA)
V(BR)DSS
Zero Gate Voltage Drain Leakage Current
(VDS = 50 Vdc, VGS = 0 Vdc)
IDSS
—
—
50
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 90 Vdc, VGS = 0 Vdc)
IDSS
—
—
2.5
mA
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 662 μAdc)
VGS(th)
0.9
1.6
2.4
Vdc
Gate Quiescent Voltage
(VDD = 50 Vdc, ID = 150 mAdc, Measured in Functional Test)
VGS(Q)
1.5
2.4
3
Vdc
Drain- Source On - Voltage
(VGS = 10 Vdc, ID = 1.63 Adc)
VDS(on)
—
0.26
—
Vdc
Reverse Transfer Capacitance
(VDS = 50 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Crss
—
0.6
—
pF
Output Capacitance
(VDS = 50 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Coss
—
350
—
pF
Input Capacitance
(VDS = 50 Vdc, VGS = 0 Vdc ± 30 mV(rms)ac @ 1 MHz)
Ciss
—
330
—
pF
On Characteristics
Dynamic Characteristics (1)
Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak (39.6 W Avg.), f = 1400 MHz,
Pulsed, 300 μsec Pulse Width, 12% Duty Cycle
Power Gain
Gps
16.5
18
19.5
dB
Drain Efficiency
ηD
59(2)
60.5(2)
—
%
Input Return Loss
IRL
—
- 12
-9
dB
Pulsed RF Performance (In Freescale Application Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak
(39.6 W Avg.), f1 = 1200 MHz, f2 = 1300 MHz and f3 = 1400 MHz, Pulsed, 300 μsec Pulse Width, 12% Duty Cycle, tr = 50 ns
Relative Insertion Phase
|ΔΦ|
—
10
—
°
Gain Flatness
GF
—
0.5
—
dB
Pulse Amplitude Droop
Drp
—
0.3
—
dB
Harmonic 2nd and 3rd
H2 & H3
—
- 20
—
dBc
—
- 65
—
dBc
Spurious Response
Load Mismatch Stability
(VSWR = 3:1 at all Phase Angles)
VSWR - S
All Spurs Below - 60 dBc
Load Mismatch Tolerance
(VSWR = 5:1 at all Phase Angles)
VSWR - T
No Degradation in Output Power
1. Part internally matched both on input and output.
2. Drain efficiency is calculated by: h + 100 P out where: Ipeak = (IAVG - IDQ) / Duty Cycle (%) + IDQ.
D
V DD I peak
MRF6V14300HR3 MRF6V14300HSR3
2
RF Device Data
Freescale Semiconductor
C3
R1
VBIAS
C8
Z3
Z4
Z5
Z6
Z7
Z8
C7
Z22
Z13
Z2
C6
Z23
C9
Z1
+
C4
+
RF
INPUT
C5
VSUPPLY
+
Z9
Z10 Z11
C1
Z14 Z15 Z16 Z17
Z18
Z19 Z20
Z21
RF
OUTPUT
C2
Z12
DUT
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
Z11
Z12
0.205″ x 0.080″ Microstrip
0.721″ x 0.022″ Microstrip
0.080″ x 0.104″ Microstrip
0.128″ x 0.022″ Microstrip
0.062″ x 0.134″ Microstrip
0.440″ x 0.022″ Microstrip
0.262″ x 0.496″ Microstrip
0.030″ x 0.138″ Microstrip
0.256″ x 0.028″ Microstrip
0.058″ x 0.254″ Microstrip
0.344″ x 0.087″ Microstrip
0.110″ x 0.087″ Microstrip
Z13
Z14
Z15
Z16
Z17
Z18
Z19
Z20
Z21
Z22
Z23
PCB
0.110″ x 0.866″ Microstrip
0.630″ x 0.866″ Microstrip
0.307″ x 0.470″ Microstrip
0.045″ x 0.221″ Microstrip
0.171″ x 0.136″ Microstrip
0.120″ x 0.430″ Microstrip
0.964″ x 0.136″ Microstrip
0.177″ x 0.078″ Microstrip
0.215″ x 0.078″ Microstrip
1.577″ x 0.070″ Microstrip
1.459″ x 0.070″ Microstrip
Arlon CuClad 250GX - 0300- 55- 22, 0.030″, εr = 2.55
Figure 1. MRF6V14300HR3(HSR3) Test Circuit Schematic
Table 5. MRF6V14300HR3(HSR3) Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1
43 pF Chip Capacitor
ATC100B430JT500XT
ATC
C2
18 pF Chip Capacitor
ATC100B180JT500XT
ATC
C3
33 pF Chip Capacitor
ATC100B330JT500XT
ATC
C4
27 pF Chip Capacitor
ATC100B270JT500XT
ATC
C5
2.2 μF, 100 V Chip Capacitor
2225X7R225KT3AB
ATC
C6
470 μF, 63 V Electrolytic Capacitor
EMVY630GTR471MMH0S
Multicomp
C7
330 pF, 63 V Electrolytic Capacitor
EMVY630GTR331MMH0S
Multicomp
C8
0.1 μF, 35 V Chip Capacitor
CDR33BX104AKYS
Kemet
C9
10 μF, 35 V Tantalum Capacitor
T491D106K035AT
Kemet
R1
10 Ω, 1/4 W Chip Resistor
CRCW120610R0FKEA
Vishay
MRF6V14300HR3 MRF6V14300HSR3
RF Device Data
Freescale Semiconductor
3
C9
C3
C4
C8
C6
C5
R1
C7
C2
CUT OUT AREA
C1
MRF6V14300
Rev. 1
Figure 2. MRF6V14300HR3(HSR3) Test Circuit Component Layout
MRF6V14300HR3 MRF6V14300HSR3
4
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
1000
160
MAXIMUM OPERATING Tcase (°C)
Coss
C, CAPACITANCE (pF)
Ciss
100
Measured with ±30 mV(rms)ac @ 1 MHz
VGS = 0 Vdc
10
Crss
1
0.1
140
120
100
Pout = 300 W
80
40
VDD = 50 Vdc, IDQ = 150 mA
f = 1200 MHz, Pulse Width = 300 μsec
20
0
0
10
30
20
40
50
0
4
6
8
10
12
14
16
DUTY CYCLE (%)
Figure 3. Capacitance versus Drain - Source Voltage
Figure 4. Safe Operating Area
59
58
65
55
Gps
20
45
ηD
35
18
VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz
Pulse Width = 300 μsec, Duty Cycle = 12%
16
50
100
Pout, OUTPUT POWER (dBm)
22
ηD, DRAIN EFFICIENCY (%)
57
Gps, POWER GAIN (dB)
2
VDS, DRAIN−SOURCE VOLTAGE (VOLTS)
24
25
400
18
20
Ideal
P3dB = 55.30 dBm (339 W)
P1dB = 54.77 dBm (300 W)
56
55
Actual
54
53
52
51
50
49
48
47
27
VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz
Pulse Width = 300 μsec, Duty Cycle = 12%
29
31
33
35
37
Pout, OUTPUT POWER (WATTS) PULSED
Pin, INPUT POWER (dBm) PULSED
Figure 5. Pulsed Power Gain and Drain Efficiency
versus Output Power
Figure 6. Pulsed Output Power versus
Input Power
39
22
22
21
Gps, POWER GAIN (dB)
IDQ = 600 mA
21
Gps, POWER GAIN (dB)
Pout = 270 W
Pout = 330 W
60
20 300 mA
150 mA
450 mA
19
IDQ = 150 mA, f = 1400 MHz
Pulse Width = 300 μsec
Duty Cycle = 12%
20
19
18
17
18
16
VDD = 50 Vdc, f = 1400 MHz
Pulse Width = 300 μsec, Duty Cycle = 12%
100
40 V
45 V 50 V
VDD = 30 V
17
50
35 V
400
15
50
100
Pout, OUTPUT POWER (WATTS) PULSED
Pout, OUTPUT POWER (WATTS) PULSED
Figure 7. Pulsed Power Gain versus
Output Power
Figure 8. Pulsed Power Gain versus
Output Power
400
MRF6V14300HR3 MRF6V14300HSR3
RF Device Data
Freescale Semiconductor
5
TYPICAL CHARACTERISTICS
25_C
55_C
25_C
300
85_C
200
100
22
20
25_C
85_C
3
4
5
46
ηD
55_C
34
18
6
16
50
22
400
100
Pin, INPUT POWER (WATTS) PULSED
Pout, OUTPUT POWER (WATTS) PULSED
Figure 9. Pulsed Output Power versus
Input Power
Figure 10. Pulsed Power Gain and Drain Efficiency
versus Output Power
Gps, POWER GAIN (dB)
18
Gps
62
17
61
16
ηD
60
15
59
14
0
13
−5
IRL
−10
12
−15
11
10
9
1200
VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak (39.6 W Avg.)
Pulse Width = 300 μsec, Duty Cycle = 12%
1225
1250
1275
1300
1325
1350
1375
−20
ηD, DRAIN
EFFICIENCY (%)
63
19
IRL, INPUT RETURN
LOSS (dB)
2
58
VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz
Pulse Width = 300 μsec, Duty Cycle = 12%
0
1
85_C
Gps
70
TC = −30_C
VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz
Pulse Width = 300 μsec, Duty Cycle = 12%
0
−30_C
ηD, DRAIN EFFICIENCY (%)
24
TC = −30_C
Gps, POWER GAIN (dB)
Pout, OUTPUT POWER (WATTS) PULSED
400
−25
1400
f, FREQUENCY (MHz)
Figure 11. Broadband Performance @ Pout = 330 Watts Peak
MTTF (HOURS)
108
107
106
105
90
110
130
150
170
190
210
230
250
TJ, JUNCTION TEMPERATURE (°C)
This above graph displays calculated MTTF in hours when the device
is operated at VDD = 50 Vdc, Pout = 330 W Peak, Pulse Width = 300 μsec,
Duty Cycle = 12%, and ηD = 60.5%.
MTTF calculator available at http://www.freescale.com/rf. Select
Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
Figure 12. MTTF versus Junction Temperature
MRF6V14300HR3 MRF6V14300HSR3
6
RF Device Data
Freescale Semiconductor
Zo = 10 Ω
f = 1400 MHz
f = 1400 MHz
Zload
Zsource
f = 1200 MHz
f = 1200 MHz
VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak
f
MHz
Zsource
W
Zload
W
1200
2.70 - j4.10
2.97 - j2.66
1300
4.93 - j2.66
2.85 - j2.40
1400
7.01 - j2.87
3.17 - j1.78
Zsource = Test circuit impedance as measured from
gate to ground.
Zload
= Test circuit impedance as measured
from drain to ground.
Output
Matching
Network
Device
Under
Test
Input
Matching
Network
Z
source
Z
load
Figure 13. Series Equivalent Source and Load Impedance
MRF6V14300HR3 MRF6V14300HSR3
RF Device Data
Freescale Semiconductor
7
PACKAGE DIMENSIONS
B
G
Q
bbb
2X
1
T A
M
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M−1994.
2. CONTROLLING DIMENSION: INCH.
3. DELETED
4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY
FROM PACKAGE BODY.
3
B
K
2
(FLANGE)
D
bbb
M
T A
M
B
M
M
R
(INSULATOR)
bbb
N
T A
M
M
B
M
ccc
M
T A
M
S
(LID)
ccc
H
T A
M
M
B
M
aaa
M
T A
M
(LID)
B
M
(INSULATOR)
B
M
C
F
E
A
SEATING
PLANE
T
A
CASE 465 - 06
ISSUE G
NI - 780
MRF6V14300HR3
(FLANGE)
DIM
A
B
C
D
E
F
G
H
K
M
N
Q
R
S
aaa
bbb
ccc
INCHES
MIN
MAX
1.335
1.345
0.380
0.390
0.125
0.170
0.495
0.505
0.035
0.045
0.003
0.006
1.100 BSC
0.057
0.067
0.170
0.210
0.774
0.786
0.772
0.788
.118
.138
0.365
0.375
0.365
0.375
0.005 REF
0.010 REF
0.015 REF
MILLIMETERS
MIN
MAX
33.91
34.16
9.65
9.91
3.18
4.32
12.57
12.83
0.89
1.14
0.08
0.15
27.94 BSC
1.45
1.70
4.32
5.33
19.66
19.96
19.60
20.00
3.00
3.51
9.27
9.53
9.27
9.52
0.127 REF
0.254 REF
0.381 REF
STYLE 1:
PIN 1. DRAIN
2. GATE
3. SOURCE
4X U
(FLANGE)
4X Z
(LID)
B
1
K
2X
2
B
(FLANGE)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M−1994.
2. CONTROLLING DIMENSION: INCH.
3. DELETED
4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY
FROM PACKAGE BODY.
D
bbb
M
T A
M
B
M
N
(LID)
ccc
M
R
M
T A
M
B
M
M
B
M
ccc
M
T A
M
aaa
M
T A
M
S
(INSULATOR)
bbb
M
T A
(LID)
B
M
(INSULATOR)
B
M
H
C
3
E
A
A
F
T
SEATING
PLANE
(FLANGE)
CASE 465A - 06
ISSUE H
NI - 780S
MRF6V14300HSR3
DIM
A
B
C
D
E
F
H
K
M
N
R
S
U
Z
aaa
bbb
ccc
INCHES
MIN
MAX
0.805
0.815
0.380
0.390
0.125
0.170
0.495
0.505
0.035
0.045
0.003
0.006
0.057
0.067
0.170
0.210
0.774
0.786
0.772
0.788
0.365
0.375
0.365
0.375
−−−
0.040
−−−
0.030
0.005 REF
0.010 REF
0.015 REF
MILLIMETERS
MIN
MAX
20.45
20.70
9.65
9.91
3.18
4.32
12.57
12.83
0.89
1.14
0.08
0.15
1.45
1.70
4.32
5.33
19.61
20.02
19.61
20.02
9.27
9.53
9.27
9.52
−−−
1.02
−−−
0.76
0.127 REF
0.254 REF
0.381 REF
STYLE 1:
PIN 1. DRAIN
2. GATE
5. SOURCE
MRF6V14300HR3 MRF6V14300HSR3
8
RF Device Data
Freescale Semiconductor
PRODUCT DOCUMENTATION
Refer to the following documents to aid your design process.
Application Notes
• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
Sept. 2008
• Initial Release of Data Sheet
1
Oct. 2008
• Added footnote to describe the formula used to calculate values for Min and Typ Drain Efficiency in the
Functional Test table, p. 2
• Updated Fig. 4, Safe Operating Area, to show additional curves for 270 W and 300 W output power, p. 5
• Added Fig. 12, MTTF versus Junction Temperature, p. 6
2
Nov. 2008
• Changed “multiply by” symbol to “divide by” symbol in the Functional Test Drain Efficiency formula
footnote, p. 2
MRF6V14300HR3 MRF6V14300HSR3
RF Device Data
Freescale Semiconductor
9
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© Freescale Semiconductor, Inc. 2008. All rights reserved.
MRF6V14300HR3 MRF6V14300HSR3
Document Number: MRF6V14300H
Rev. 2, 11/2008
10
RF Device Data
Freescale Semiconductor