将CCD外围电路单片封装 用于CCD照相机的模拟前端处理IC NN12067A 概 要 NN12067A型IC，内置定时信号产生器和垂直驱动器(对应本公司 CCD)，用于CCD照相机的模拟前端处理(CDS、GCA、A/D转换 器)。通过内置专用定时信号产生器和垂直驱动器，可以缩短 CCD照相机的开发设计时间，并可以节省空间。 特 长 • GCA的增益范围极宽：-2dB ～ 34dB • 与本公司历来产品相比，信噪比提高了5dB • 附带水平驱动器 • 附带频闪同步脉冲输出 • 具备电子变焦功能、电子快门功能 • 内置17条通道的垂直驱动器和1条通道的SUB驱动器 • 内置SSG • 最大驱动频率:36MHz • 主时钟:可以设定为fck/2fck • TG:半可编程 • 采用小型LLGA封装 MLGA107-L2-0909 用 途 CCD照相机(数码相机、手机照相机等) 系统框图 MN39720 MN39750 MN39830 CCD NN12067A 数字前处理 驱动脉冲 V驱动器 MN103SA10EYD SDRAM 256M 视频信号输出 数字 信号处理 模拟RGB 闪存卡 本产品目录是2005年7月25日制成的。 M00696AC Block Diagram OV2 VM VM VHH VH VH VMSUB RESET 74 OV5C OV1B OV5L OV3B OV5A OV6 OV1S OV3L OSUB OV1A OV1C OV3A OV3C OV5B OV4 OV3R OV5R 93 73 72 94 71 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 96 CCD Vertical Driver 95 VL 70 VL 35 DVSS3 32 DVSS3 29 DVSS3 36 DVDD3 33 DVDD3 30 DVDD3 37 HL 34 H2 31 H1 AFE + TG AN12067 14 EXADCLK 15 VSS 69 DC_DET 1 68 DC_DET 2 67 VDD 66 CCDOUT PBLK 65 CPOB CPOB2 DC_DET 3 63 VDD 64 DC_DET4 62 VSS 61 AUX 59 VRB 60 VRT 58 VSSSUB 97 CLR 5 CS 19 DCLK 20 DATA XI XO DVDD1 DVSS1 SUB, SUBCNT EXDS2 13 CH1 to CH9 EXDS1 V1 to V6, V1S, V3L, V3R, V5L, V5R AN20110 DS1 DS2 clamp clamp CCD Timing Generator GC S/H S/H I/O 54 53 52 50 48 D1 D2 D3 D4 SUBSW 4 SHUT DVSS2 DVSS2 VrefL 17 DVSS2 VrefH 10 DVSS2 3 DVSS2 38 DVDD2 24 DVDD2 16 DVDD2 9 DVDD2 2 DVDD2 ADCLK 49 47 46 45 44 43 42 DRVSS D0 TEST1 25 ADC 51 6 18 28 57 55 TEST2 STO Clock Generator 56 7 DVSS2 39 40 FCKSW 41 DC Cont 21 R 8 1 + GC – AMP SERIAL 27 D5 DRVDD 22 23 26 HD CLKO SSGSW CCDSW VD D6 D7 D8 D9 D10 D11 11 12 Pin Arrangement (Top View) TOP VIEW 13 97 12 52 49 87 84 46 43 82 79 39 53 50 88 85 45 42 81 41 38 48 86 47 44 83 80 40 76 78 77 97 11 90 89 51 10 54 92 91 73 75 74 9 93 56 55 36 37 72 8 94 58 57 33 35 34 7 95 60 59 71 31 32 6 62 63 61 70 29 30 5 65 66 64 26 27 28 4 68 69 67 N.C. 25 24 3 96 N.C. N.C. 2 5 8 11 14 16 19 21 N.C. N.C. 1 4 7 10 12 15 18 N.C. 23 3 6 9 13 N.C. 17 20 22 C D E F G H J K L D3 DRVSS OV1C OV3L D7 D10 OV5L OV3C XI D2 D5 OV1B OV3R D8 D11 OV3A DVSS2 DVDD2 DRVDD OV1S D6 D9 OV5R OV3B XO OV5C OV5A OV5B 2 97 1 A B 97 M N TOP VIEW 13 VSSSUB VSSSUB 12 11 OV6 OV1A D4 10 D1 OV2 OV4 VM OSUB VMSUB 9 VM DVDD1 D0 DVDD3 HL VHH 8 VH VRT DVSS1 DVDD3 DVSS3 H2 7 VL VRB AUX VH H1 DVSS3 6 DC_DET4 DC_DET3 VSS VL DVSS3 DVDD3 5 CCDOUT VDD VDD CLKO R DVSS2 4 DC_DET1 VSS DC_DET2 N.C. DVSS2 DVDD2 3 RESET N.C. N.C. DVDD2 CLR FCKSW CCDSW CS DATA N.C. N.C. STO SHUT TEST2 DVSS2 SSGSW EXADCLK SUBSW N.C. HD DVSS2 TEST1 DVDD2 EXDS1 DVSS2 DCLK VD F G J K L 2 EXDS2 DVDD2 VSSSUB VSSSUB 1 A B C D Thermal / dummy land E No land N.C. H N.C. The direction recognition mark corresponds to the direction of A1 land M Land without wire connection NN12067A XXXXX JAPAN N Pin Descriptions1 No. Pin name Pin Type Description 1 STO C2 I/O Strobe trigger output 2 DVDD2 D3 — Power supply for timing generator block 3 DVSS2 D1 — Ground for timing generator block 4 SHUT D2 Output 5 CLR E3 Input All clear input 6 TEST1 E1 Input Test input 1 (Normally set low) 7 TEST2 E2 Input Test input 2 (Normally set low) 8 FCKSW F3 Input Master clock setting input 9 DVDD2 F1 — Power supply for timing generator block 10 DVSS2 F2 — Ground for timing generator block 11 CCDSW G3 Input CCD setting input 12 SSGSW G2 Input SSG setting input 13 EXDS1 G1 I/O Pre-charge S/H pulse output 14 EXDS2 H3 I/O Data S/H pulse output 15 EXADCLK H2 I/O A/D clock output 16 DVDD2 J3 — Power supply for timing generator block 17 DVSS2 J1 — Ground for timing generator block 18 SUBSW J2 I/O SUB bias voltage control pulse output 19 CS K3 Input Data latch input for serial data communications 20 DCLK K1 Input Clock input for serial data communications 21 DATA L3 Input Data input for serial data communications 22 VD L1 I/O Vertical sync pulse input/output 23 HD L2 I/O Horizontal sync pulse input/output 24 DVDD2 N4 — Power supply for timing generator block 25 DVSS2 M4 — Ground for timing generator block 26 CLKO L5 Output FCK clock output 27 R M5 Output fR pulse output (positive logic) 28 DVSS2 N5 — Ground for timing generator block 29 DVSS3 M6 — Ground for fH driver and fR driver 30 DVDD3 N6 — Power supply for fH driver and fR driver 31 H1 M7 Output 32 DVSS3 N7 — Ground for fH driver and fR driver 33 DVDD3 L8 — Power supply for fH driver and fR driver 34 H2 N8 Output Mechanical shutter control pulse fH1 pulse output (positive logic) fH2 pulse output (positive logic) Pin Descriptions2 No. Pin name Pin Type Description 35 DVSS3 M8 — Ground for fH driver and fR driver 36 DVDD3 L9 — Power supply for fH driver and fR driver 37 HL M9 Output 38 DVDD2 L12 — Power supply for timing generator block 39 XI L13 Input Crystal oscillator input (FCK or 2FCK) 40 XO K11 Output 41 DVSS2 K12 — 42 D11 H12 Output A/D output (MSB) 43 D10 H13 Output A/D output 44 D9 G11 Output A/D output 45 D8 G12 Output A/D output 46 D7 G13 Output A/D output 47 D6 F11 Output A/D output 48 DRVDD D11 — Digital driver power supply for signal processing block 49 DRVSS D13 — Digital driver ground for signal processing block 50 D5 D12 Output A/D output 51 D4 C11 Output A/D output 52 D3 C13 Output A/D output 53 D2 C12 Output A/D output 54 D1 A10 Output A/D output 55 D0 C9 Output A/D output (LSB) 56 DVDD1 B9 — Power supply for signal processing block 57 DVSS1 C8 — Ground for signal processing block 58 VRT B8 — VRT 59 AUX C7 — External signal input 60 VRB B7 — VRB 61 VSS C6 — Analog ground for signal processing block 62 DC_DET4 A6 — Bias stabilization 2 63 DC_DET3 B6 — Bias stabilization 1 64 VDD C5 — Analog power supply for signal processing block 65 CCDOUT A5 — CDS signal input 66 VDD B5 — Analog power supply for signal processing block 67 DC_DET2 C4 — GCA output DC level stabilization fHL pulse output (positive logic) Crystal oscillator output (FCK/2FCK) with 3 times multiplier and external feedback resistor Ground for timing generator block Pin Descriptions3 No. Pin name Pin Type Description 68 DC_DET1 A4 — CDS output DC level stabilization 69 VSS B4 — Analog ground for signal processing block 70 VL L6 — (V-Driver) Low-level power supply 71 VH L7 — (V-Driver) High-level power supply for vertical driver 72 VHH N9 — (V-Driver) High-level power supply for fSUB driver 73 VM L10 — (V-Driver) Middle-level power supply for vertical driver 74 VMSUB N10 — (V-Driver) Middle-level power supply for fSUB driver 75 OSUB M10 Output (V-Driver) SUB pulse output 76 OV5C L11 Output (V-Driver) fV5C transfer pulse output 77 OV5B N11 Output (V-Driver) fV5B transfer pulse output 78 OV5A M11 Output (V-Driver) fV5A transfer pulse output 79 OV3C K13 Output (V-Driver) fV3C transfer pulse output 80 OV3B J11 Output (V-Driver) fV3B transfer pulse output 81 OV3A J12 Output (V-Driver) fV3A transfer pulse output 82 OV5L J13 Output (V-Driver) fV5L transfer pulse output 83 OV5R H11 Output (V-Driver) fV5R transfer pulse output 84 OV3L F13 Output (V-Driver) fV3L transfer pulse output 85 OV3R F12 Output (V-Driver) fV3R transfer pulse output 86 OV1S E11 Output (V-Driver) fV1S transfer pulse output 87 OV1C E13 Output (V-Driver) fV1C transfer pulse output 88 OV1B E12 Output (V-Driver) fV1B transfer pulse output 89 OV1A B11 Output (V-Driver) fV1A transfer pulse output 90 OV6 A11 Output (V-Driver) fV6 transfer pulse output 91 OV4 C10 Output (V-Driver) fV4 transfer pulse output 92 OV2 B10 Output (V-Driver) fV2 transfer pulse output 93 VM A9 — (V-Driver) Middle-level power supply for vertical driver 94 VH A8 — (V-Driver) High-level power supply for vertical driver 95 VL A7 — (V-Driver) Low-level power supply 96 RESET A3 Input 97 VSSSUB A1, A13 N1, N13 — (V-Driver) Reset pulse input Ground for analog front end chip substrate Absolute Maximum Ratings A No. Parameter Symbol Rating Unit Notes 4.6 V *1 1 Supply voltage 1 VDD, DRVDD, DVDD1, DVDD2 2 Supply voltage 2 DVDD3 4.6 V *1 3 Supply voltage 3 VHH – VL 25 V *1 4 Supply voltage 4 VH – VL 25 V *1 5 Supply voltage 5 VL – 9.0 V *1 6 Supply voltage 6 VMSUB (VL+2.0) to 5.5 V *1 7 Supply current ICC — mA 8 Power dissipation PD 249 mW *2 9 Operating ambient temperature Topr – 20 to + 75 °C *3 10 Storage temperature Tstg – 50 to + 125 °C *3 Note) *1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : The above power dissipation shows the package individual power dissipation at Ta = 75°C, in free-air. Refer to the Pd-Ta diagram on sheet No. 45, and use this IC under the condition not exceeding the allowable value. *3 : Ta = 25°C except storage temperature and operating ambient temperature . *4 : This IC operates with the load capacitance of less than 5 500 pF, but this IC is tested only with load of sheet No.20. Care should be taken. Operating supply voltage range Parameter Symbol Range Unit Notes Supply voltage 1 VDD, DRVDD, DVDD1, DVDD2 2.9 V to 3.6 V *1 Supply voltage 2 DVDD3 2.9 V to 3.6 V *1 Supply voltage 3 VHH 11.3 V to 15.5 V *1 Supply voltage 4 VH 11.3 V to 15.5 V *1 Supply voltage 5 VL –8.5 V to –4.0 V *1 Supply voltage 6 VMSUB (VL+2.0) to 5.0 V *1 Supply voltage 7 VM — — *2 Note) *1 :The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : VM should be used at the same potential as the ground pins.