Application Note
Usage and Application of µPB1509GV
1-GHz Input Divide by 2, 4, 8 Prescaler
IC for Portable Radio Systems
Document No. P12611EJ1V0AN00 (1st edition)
Date Published October 1997 N
©
Printed in Japan
1997
[MEMO]
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on
a customer designated "quality assurance program" for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96. 5
Precautions for design-ins
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form the ground pattern as wide as possible to minimize the ground impedance. In particular, the line connected
to the ground pin should be as short as possible.
(3) A bypass capacitor should be attached to each VCC pin.
(4) The DC cut capacitor must be externally attached to each signal pin.
(5) Each input pin must not externally adjust the pin voltage.
(6) When pull down the output pin with a DC resistor, choose a resistor with a resistance larger than 200 Ω.
(7) Beware that if the load impedance ZL is smaller than 200 Ω the output amplitude is too low, resulting in a low DU
ratio with the second order harmonics.
This document outlines a typical application of this product, that is, provides a sample concept for
designing an external circuit directly required for this product.
NEC only assures the quality and
characteristics of this product specified in the Data Sheet, and is not responsible for any user's product
designs or application sets.
The peripheral circuit shown in this document is just an example prepared for evaluating the operations
of this product, and does not imply that the circuit configurations or constants are recommended values
or regulations. In addition, these circuits are not intended for any mass-produced application sets. This
is because the RF characteristics vary depending on the external parts used, mounting patterns, and
other conditions.
Therefore, it is the responsibility of the user to design the external circuit according to the user-desired
system requirements while referring to the information in this document and to use it after confirming the
characteristics on the user’s application set.
The information in this document will be updated without notice.
CONTENTS
1.
INTRODUCTION...............................................................................................................................
1
2.
PRODUCT OUTLINE........................................................................................................................
2.1 Features....................................................................................................................................
2.2 Process Technology ...............................................................................................................
2.3 Internal Circuit .........................................................................................................................
2.4 Characteristics and Measurement .........................................................................................
1
1
2
3
5
(1) Input/output impedance .................................................................................................................
5
(2) Divide ratio setting pins .................................................................................................................
6
3.
APPLICATION CIRCUIT DESIGN EXAMPLES...............................................................................
3.1 Output Amplitude Improvement ............................................................................................
3.2 Load Impedance and Characteristics....................................................................................
3.3 External Control of Divide Ratio Setting Pins ......................................................................
8
8
9
10
4.
SYSTEM EXAMPLE .........................................................................................................................
4.1 Calculation of Count Number and Step Frequency for Prescaler PLL ..............................
11
11
5.
CONCLUSION ..................................................................................................................................
12
Reference Documents
-i-
[MEMO]
- ii -
1. INTRODUCTION
In the consumer electronic appliances, the proportion of portable to stationary models has been considerably
growing these days. Especially in portable radios and wireless transceivers, pocket-size appliances instead of the
conventional carrying types are leading this market. What is more, due to small size and light weight, battery
downsizing and lower operating voltage are needed. Based on the trend of portable appliances utilizing RF waves,
the ICs in these appliances are also required to have a smaller size and a lower operating voltage .
In order to meet these requirements, NEC, which had marketed products with the part number µPB5xx as
conventional-type prescaler ICs, has recently developed and released the µPB1509GV low-voltage shrink package
prescaler IC.
This document describes the features and application examples for this IC.
2. PRODUCT OUTLINE
2.1 Features
The µPB1509GV is a monolithic silicon IC designed as a prescaler for portable radio systems. This IC can be
used as the front-end prescaler for the PLL frequency synthesizer incorporated in the 17K Series of DTS controllers.
The greatest difference with the previous prescaler IC of µPB587G is that the µPB1509GV uses a shrink package to
reduce the space in the application set. Although the pin pitch of this shrink package is narrower than µPB587G, a
high isolation is achieved by using the same pin configuration as for NEC’s conventional products, arranging input
and output pins back-to-back, and devising internal circuit designs. Table 2-1 shows the comparison of
characteristics with the conventional product and Figure 2-1 compares the dimensions of these products.
Table 2-1. Characteristic Comparison with the µPB587G
Divide
by 2
Mode
fin (MHz)
Divide
by 4
Mode
fin (MHz)
Divide
by 8
Mode
fin (MHz)
2.2 to 3.5
50 to 300
50 to 600
50 to
1000
8-pin plastic SOP (225 mil)
2.2 to 5.5
50 to 700
50 to 800
50 to
1000
8-pin plastic SSOP (175 mil)
ICC
(mA)
VCC
(V)
µPB587G
5.5
µPB1509GV
5.0
Part Number
Pin
Configuration
Package
NEC original
configuration
Figure 2-1. 8-Pin Plastic SOP (225 mil) vs. 8-Pin Plastic SSOP (175 mil)
8-pin plastic SOP (225 mil)
8
8-pin plastic SSOP (175 mil)
5
8
5
Detail of lead end
3¡
+7
–3
3° –3
+7
Detail of lead end
4
1
5.37 MAX.
1
4
1.49
6.5 ± 0.3
4.4
4.94 ± 0.2
1.1
3.2 ± 0.1
0.87 ± 0.2
0.10
+0.10
0.6 ± 0.2
1.5 ± 0.1
0.78 MAX.
0.15 –0.05
0.40
+0.10
–0.05
1.8 MAX.
1.27
0.12 M
0.65
S8GM-50-225B-4
0.1 ± 0.1
0.1 ± 0.1
0.15 –0.05
+0.10
1.8 MAX.
3.0 MAX.
0.5 ± 0.2
0.575 MAX.
0.3
+0.10
–0.05
0.10 M
0.15
1
The major features and applications of the µPB1509GV are descried below.
[Features]
<1>
Small size for space reduction
: 8-pin plastic SSOP (175 mil)
Package size = 3.0 × 3.2 × 1.8 mm
<2>
Low current consumption suitable to battery-driven systems
: 5.0 mATYP at VCC = 3.0 V (4.0 mA at 2.2 V)
<3>
Wider range of power supply voltage allowing flexible designs
: VCC = 2.2 to 5.5 V
<4>
Wider range of operating frequency providing various system configuration options
: fin = 50 MHz to 700 MHz in divide by 2 mode
fin = 50 MHz to 800 MHz in divide by 4 mode
fin = 50 MHz to 1000 MHz in divide by 8 mode
<5>
Selectable divide ratios allowing an optimal response frequency to be specified for succeeding stages
: fout = 25 MHz to 350 MHz in divide by 2 mode
fout = 12.5 MHz to 200 MHz in divide by 4 mode
fout = 6.25 MHz to 125 MHz in divide by 8 mode
[Typical applications]
• Portable radios
• Portable radio communication systems
2.2 Process Technology
The µPB1509GV is manufactured using NEC-proprietary silicon bipolar process technology called NESAT™IV.
This section describes the features of this process.
The cross-sectional drawing of the transistor manufactured using this process is shown in Figure 2-1.
The
following roughly explains the major features of this process.
<1>
A high gain-bandwidth product (fT) is realized by reduction of the emitter junction thickness of the transistor.
(fT = 20 GHz for NESAT™IV and fT = 10 GHz for NESAT™II).
<2>
Low-noise and high-gain operation is realized due to a reduced base resistance and E-B junction
capacitance by minimizing the emitter width and base junction thicknesses of the transistor
(emitter width = 0.6 µm for NESAT™IV and = 1.0 µm for NESAT™II).
<3>
For high reliability such as high moisture proofness, the direct nitride-film construction process is used in
which a nitride film covers the base and emitter surface previously covered by a thin oxide film.
The features of this process realize high-performance ICs having high reliability and electrical characteristics.
Figure 2-2. Cross-Sectional Drawing of Transistor (Elements in IC) using NESAT Process
Base
Emitter
Electrode
Polysilicon
Collector
Nitride film
n
Epitaxial layer
n+ layer
P
Substrate
2
P
n
n
Oxide film
+
P
P–
Channel stopper
2.3 Internal Circuit
Figure 2-3 shows the internal circuit configuration of the µPB1509GV.
The input stage includes an on-chip
amplifier for securing high sensitivity and the output stage amplifier for maintaining a sufficient output level, which
both realize a wide operation range. The frequency divider section consists of three master-slave T-type flip-flop
circuits, each dividing its input frequency by two.
Each block operates as follows. Each flip-flop in the µPB1509GV divides its input frequency at each falling edge
of the input signal from the IN pin (rising edge with the µPB587G). The first stage flip-flop (Divider 1) performs the
divide by 2 operation all the time, while the other two flip-flops are enabled or disabled by the SW1 and SW2 control
signals. When SW1 or SW2 is connected to the VCC1 line, the respective flip-flop passes on its input to the next
stage; when SW1 or SW2 is connected to GND or left unconnected, it divides its input by 2 and passes on the result
to the next stage, which allows users to select a frequency divide ratio from among 2, 4, and 8 according to the
combination of these control signals. The amplifier of the output stage is of the emitter-follower configuration and
provides a stable output level little influenced by the load impedance. For details, refer to 3.2 Load Impedance and
Characteristics.
Figure 2-3. Internal Block Diagram of µPB1509GV
VCC1
IN
IN
VCC2
D
Input
amplifier
Q
CLK
D
CLK
Q
Divider 1
Q
D
Q
Output
amplifier
CLK
Q
Divider 2
Q
Divider 3
SW1
OUT
RF flow
SW2
GND
3
Figure 2-4. Equivalent Circuits of Prescaler’s Internal Blocks
Input amplifier
Output amplifier
8 VCC2
VCC1 1
To divider 1
From
divider 3
IN 2
7 OUT
IN 3
GND 4
4 GND
Divider 1
Dividers 2 or 3 (identical configuration)
SW 1
VCC1 1
VCC1 1
5 or 6
SW 2
To next stageNote
To divider 2
From divider on
previous stage
From input amplifier
GND 4
GND 4
Note To divider 3 if this circuit is divider 2; to the
output amplifier if this circuit is divider 3.
4
2.4 Characteristics and Measurement
(1) Input/output impedance
This section describes the input/output impedance characteristics. As shown in Figure 2-5 (a), the µPB1509GV’s
input impedance against the mixer’s LO input impedance is high enough (higher than 150 Ω) and connecting a
voltage-controlled oscillator (VCO) is considered to cause no problem because the load is negligible in parallel
connection.
The output impedance fluctuates little and provides a stable output due to the emitter-follower circuit output
configuration. As shown in Figure 2-5 (b), the output impedance is between 150 and 200 Ω and assures that the
output amplitude of 0.1 VP-P MIN can be obtained at a load impedance of 200 Ω measured with the test circuit
specified in the Data Sheet.
Note that the test circuit includes a 150 Ω resistor in front of the counter which is synthesized with the instrument
impedance in order to alternatively create a load impedance of 200 Ω. However, this resistor is for measurement
purposes only and is not required in actual applications.
Figure 2-5. Smith Chart for µPB1509GV (VCC1 = VCC2 = 3.0 V, SW1 = SW2 = 3.0 V)
(a) S11 (Input impedance)
S11
REF 1.0 Units/
2
200.0 mUnits/
55.375Ω –142.79Ω
VCC1 = VCC2 = 3.0 V,SW1 = SW2 = 3.0 V
FREQUENCY
MHz
MARKER 2
700.0 MHz
1
2
100.0000
200.0000
300.0000
400.0000
500.0000
600.0000
700.0000
800.0000
900.0000
1000.0000
S11
MAG
· 929
· 898
· 866
· 840
· 834
· 819
· 803
· 792
· 787
· 771
ANG
–6.7
–10.5
–13.6
–15.9
–19.1
–21.9
–24.7
–27.0
–30.0
–32.7
3
START 0.050000000 GHz
STOP 1.000000000 GHz
5
(b) S22 (Output impedance)
S22
REF 1.0 Units
200.0 mUnits/
Z
50 MHz
149.09Ω + j14.86Ω
350 MHz
194.21Ω – j36.64Ω
START
STOP
0.050000000 GHz
0.350000000 GHz
(2) Divide ratio setting pins
Although this IC has a divide ratio selection function (2, 4, or, 8), it is assumed to be used with a fixed ratio.
Because of this, the divide ratio setting pins (SW1 and SW2) are designed so that they are clamped to either
high or low level unlike common prescalers. The SW1 and SW2 pins in the test circuit shown below are
connected to the external switches that clamp these pins high (connected to the VCC1 pin) or low (connected to
the GND or leave OPEN). These external switches are provided to test the operations with all divide ratios. In
application sets that basically do not need to operate with plural ratios, however, connect each SW pin
permanently to either the VCC1 pin or GND pattern (or left OPEN) to fix the ratio.
Therefore, it is recommended that the users specify a divide ratio when designing an application set. The
description “H level = VCC and L level = GND or OPEN” shown in the electrical specifications implies this
recommendation. For your reference, the following table shows the input voltages and sink current values
(design values) for the H and L levels.
Table 2-2. Design Values of Divide Ratio Setting Pins
(TA = −40 to +85 °C, VCC = 2.2 to 5.5 V, for both SW1 and SW2)
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
H level input voltage (SW1, SW2)
VIH1, 2
VCC
−
VCC+0.3
V
L level input voltage (SW1, SW2)
VIL1, 2
GND
−
VCC−1.0
V
H level sink current (SW1, SW2)
IIH1, 2
2.1
4.4
6.4
µA
L level sink current (SW1, SW2)
IIL1, 2
0
0
0
A
Remark
When TA = +25 °C, VCC = 3.0 V
However, in some application circuits, an external logic such as CMOS or TTL controls the switches. In this case,
refer to 3.3 External Control of Divide Ratio Setting Pins.
6
Figure 2-7. Test Circuit for µPB1509GV
Power supply
1000 pF
Output line stray
capacitance: 2 to 3 pF
C1
C7
1
VCC1
VCC2
8
2
IN
OUT
7
High impedance
probeNote 2
Z = 1MΩ //0.6 pF
C2
Oscilloscope
C6
R1Note1
50 Ω
3
SW2
IN
6
C3
Signal
generator
150 Ω
C5
4
SW1
GND
5
50 Ω
Counter
(or spectrum
analyzer)
C4
Equipment
Signal Generator (HP-8665A)
A counter (HP5350B) is used to measure the input sensitivity.
(Alternatively, a spectrum analyzer can be used to monitor the output frequency.)
An oscilloscope is used to monitor the output amplitude.
(When a spectrum analyzer is used to monitor the output power, disconnect the probe of the oscilloscope.)
Divide ratios and pin connections
Parts
SW2
Connected to VCC1
pin
Connected to VCC1
pin
SW1
Connected to
GND or leave
OPEN
Connected to GND
or leave OPEN
1/2
1/4
1/4
1/8
Type
Value
C1 to C7
1000 pF
R1
150 ΩNote 1
[Precautions on measurement]
Notes 1. In the test circuit, set R1 so that R1 + instrument impedance is 200 Ω for the measured IC. R1 is
unnecessary in actual applications.
2. Use an oscilloscope connected with a high-impedance RF probe when measuring the output amplitude
with the test circuit shown in the Data Sheet. If a spectrum analyzer is used to monitor the output
frequency as an alternative for the counter, note that the power level displayed on the analyzer screen
may be lower than the actual value because of the inserted resistor.
On-display decrease ∆ P (dB) = 10 log
R1 + Zme
Zme
where, R1 is the RF resistance to create a pseudo load impedance for the test circuit, and Zme is the instrument impedance.
Because R1 = 150 Ω and Zme = 50 Ω in the test circuit, ∆P = 6 dB.
7
3. APPLICATION CIRCUIT DESIGN EXAMPLES
3.1 Output Amplitude Improvement
If the output amplitude is insufficient when the load is in the high impedance state, pull down the output pin of the
µPB1509GV with a DC resistor, so that the circuit current in the internal output amplifier can be increased as a DC
effect and the output amplitude can be increased. An example of an external circuit connected to the output stage is
shown in Figure 3-1. VCC2 for the internal output amplifier is independent of VCC1. In this case, calculating based on
the internally allowable maximum current, use a pull-down resistor whose resistance Rpd is larger than 200 Ω. (Refer
to the Caution on page 10.)
Figure 3-1. Example of External Circuit for Output Stage
From power supply
VCC2
Divided frequency signal
DC-cut capacitor
OUT
Bias circuit
Load ZL
OUT
Pull-down resistor Rpd
(DC effect)
Vout (VP-P) = 2 2 × Po (W) × ZL (Ω)
If Rpd is not included,
At ZL = 200 Ω, since Vout = 0.1 VP-P MIN.,
Po = 6.25 × 10–6 W MIN (= –22 dBm)
∴ Vout = 7.1 × 10–3 ZL VP–P MIN
<1> If ZL ≥ 400 Ω, then the output compression
will be entered.
<2> If Rpd is included, the underlined value
increases according to the circuit current
increase.
GND
IC
When an external DC pull-down resistor increases the current of output amplifier, the output impedance becomes
40 to 50 Ω, as shown in Figure 3-2. In this case, however, there is no change in the input impedance of the input
amplifier since the current increased flows only on the output stage.
You should note that this pull-down resistor is different from the RF resistor (for load impedance) that appears in
the Data Sheet.
Figure 3-2. Output Impedance Change by Output Pin’s Pull-Down Resistor
(VCC1 = VCC2 = 3.0 V, SW1 = SW2 = 3.0 V)
Ω
Pull-Down Resistor Rpd = 1.2 kΩ
Z
S22
REF 1.0 Units/
2 200.0 mUnits/
43.428 Ω 25.484 Ω
MARKER 2
350 MHz
2
1
START 0.050000000 GHz
STOP 0.350000000 GHz
8
[Pull-Down Resistor on Output Pin to Increase Output Amplitude]
An effective way to increase the output amplitude is to increase the circuit current of the internal output stage by
connecting a DC pull-down resistor to the emitter-follower output pin. The µPB1509GV, however based on the
maximum allowable current of the internal circuits, connect a DC pull-down resistor of 200 Ω MIN to the output pin
(1.2 kΩ MIN with the µPB587G).
A supplementary explanation follows. In the case of the test circuit shown in the Data Sheet, the specification of
the output amplitude is defined on the load impedance of 200 Ω. Therefore, due to the 1.2 kΩ pull-down resistor
connection, the circuit current is increased by 2 mA at VCC = 3.0 V and output amplitude by about 0.3 VP-P, compared
with the above-mentioned test circuit. In addition to this DC effect, the pull-down resistor has the following secondary
effect: although the characteristic impedance of the output pin in the RF range is decreased, this enables to drive a
high-impedance device while maintaining a large amplitude.
Therefore, in actual application sets, you should check first the output amplitude under the load condition of the
application set without connecting the pull-down resistor, then adjust the increase in the circuit current with the pulldown resistor connected.
3.2 Load Impedance and Characteristics
This IC assures that the output amplitude with a load of 200 Ω is 0.1 VP-P MIN. However, this means that ZL = 200
Ω at output amplitude measurement is assumed, not that the recommended load impedance is 200 Ω. If a highimpedance CMOS IC is connected to the following stage, the output amplitude becomes large proportionally to the
load impedance value of the connected IC, and saturates at 1 kΩ or larger. Figure 3-3 shows the load impedance
dependency of output amplitude for each pull-down resistor value (Rpd), and Figure 3-4 shows the circuit current
dependency of output amplitude (resulting from output pin pull-down resistor) for each load impedance value.
Figure 3-3. Output Amplitude vs. Pull-Down Resistor and Load Impedance
1
TA = +25 C. VCC = 3.0 V
fin = 408 MHz. Pin = –20 dBm
Divide ratio ÷ 4
Output amplitude VOUT (VP-P)
0.9
0.8
0.7
Rpd = 200 Ω
0.6
Rpd = 1.2 kΩ
0.5
0.4
Rpd = •
0.3
0.2
0.1
0
0
500
1000
1500
2000
2500
Load impedance ZL (Ω)
Table 3-1. Relationship between Output Amplitude and Load Impedance
(Underlined values are empirical data for reference only)
Pull-Down Resistor Rpd
Relationship (Approximate Value in Linear Area)
ICC Flowing due to Pull-Down Resistor
200 Ω
Output saturation area irrespective of ZL
ICC = 14.1 mA
1.2 kΩ
Vout = 0.031 √ ZL (VP-P) @ZL < 360 Ω
ICC = 7.2 mA
∞ (without Rpd)
Vout = 0.01 √ ZL (VP-P) @ZL < 400 Ω
ICC = 5.4 mA
9
Figure 3-4. Output Amplitude vs. Load Impedance and Circuit Current Dependency
Output amplitude VOUT (VP-P)
1
TA = +25 C. VCC = 3.0 V
0.9 fin = 408 MHz. Pin = –20 dBm
Divide ratio ÷ 4
0.8
ZL = 1250 Ω
0.7
0.6
ZL = 200 Ω
0.5
0.4
ZL = 50 Ω
0.3
0.2
0.1
0
Caution
0
2
4
6
8
10
12
14
16
Circuit current due to pull-down resistor ICC (mA)
The external resistor on the output line works in the DC range if located closer than the DC-cut
capacitor to the µPB1509GV. As in the test circuit, however, the external resistor located farther
than the DC-cut capacitor works in the RF range. Note that the 150 Ω external resistor R1 on the
test circuit in Figure 2-7 is a test-purpose pseudo impedance element adjusting the load
impedance, and is not required in actual application circuits.
3.3 External Control of Divide Ratio Setting Pins
SW1 and SW2 of this IC allow users to select a divide ratio from among 2, 4, and 8. By leaving these pins OPEN
or connected to GND or VCC1 via the mounting pattern, and whether two internal frequency dividers are enabled or
disabled, the combination of those determines a fixed divide ratio. On the other hand, some user’s applications may
need to switch divide ratio – from 2 to 4 and vice versa, for example – according to the input frequency changes.
However, since the divide ratio of this IC is not intended to be controlled by external ratio switching logics, the lowlevel range of SW pins themselves is wide and the high-level range is narrow. (Refer to Table 2-2. Design Values
of Divide Ratio Setting Pins.) Therefore, it is difficult to change the divide ratio by controlling the voltage applied to
these pins from a simply connected CMOS logic because the threshold voltage of SW pins is VCC – 1.0 V to VCC (V).
To adjust this H/L threshold level, connect external resistors to the SW pins as shown in Figure 3-5 for example,
where a pull-up resistor and a series resistor are externally connected. These external resistors and the internal
elements together configure the switching circuit. The control voltage range with the external resistors is shown in
Table 3-2.
Figure 3-5. Application Circuit Example for Divide Ratio Control Voltage Range Adjustment by Connecting
External Resistors to SW Pin
From power supply
VCC1
C1
To divider
2 or 3
3 kΩ
SW
IC
10
VIH or VIL
20 kΩ
Table 3-2. Adjustment of External Control Voltage for Divide Ratio by Connecting External Resistors
(TA = −40 to +85 °C, VCC = 2.2 to 5.5 V)
Parameter
Symbol
MIN.
MAX.
Unit
H level at { point
VIH
VCC − 0.2
VCC + 0.5
V
L level at { point
VIL
−0.2
VCC × 0.4
V
4. SYSTEM EXAMPLE
4.1 Calculation of Count Number and Step Frequency for Prescaler PLL
The response frequency of the on-chip PLL frequency synthesizer (fsynth) in CMOS ICs such as the 17K Series is
around 100 MHz even the highest. Therefore, for use in the VHF to UHF bands, the prescaler PLL method should be
adopted in which the VCO oscillation frequency (fVCO) of the local output is divided by a fixed-ratio prescaler before
entering the frequency synthesizer. If this method is used, the count number can be expressed as follows since the
system’s step frequency (fstep) is divide-ratio times the phase comparison frequency (fr) of the frequency synthesizer.
fr =
fstep
P
(Hz)
N : N count number of the following-stage frequency synthesizer
fVCO
fxtal
=
= fr
R
P×N
(Hz)
fVCO = P × fsynth
∴
P : Divide number of the prescaler
R : Reference count number of the following-stage frequency synthesizer
fxtal : Reference oscillation frequency
fVCO
fstep
fsynth
fxtal
=
=
=
R
P
N
P×N
Therefore,
Relationship between divide number of the prescaler and count numbers of the
following-stage frequency synthesizer (Figure 4-1 case)
N=
fVCO
······················ N count number of prescaler side
fstep
R=
P × fxtal
················· Reference count number of reference X’tal oscillator side
fstep
11
Figure 4-1. Configuration in Prescaler PLL Method
Following-stage frequency synthesizer
Prescaler
µ PB1509GV
Switching between P and P+1
Load signal
fvco
fsyn
Local
output
Control
voltage
Main
counter
÷M
2-modulus
prescaler
÷ P/ ÷ P+1
Swallow
counter
÷S
Phase
frequency
comparator
From reference
counter
Pulse swallow counter
Low-pass filter
Since P = 2, 4, or 8, the step frequency is 2, 4, or 8 times the phase comparison frequency because the phase
comparison frequency (fr) and the step frequency (fstep) have the relationship: fstep = P × fr.
5. CONCLUSION
The above sections described the usage of the µPB1509GV prescaler IC which is applicable for the prescaler
between a local oscillator and a frequency synthesizer in portable radio systems. We believe that it is understood
from this document that this IC provides a flexible design because the interface levels can be adjusted externally.
Reference documents:
• µPB1509GV Data Sheet (Document number: P10769E)
• µPB587G Data Sheet (Document number: IC-7566A)
• Fundamentals of Frequency Synthesizer Employing PLL (Document number: P12196E)
12
Facsimile Message
From:
Name
Company
Tel.
Although NEC has taken all possible steps
to ensure that the documentation supplied
to our customers is complete, bug free
and up-to-date, we readily accept that
errors may occur. Despite all the care and
precautions we’ve taken, you may
encounter problems in the documentation.
Please complete this form whenever
you’d like to report errors or suggest
improvements to us.
FAX
Address
Thank you for your kind support.
North America
Hong Kong, Philippines, Oceania
NEC Electronics Inc.
NEC Electronics Hong Kong Ltd.
Corporate Communications Dept. Fax: +852-2886-9022/9044
Fax: 1-800-729-9288
1-408-588-6130
Korea
Europe
NEC Electronics Hong Kong Ltd.
NEC Electronics (Europe) GmbH
Seoul Branch
Technical Documentation Dept.
Fax: 02-528-4411
Fax: +49-211-6503-274
South America
NEC do Brasil S.A.
Fax: +55-11-889-1689
Asian Nations except Philippines
NEC Electronics Singapore Pte. Ltd.
Fax: +65-250-3583
Japan
NEC Corporation
Semiconductor Solution Engineering Division
Technical Information Support Dept.
Fax: 044-548-7900
Taiwan
NEC Electronics Taiwan Ltd.
Fax: 02-719-5951
I would like to report the following error/make the following suggestion:
Document title:
Document number:
Page number:
If possible, please fax the referenced page or drawing.
Document Rating
Excellent
Good
Acceptable
Poor
Clarity
Technical Accuracy
Organization
CS 96.8