Target Specifications Datasheet RJF0610JSP R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 Silicon N Channel MOS FET Series Power Switching Description This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc.. Features Logic level operation (5 to 6 V Gate drive). Built-in the over temperature shut-down circuit. High endurance capability against to the short circuit. Temperature hysteresis type. High density mounting Power supply voltage applies 12 V and 24 V. AEC-Q101 Compliant Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 <FP-8DAV> ) 87 65 12 1, 3 2, 4 5, 6, 7, 8 34 D Source Gate Drain 2 G Temperature Sensing Circuit Self Return Circuit 8 G Gate Shut-down Circuit Temperature Sensing Circuit Self Return Circuit S 6 Current Limitation Circuit Gate Resistor Gate Shut-down Circuit 1 MOS1 D 5 4 Current Limitation Circuit Gate Resistor D D 7 3 S MOS2 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Drain to source voltage VDSS 60 Gate to source voltage VGSS 16 Gate to source voltage VGSS –2.5 Note4 Drain current ID 1.5 Body-drain diode reverse drain current IDR 1.5 Note 3 Avalanche current IAP 0.95 Note 3 Avalanche energy EAR 77.4 Note 1 Channel dissipation Pch 2 Note 2 Channel dissipation Pch 3 Channel temperature Tch 150 Storage temperature Tstg –55 to +150 Notes: 1. 1 Drive operation: When using the glass epoxy board (FR4 40 40 1.6 mm), PW 10 s 2. 2 Drive operation: When using the glass epoxy board (FR4 40 40 1.6 mm), PW 10 s 3. Tch = 25C, Rg 50 , L = 100 mH 4. It provides by the current limitation lower bound value. R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 Unit V V V A A A mJ W W C C Page 1 of 7 RJF0610JSP Target Specifications Typical Operation Characteristics (Ta = 25°C) Item Input voltage Input current (Gate non shut down) Symbol VIH VIL IIH1 IIH2 Min 3.5 — — — — — — — — — 3.5 1.5 IIL Input current (Gate shut down) IIH(sd)1 IIH(sd)2 Shut down temperature Return temperature Gate operation voltage IIH(sd)3 Tsd Thr Vop Drain current (Current limitation value) ID limit Typ — — — — — 0.4 0.24 0.16 175 120 — — Max — 1.2 100 50 1 — — — — — 12 — Unit V V A A A mA mA mA C C V A Test Conditions Vi = 5 V, VDS = 0 Vi = 3.5 V, VDS = 0 Vi = 1.2 V, VDS = 0 Vi = 8 V, VDS = 0 Vi = 5 V, VDS = 0 Vi = 3.5 V, VDS = 0 Channel temperature Channel temperature VGS = 5 V, VDS = 10 V Note 5 Notes; 5. Pulse test Electrical Characteristics (Ta = 25°C) Item Symbol ID1 ID2 ID3 V(BR)DSS V(BR)GSS V(BR)GSS IGSS1 IGSS2 IGSS3 IGSS4 IGS(OP)1 IGS(OP)2 IGS(OP)3 IDSS1 IDSS2 Min — — 1.5 60 16 –2.5 — — — — — — — — — Typ — — — — — — — — — — 0.4 0.24 0.16 — — Max 2.4 10 — — — — 100 50 1 –100 — — — 10 10 Unit A mA — V V V A A A A mA mA mA A A Gate to source cutoff voltage VGS(off) 1.4 — 2.5 V Static drain to source on state resistance RDS(on) — — — — — — — — — 207 153 267 4.3 18.3 0.62 0.61 0.8 55 285 214 — — — — — — — m m pF s s s s V ns — — 18 5.7 — — ms ms Drain current Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Input current (shut down) Zero gate voltage drain current Output capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Over load shut down Note 7 operation time RDS(on) Coss td(on) tr td(off) tf VDF trr tos1 tos2 Test Conditions VGS = 3.5 V, VDS = 2 V VGS = 1.2 V, VDS = 2 V VGS = 5 V, VDS = 10 V Note 6 ID = 10 mA, VGS = 0 IG = 500 A, VDS = 0 IG = –100 A, VDS = 0 VGS = 5 V, VDS = 0 VGS = 3.5 V, VDS = 0 VGS = 1.2 V, VDS = 0 VGS = –2.4 V, VDS = 0 VGS = 8 V, VDS = 0 VGS = 5 V, VDS = 0 VGS = 3.5 V, VDS = 0 VDS = 60 V, VGS = 0 VDS = 48 V, VGS = 0, Ta = 125C ID = 1 mA, VDS = 10 V ID = 0.7 A, VGS = 5 V Note 6 ID = 0.7 A, VGS = 10 V Note 6 VDS = 10 V, VGS = 0, f = 1MHz ID= 0.7 A, VGS = 5 V, RL = 43 IF = 1.5 A, VGS = 0 IF = 1.5 A, VGS = 0 diF/dt = 50 A/s VGS = 5 V, VDD = 16 V VGS = 5 V, VDD = 24 V Notes: 6. Pulse test 7. Including the junction temperature rise of the over loaded condition. R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 Page 2 of 7 RJF0610JSP Target Specifications Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 100 3.0 ID (A) Test Condition: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW < 10 s Ta = 25°C 1 shot pulse 1 Drive Operation 10 Drain Current iv Dr 2.0 e Dr ive 1.0 Op er ion at er Op 1 at ion 0 50 100 150 DC 200 PW Op er 0.1 10 m s m s ion (P W Operation in this area is limited by RDS (on) 0.01 = at 0.1 0.001 0.01 0 Thermal shut down Operation area 1 1 2 Channel Dissipation Pch (W) 4.0 1 ≤ 10 No te s) 7 10 100 Drain to Source Voltage VDS (V) Ambient Temperature Ta (°C) Note 7: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) Typical Output Characteristics 5 1.5 Pulse Test 8, 10 V Tc = –40°C 6V 4 ID (A) ID (A) Typical Transfer Characteristics 5V 25°C 75°C 1.0 2 4V 3.5 V 1 Drain Current Drain Current 3 VDS = 10 V Pulse Test VGS = 0 V 0 0 2 4 6 Drain to Source Voltage 8 0 10 0 Pulse Test 400 ID = 1 A 0.7 A 0.2 A 0 0 2 4 6 8 10 Gate to Source Voltage VGS (V) R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 2 3 4 5 6 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (mΩ) Drain to Source Saturation Voltage VDS (on) (mV) 600 1 Gate to Source Voltage VDS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage 200 0.5 10000 1000 VGS = 5 V 100 10 V Pulse Test 10 0.1 0.2 0.5 1 2 Drain Current 5 10 20 ID (A) Page 3 of 7 Target Specifications Body-Drain Diode Reverse Recovery Time Static Drain to Source on State Resistance vs. Temperature 400 Reverse Recovery Time trr (ns) Static Drain to Source on State Resistance RDS (on) (mΩ) RJF0610JSP Pulse Test ID = 0.2, 0.7, 1 A 300 VGS = 5 V 200 ID = 0.2, 0.7, 1 A 10 V 100 –50 –25 0 25 50 100 10 di / dt = 50 A / μs VGS = 0, Ta = 25°C 1 0.1 75 100 125 150 Case Temperature 1000 Tc (°C) Reverse Drain Current IDR (A) Switching Time t (μs) 1.5 tr 10 td(on) tf td(off) 1 Drain Current VGS = 5 V 1 0.5 0 10 VGS (V) VGS = 0 f = 1 MHz Gate to Source Voltage 1000 100 10 20 30 40 50 60 Drain to Source Voltage VDS (V) R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 0.4 0.6 0.8 2.0 Gate to Source Voltage vs. Shutdown Time of Load-Short Test 10000 10 0.2 Source to Drain Voltage VSD (V) ID (A) Typical Capacitance vs. Drain to Source Voltage Capacitance C (pF) Pulse Test 0 0.1 0.1 0 IDR (A) Reverse Drain Current vs. Source to Drain Voltage VGS = 5 V, VDD = 30 V PW = 300 μs, duty ≤ 1 % 1 10 Reverse Drain Current Switching Characteristics 100 1 12 10 8 VDD = 16 V 24 V 6 4 2 0 1 10 100 Shutdown Time of Load-Short Test PW (mS) Page 4 of 7 RJF0610JSP Target Specifications Shutdown Case Temperature Tc (°C) Shutdown Case Temperature vs. Gate to Source Voltage 200 180 160 140 120 ID = 0.2 A 100 0 2 4 6 8 Gate to Source Voltage 10 VGS (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 10 1 D=1 0.5 0.1 0.2 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 125°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 D= PDM e uls tp 0.001 ho 1s 0.0001 10 μ PW T PW T 100 μ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10 1 D=1 0.5 0.1 0.2 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 166°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 0.001 0.0001 10 μ t ho 1s 100 μ D= PDM e ls pu PW T PW T 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 Page 5 of 7 RJF0610JSP Target Specifications Avalanche Test Circuit Avalanche Waveform L V DS Monitor 1 2 • L • I AP • 2 EAR = VDSS VDSS – V DD I AP Monitor V (BR)DSS I AP Rg D. U. T V DS VDD ID Vin 5V 50Ω 0 VDD Switching Time Test Circuit Waveform 90% Vout Monitor Vin Monitor D.U.T. Vin 10% RL Vout Vin 5V 50 Ω VDD = 30 V 10% 90% td(on) R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 10% tr 90% td(off) tf Page 6 of 7 RJF0610JSP Target Specifications Package Dimensions JEITA Package Code P-SOP8-3.95 × 4.9-1.27 RENESAS Code PRSP0008DD-D Previous Code FP-8DAV MASS[Typ.] 0.085g F Package Name SOP-8 *1 D bp 1 c *2 E Index mark HE 5 8 4 Z Terminal cross section (Ni/Pd/Au plating) * 3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol D E A2 A1 A bp b1 c c1 A1 A L1 L y HE e x y Z L L1 Detail F Dimension in Millimeters Min Nom Max 4.90 5.3 3.95 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 5.80 6.10 6.20 1.27 0.25 0.1 0.75 0.40 0.60 1.27 1.08 Ordering Information Orderable Part Number RJF0610JSP-00#J0 R07DS0568EJ0200 Rev.2.00 Apr 16, 2012 Quantity 2500 pcs Shipping Container Taping (Reel) Page 7 of 7 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. 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