RICHTEK RT8223L

RT8223L/M
High Efficiency, Main Power Supply Controller
for Notebook Computer
General Description
Features
The RT8223L/M is a dual step-down, switch-mode power
supply controller generating logic-supply voltages in
battery-powered systems. It includes two Pulse Width
Modulation (PWM) controllers adjustable from 2V to 5.5V,
and also features fixed 5V/3.3V linear regulators. Each
linear regulator provides up to 100mA output current with
automatic linear regulator bootstrapping to the PWM
outputs. The RT8223L/M includes on-board power up
sequencing, a power good output, internal soft-start, and
soft-discharge output that prevents negative voltage during
shutdown.
z
The constant on-time PWM scheme can operate without
sense resistors and provide 100ns load transient response
while maintaining nearly constant switching frequency. To
eliminate noise in audio applications, an ultrasonic mode
is included, which maintains the switching frequency
above 25kHz. Moreover, the diode-emulation mode
maximizes efficiency for light load applications. The
RT8223L/M is available in a WQFN-24L 4x4 package.
z
z
z
z
z
z
z
z
z
z
z
z
z
Constant On-time Control with 100ns Load Step
Response
Wide Input Voltage Range : 6V to 25V
Dual Adjustable Outputs from 2V to 5.5V
Fixed 3.3V and 5V LDO Output : 100mA
2V Reference Voltage
Frequency Selectable via TONSEL Setting
4700ppm/°°C RDS(ON) Current Sensing
Programmable Current Limit Combined with
Enable Control
Selectable PWM, DEM, or Ultrasonic Mode
Internal Soft-Start and Soft-Discharge
High Efficiency up to 97%
5mW Quiescent Power Dissipation
Thermal Shutdown
RoHS Compliant and Halogen Free
Applications
z
z
Notebook and Sub-Notebook Computers
3-Cell and 4-Cell Li+ Battery-Powered Devices
Ordering Information
RT8223
Package Type
QW : WQFN-24L 4x4 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Pin Function
L : Default
M : With ENC
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
DS8223L/M-04 April 2011
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1
RT8223L/M
Marking Information
RT8223LGQW
RT8223MGQW
EP= : Product Code
EP=YM
DNN
EQ= : Product Code
YMDNN : Date Code
EQ=YM
DNN
RT8223LZQW
RT8223MZQW
EP : Product Code
EP YM
DNN
YMDNN : Date Code
EQ : Product Code
YMDNN : Date Code
EQ YM
DNN
YMDNN : Date Code
Pin Configurations
VOUT1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
VOUT1
PGOOD
BOOT1
UGATE1
PHASE1
LGATE1
(TOP VIEW)
24 23 22 21 20 19
ENTRIP1
FB1
REF
TONSEL
FB2
ENTRIP2
18
2
17
3
16
GND
4
15
25
5
6
14
13
9 10 11 12
ENTRIP1
FB1
REF
TONSEL
FB2
ENTRIP2
1
18
2
17
3
16
GND
4
15
25
5
6
14
13
7
8
ENC
VREG5
VIN
GND
SKIPSEL
EN
9 10 11 12
VOUT2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
8
NC
VREG5
VIN
GND
SKIPSEL
EN
VOUT2
VREG3
BOOT2
UGATE2
PHASE2
LGATE2
7
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2
24 23 22 21 20 19
1
WQFN-24L 4x4
WQFN-24L 4x4
RT8223L
RT8223M
DS8223L/M-04 April 2011
RT8223L/M
Typical Application Circuit
R8
3.9
C1
10µF
C10
0.1µF
Q1
BSC119
N03S
C3
220µF
R5
C4
R4 0
RBOOT1 0
RT8223L
UGATE2 10
16 VIN
BOOT2
PHASE2 11
22 BOOT1
LGATE2 12
C19
0.1µF
20 PHASE1
VOUT2 7
5
FB2
19 LGATE1
Q3
BSC119
N03S
R12
15k
ENTRIP1 1
ENTRIP2
VREF
2V
R13
10k
2 FB1
3 REF
C15
0.22µF
GND
Frequency Control
4 TONSEL
PWM/DEM/Ultrasonic
14 SKIPSEL
13 EN
ON
6
C10
0.1µF
R4 0
C2
0.1µF
L1
6.8µH
VOUT1
5V
C3
220µF
R5
C4
0
C19
0.1µF
UGATE2 10
C9
4.7µF
C15
0.22µF
LGATE2 12
2 FB1
3 REF
4 TONSEL
PWM/DEM/Ultrasonic
14 SKIPSEL
13 EN
OFF
ON
OFF
DS8223L/M-04 April 2011
C14
C21
R14
6.5k
C20
0.1µF
R15
10k
5V Always On
R6
100k
3.3V Always On
C16
4.7µF
R10
0
Q2
BSC119
N03S
0
C11
0.1µF
VOUT2 7
5
FB2
ENTRIP1 1
18 ENC
GND
6
C13
10µF
C12
10µF
L2
4.7µH
Q4
BSC119
N03S
GND 15
Frequency Control
ON
C17
220µF
PGOOD Indicator
RBOOT2
22 BOOT1
19 LGATE1
VREF
2V
9
PHASE2 11
ENTRIP2
R13
10k
VOUT2
3.3V
R11
RILIM2
150k
PGOOD 23
VREG3 8
21 UGATE1
20 PHASE1
R12
15k
L2
4.7µH
RILIM1
150k
VREG5 17
BOOT2
24 VOUT1
C18
C12
10µF
25 (Exposed Pad)
RT8223M
16 VIN
RBOOT1
Q3
BSC119
N03S
C13
10µF
VIN
6V to 25V
R8
3.9
Q1
BSC119
N03S
C11
0.1µF
Q4
BSC119
N03S
OFF
C1
10µF
Q2
BSC119
N03S
0
RBOOT2
21 UGATE1
24 VOUT1
C18
9
R10
0
GND 15
C2
0.1µF
L1
6.8µH
VOUT1
5V
VIN
6V to 25V
VOUT2
3.3V
C17
220µF
R11
C14
R14
6.5k
RILIM1
150k
R15
10k
RILIM2
150k
C21
C20
0.1µF
25 (Exposed Pad)
VREG5 17
PGOOD 23
VREG3 8
C9
4.7µF
5V Always On
R6
100k
PGOOD Indicator
C16
4.7µF
3.3V Always On
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3
RT8223L/M
Functional Pin Description
Pin No.
Pin Name
Pin Function
Channel 1 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 1 synchronous RDS(ON) sense. The GND − PHASE1
current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.515V to 3V
range. There is an internal 10μA current source from VREG5 to ENTRIP1. Leave
ENTRIP1 floating or drive it above 4.5V to shut down channel 1.
SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from VOUT1
to GND to adjust output from 2V to 5.5V.
1
ENTRIP1
2
FB1
3
REF
2V Reference Output. Bypass to GND with a minimum 0.22μF capacitor. REF can
source up to 100μA for external loads. Loading REF degrades FBx and output
accuracy according to the REF load-regulation error.
4
TONSEL
Frequency Selectable Input for VOUT1/VOUT2 respectively.
400kHz/500kHz : Connect to VREG5 or VREG3
300kHz/375kHz : Connect to REF
200kHz/250kHz : Connect to GND
5
FB2
6
ENTRIP2
7
VOUT2
8
VREG3
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
13
EN
14
SKIPSEL
16
VIN
17
VREG5
18
NC
(RT8223L)
ENC
(RT8223M)
19
LGATE1
SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from VOUT2
to GND to adjust output voltage from 2V to 5.5V.
Channel 2 Enable and Current Limit Setting Input. Connect a resistor to GND to
set the threshold for channel 2 synchronous RDS(ON) sense. The GND − PHASE2
current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.515V to 3V
range. There is an internal 10μA current source from VREG5 to ENTRIP2. Leave
ENTRIP1 floating or drive it above 4.5V to shut down channel 2.
Bypass Pin for SMPS2. Connect to the SMPS2 output to bypass efficient power
for VREG3 pin. VOUT2 is also for the SMPS2 output soft-discharge.
3.3V Linear Regulator Output.
Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor
according to the typical application circuits.
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
BOOT2.
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the
UGATE2 high side gate driver. PHASE2 is also the current-sense input for the
SMPS2.
Lower Gate Driver Output for SMPS2. LGATE2 swings between GND and
VREG5.
Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic
high level and disabled if it is less than the logic low level.
Operation Mode Selectable Input.
Connect to VREG5 or VREG3 : Ultrasonic Mode
Connect to REF : PWM Mode
Connect to GND : DEM Mode
Supply Input for 5V/3.3V LDO and Feed Forward On-Time circuitry.
5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate
driver and analog supply voltage for the device.
No Internal Connection.
SMPS Enable Input. Pull up to VREG3 or VREG5 to turn on both switch channels.
Short to GND to shutdown them.
Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and
VREG5.
To be continued
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4
DS8223L/M-04 April 2011
RT8223L/M
Pin No.
Pin Name
20
PHASE1
21
UGATE1
22
BOOT1
23
PGOOD
24
VOUT1
15,25
GND
(Exposed Pad)
Pin Function
Switch Node for SMPS1. PHASE1 is the internal lower supply rail for the
UGATE1 high side gate driver. PHASE1 is also the current-sense input for the
SMPS1.
Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and
BOOT1.
Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor
according to the typical application circuits.
Power Good Output for Channel 1 and Channel 2. (Logical AND).
Bypass Pin for SMPS1. Connect to the SMPS1 output to bypass efficient power
for VREG5 pin. VOUT1 is also for the SMPS1 output soft-discharge.
Ground for SMPS Controller. The exposed pad must be soldered to a large PCB
and connected to GND for maximum power dissipation.
Function Block Diagram
TONSEL SKIPSEL
BOOT1
BOOT2
UGATE1
UGATE2
PHASE1
VREG5
PHASE2
VREG5
LGATE1
VREG5
SMPS1
PWM Buck
Controller
SMPS2
PWM Buck
Controller VREG5
LGATE2
10µA
10µA
FB1
VOUT2
FB2
ENTRIP2
ENTRIP1
EN
ENC
Power-On
Sequence
Clear Fault Latch
SW5 Threshold
PGOOD
SW3 Threshold
GND
VOUT1
Thermal
Shutdown
VREG3
VREG5
VREG5
REF
VREG3
VIN
REF
DS8223L/M-04 April 2011
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5
RT8223L/M
Absolute Maximum Ratings
(Note 1)
VIN, EN to GND ------------------------------------------------------------------------------------------------PHASEx to GND
DC -----------------------------------------------------------------------------------------------------------------< 20ns -----------------------------------------------------------------------------------------------------------z BOOTx to PHASEx -------------------------------------------------------------------------------------------z ENTRIPx, SKIPSEL, TONSEL, PGOOD to GND ------------------------------------------------------z VREG5, VREG3, FBx , VOUTx, ENC, REF to GND -------------------------------------------------z UGATEx to PHASEx
DC -----------------------------------------------------------------------------------------------------------------< 20ns -----------------------------------------------------------------------------------------------------------z LGATEx to GND
DC -----------------------------------------------------------------------------------------------------------------< 20ns -----------------------------------------------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C
WQFN-24L 4x4 ------------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 2)
WQFN-24L 4x4, θJA -------------------------------------------------------------------------------------------WQFN-24L 4x4, θJC ------------------------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------z Junction Temperature -----------------------------------------------------------------------------------------z Storage Temperature Range --------------------------------------------------------------------------------z ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------z
−0.3V to 30V
z
Recommended Operating Conditions
z
z
z
−0.3V to 30V
−8V to 38V
−0.3V to 6V
−0.3V to 6V
−0.3V to 6V
−0.3V to (VREG5 + 0.3V)
−5V to 7.5V
−0.3V to (VREG5 + 0.3V)
−2.5V to 7.5V
1.923W
52°C/W
7°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Voltage, VIN -------------------------------------------------------------------------------------------- 6V to 25V
Junction Temperature Range --------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range --------------------------------------------------------------------------------- −40°C to 85°C
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6
DS8223L/M-04 April 2011
RT8223L/M
Electrical Characteristics
(VIN = 12V, VEN = VENC = 5V, VENTRIP1 = VENTRIP2 = 2V, No Load, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
VIN = 6V to 25V, ENTRIPx = GND
--
200
--
μA
VIN Shutdown Supply
IVIN_SHDN
Current
VIN = 6V to 25V,
ENTRIPx = EN = GND
--
20
40
μA
Quiescent Power
Consumption
Both SMPS On, V FBx = 2.1V,
SKIPSEL = GND, V OUT1 = 5V, VOUT2 = 3.3V
(Note 5)
--
5
7
mW
1.975
2
2.025
--
2
--
Ultrasonic Mode
--
2.032
--
SMPS1, SMPS2
2
--
5.5
V
VOUTx = 0.5V, VENTRIPx = 0V
10
45
--
mA
VOUT1 = 5.05V (200kHz)
1895
2105
2315
VOUT2 = 3.33V (250kHz)
999
1110
1221
VOUT1 = 5.05V (300kHz)
1227
1403
1579
VOUT2 = 3.33V (375kHz)
647
740
833
VOUT1 = 5.05V (400kHz)
895
1052
1209
VOUT2 = 3.33V (500kHz)
475
555
635
VFBx = 1.9V
200
300
400
ns
SKIPSEL = VREG5 or VREG3
22
33
--
kHz
--
2
--
ms
9.4
10
10.6
μA
--
4700
--
ppm/°C
VENTRIPx = IENTRIPx x RENTRIPx
--
--
3
V
GND − PHASEx, V ENTRIPx = 2V
180
200
220
mV
--
3
--
mV
Input Supply
VIN Standby Current
IVIN_SBY
P VIN
+PPVCC
SMPS Output and FB Voltage
DEM Mode
FBx Voltage
V FBx
Output Voltage Adjust
V OUTx
Range
VOUTx Discharge
Current
On-Time
PWM Mode
(Note 6)
TONSEL =
GND
On-Time Pulse Width
tON
TONSEL = REF
TONSEL =
VREG5
Minimum Off-Time
Ultrasonic Mode
Frequency
Soft-Start
tOFF
Soft-Start Time
tSSx
Internal Soft-Start
IENTRIPx
VENTRIPx = 0.9V
Current Sense
ENTRIPx Source
Current
ENTRIPx Current
Temperature
Coefficient
ENTRIPx Adjustment
Range
Current Limit
Threshold
Zero-Current
Threshold
TCIENTRIPx In Comparison with 25°C
GND − PHASEx in DEM
(Note 6)
V
ns
To be continued
DS8223L/M-04 April 2011
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7
RT8223L/M
Parameter
Symbol
Test Conditions
Min
Typ
Max
4.8
5
5.2
4.75
5
5.25
4.75
5
5.25
VOUT2 = GND, IVREG3 < 100mA
3.2
3.33
3.46
VOUT2 = GND, 6.5V < VIN < 25V,
IVREG3 < 100mA
3.13
3.33
3.5
VOUT2 = GND, 5.5V < VIN < 25V,
IVREG3 < 50mA
3.13
3.33
3.5
Unit
Internal Regulator and Reference
VOUT1 = GND, IVREG5 < 100mA
VREG5 Output Voltage
VREG3 Output Voltage
VVREG5
VVREG3
VOUT1 = GND, 6.5V < VIN < 25V,
IVREG5 < 100mA
VOUT1 = GND, 5.5V < VIN < 25V,
IVREG5 < 50mA
V
V
VREG5 Output Current
IVREG5
VVREG5 = 4.5V, VOUT1 = GND
100
175
250
mA
VREG3 Output Current
IVREG3
VVREG3 = 3V, VOUT2 = GND
100
175
250
mA
VREG5 Switch-over
Threshold to VOUT1
VSW5
VOUT1 Rising Edge
4.6
4.75
4.9
V
VOUT1 Falling Edge
4.3
4.4
4.5
V
VREG3 Switch-over
Threshold to VOUT2
VSW3
VOUT2 Rising Edge
2.975
3.125
3.25
V
VOUT2 Falling Edge
2.775
2.875
2.975
V
--
1.5
3
Ω
VREGx Switch-over
Equivalent Resistance
REF Output Voltage
RSWx
VREGx to VOUTx, 10mA
VREF
No External Load
1.98
2
2.02
V
REF Load Regulation
0 < ILOAD < 100μA
--
10
--
mV
REF Sink Current
REF in Regulation
5
--
--
μA
Rising Edge
--
4.2
4.45
Falling Edge
3.7
3.9
4.1
SMPSx off
--
2.5
--
PGOOD Detect, FBx falling Edge
82
85
88
Hysteresis, Rising Edge with SS Delay
Time
--
6
--
PGOOD Propagation
Delay
Falling Edge, 50mV Overdrive
--
10
--
μs
PGOOD Leakage Current
High State, Forced to 5.5V
--
--
1
μA
PGOOD Output Low
Voltage
ISINK = 4mA
--
--
0.3
V
109
112
116
%
FBx = 2.35V
--
5
--
μs
UVP Detect, FBx Falling Edge
49
52
56
%
UVLO
VREG5 Under Voltage
Lockout Threshold
VREG3 Under Voltage
Lockout Threshold
V
V
Power Good
PGOOD Threshold
%
Fault Detection
Over Voltage Protection
Trip Threshold
Over Voltage Protection
Propagation Delay
Under Voltage Protection
Trip Threshold
VFB_OVP
VFB_UVP
OVP Detect, FBx Rising Edge
To be continued
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8
DS8223L/M-04 April 2011
RT8223L/M
Parameter
UVP Shutdown Blanking Time
Symbol
Test Conditions
Min
Typ
Max
Unit
tSHDN_UVP From ENTRIPx Enable
--
5
--
ms
TSHDN
--
150
--
°C
--
10
--
°C
Low Level (DEM Mode)
--
--
0.8
REF Level (PWM Mode)
1.8
--
2.3
High Level (Ultrasonic Mode)
2.7
--
--
--
--
3
4.5
--
--
Thermal Shutdown
Thermal Shutdown
Thermal Shutdown Hysteresis
Logic Input
SKIPSEL Input Voltage
ENTRIPx Input Voltage
EN Threshold
Voltage
VENTRIPx
High Level (SMPS Off)
Logic-High
VIH
2.4
--
--
Logic-Low
VIL
--
--
0.4
Floating, Default Enable
2.4
3.3
4.2
VEN = 0.2V, Source
1.5
3
5
--
3
8
EN Voltage
VEN
EN Current
IEN
ENC Threshold
Voltage
(RT8223M)
On Level (SMPS On)
V EN = 5V, Sink
Logic-High
VIH_ENC
2
--
--
Logic-Low
VIL_ENC
--
--
0.6
VOUT1 / VOUT2 = 200kHz/250kHz
--
--
0.8
VOUT1 / VOUT2 = 300kHz/375kHz
1.8
--
2.3
VOUT1 / VOUT2 = 400kHz/500kHz
VTONSEL, VSKIPSEL = 0V or 5V
VENC = 0V or 5V
2.7
−1
−1
----
-1
1
--
40
80
--
4
8
--
1.5
4
--
4
8
LGATEx, Low State
--
1.5
4
LGATEx Rising
UGATEx Rising
---
30
40
---
V
V
V
V
μA
V
TONSEL Setting Voltage
Input Leakage Current
Internal BOOT Switch
Internal Boost Switch
On-Resistance
Power MOSFET Drivers
UGATEx On-Resistance
LGATEx On-Resistance
Dead Time
DS8223L/M-04 April 2011
VREG5 to BOOTx, 10mA
UGATEx, High State,
BOOTx to PHASEx Forced to 5V
UGATEx, Low State,
BOOTx to PHASEx Forced to 5V
LGATEx, High State
V
μA
Ω
Ω
Ω
ns
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9
RT8223L/M
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. PVIN + PVREG5
Note 6. Guaranteed by Design.
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10
DS8223L/M-04 April 2011
RT8223L/M
Typical Operating Characteristics
VOUT1 Efficiency vs. Load Current
VOUT1 Efficiency vs. Load Current
100
90
100
90
DEM Mode
DEM Mode
80
70
Efficiency (%) 1
Efficiency (%) 1
80
Ultrasonic Mode
60
50
PWM Mode
40
30
20
70
Ultrasonic Mode
60
50
PWM Mode
40
30
VIN = 12V
TONSEL = GND, EN = FLOATING,
20
VIN = 8V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
10
0
0.001
0.01
0.1
1
10
0
0.001
10
VENTRIP1 = 1.5V, VENTRIP2 = 5V
0.01
90
DEM Mode
80
Efficiency (%) 1
Efficiency (%) 1
10
100
80
70
Ultrasonic Mode
60
50
PWM Mode
40
30
VIN = 20V
20
0
0.001
70
60
Ultrasonic Mode
50
PWM Mode
40
30
0.1
1
VIN = 8V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 5V, VENTRIP2 = 1.5V
10
VENTRIP1 = 1.5V, VENTRIP2 = 5V
0.01
DEM Mode
20
TONSEL = GND, EN = FLOATING,
10
0
0.001
10
0.01
VOUT2 Efficiency vs. Load Current
100
90
90
80
Efficiency (%) 1
DEM Mode
70
Ultrasonic Mode
60
50
PWM Mode
40
30
VIN = 12V
20
0
0.001
0.01
0.1
Load Current (A)
DS8223L/M-04 April 2011
10
DEM Mode
70
60
Ultrasonic Mode
50
40
PWM Mode
30
VIN = 20V
TONSEL = GND,EN = FLOATING,
VENTRIP1 = 5V, VENTRIP2 = 1.5V
20
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 5V, VENTRIP2 = 1.5V
10
1
VOUT2 Efficiency vs. Load Current
100
80
0.1
Load Current (A)
Load Current (A)
Efficiency (%) 1
1
VOUT2 Efficiency vs. Load Current
VOUT1 Efficiency vs. Load Current
100
90
0.1
Load Current (A)
Load Current (A)
1
10
10
0
0.001
0.01
0.1
1
10
Load Current (A)
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11
RT8223L/M
VOUT1 Switching Frequency vs. Load Current
VOUT1 Switching Frequency vs. Load Current
220
PWM Mode
200
Switching Frequency (kHz) 1
Switching Frequency (kHz) 1
220
180
160
140
VIN = 8V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
120
100
80
60
Ultrasonic Mode
40
20
0.01
0.1
1
10
Switching Frequency (kHz)1
Switching Frequency (kHz) 1
PWM Mode
180
160
VIN = 20V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
100
80
60
40
Ultrasonic Mode
20
0
0.001
DEM Mode
0.01
0.1
1
10
Load Current (A)
100
80
60
40
Ultrasonic Mode
DEM Mode
0.01
0.1
1
10
280
260
PWM Mode
240
220
200
VIN = 8V
180 TONSEL = GND, EN = FLOATING,
160 VENTRIP1 = 5V, VENTRIP2 = 1.5V
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
0.1
1
10
Load Current (A)
VOUT2 Switching Frequency vs. Load Current
VOUT2 Switching Frequency vs. Load Current
280
PWM Mode
260
240
220
200
VIN = 12V
180
TONSEL = GND, EN = FLOATING,
160
VENTRIP1 = 5V, VENTRIP2 = 1.5V
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
0.1
1
280
PWM Mode
260
240
220
200
VIN = 20V
180
TONSEL = GND, EN = FLOATING,
160
VENTRIP1 = 5V, VENTRIP2 = 1.5V
140
120
100
80
60
Ultrasonic Mode
40
20
DEM Mode
0
0.001
0.01
0.1
1
Load Current (A)
www.richtek.com
12
Switching Frequency (kHz)1
Switching Frequency (kHz)1
120
VOUT2 Switching Frequency vs. Load Current
220
120
140
VIN = 12V
TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
Load Current (A)
VOUT1 Switching Frequency vs. Load Current
140
160
0
0.001
Load Current (A)
200
180
20
DEM Mode
0
0.001
PWM Mode
200
10
10
Load Current (A)
DS8223L/M-04 April 2011
RT8223L/M
VOUT2 Output Voltage vs. Load Current
3.446
VIN = 12V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = 1.5V, VENTRIP2 = 5V
VIN = 12V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = 5V, VENTRIP2 = 1.5V
3.440
3.434
Output Voltage (V) 1
Output Voltage (V) 1
VOUT1 Output Voltage vs. Load Current
5.090
5.084
5.078
5.072
5.066
5.060
5.054
5.048
5.042
5.036
5.030
5.024
5.018
5.012
5.006
5.000
0.001
Ultrasonic Mode
PWM Mode
3.428
3.422
Ultrasonic Mode
3.416
3.410
PWM Mode
3.404
3.398
3.392
DEM Mode
DEM Mode
3.386
0.01
0.1
1
3.380
0.001
10
0.01
Load Current (A)
3.358
VIN = 12V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 5V
Output Voltage (V) 1
Output Voltage (V) 1
10
4.994
4.988
4.982
VIN = 12V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 5V
3.354
5.000
4.976
3.350
3.346
3.342
3.338
3.334
3.330
4.970
0
20
40
60
80
0
100
10
Reference Voltage vs. Output Current
100.0
VIN = 12V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 5V
Battery Current (mA) 1
2.0064
2.0056
2.0048
2.0040
2.0032
2.0024
2.0016
2.0000
10
20
30
40
50
60
70
Output Current (µA)
DS8223L/M-04 April 2011
50
60
70
80
90 100
No Load
10.0
Ultrasonic Mode
1.0
DEM Mode
0.1
0
40
PWM Mode
2.0008
-10
30
Battery Current vs. Input Voltage
2.0080
2.0072
20
Output Current (mA)
Output Current (mA)
Reference Voltage (V) 1
1
VREG3 Output Voltage vs. Output Current
VREG5 Output Voltage vs. Output Current
5.006
0.1
Load Current (A)
TONSEL = GND, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 0.91V
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Input Voltage (V)
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13
RT8223L/M
Shutdown Input Current vs. Input Voltage
Standby Input Current vs. Input Voltage
249
248
247
246
245
244
243
242
No Load,
EN = FLOATING, VENTRIP1 = VENTRIP2 = 5V
241
240
Shutdown Input Current (µA)1
Standby Input Current (µA)1
250
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
No Load, EN = GND, VENTRIP1 = VENTRIP2 = 5V
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Input Voltage (V)
Input Voltage (V)
Reference Voltage vs. Temperature
VREG5, VREG3 and REF Start Up
2.011
Reference Voltage (V) 1
2.008
VREG5
(5V/Div)
VREG3
(2V/Div)
2.005
2.002
1.999
1.996
REF
(2V/Div)
1.993
1.990
VIN = 12V, VENTRIP1 = VENTRIP2 = 5V,
EN = FLOATING, TONSEL = GND
1.987
EN
(2V/Div)
No Load, VIN = 12V, TONSEL = GND,
EN = FLOATING, VENTRIP1 = VENTRIP2 = 5V
1.984
-50
-25
0
25
50
75
100
Time (400μs/Div)
125
Temperature (°C)
Power On From ENC (8223M)
Power Off From ENC (8223M)
No Load
No Load
VOUT1
(5V/Div)
VOUT2
(2V/Div)
VOUT1
(5V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
ENC
(5V/Div)
VIN = 12V, TONSEL = GND,
SKIPSEL = REF, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 1.5V, VENC = 5V
Time (1ms/Div)
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14
ENC
(5V/Div)
VIN = 12V, TONSEL = GND,
SKIPSEL = REF, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 1.5V, VENC = 5V
Time (4ms/Div)
DS8223L/M-04 April 2011
RT8223L/M
Power On from ENTRIP1
Power Off from ENTRIP1
No Load
No Load
VOUT1
(2V/Div)
VOUT1
(2V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
VIN = 12V, TONSEL = GND,
ENTRIP1
(5V/Div)
SKIPSEL = REF, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 1.5V
ENTRIP1
(5V/Div)
VIN = 12V, TONSEL = GND,
SKIPSEL = REF, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 1.5V
Time (1ms/Div)
Time (2ms/Div)
Power On from ENTRIP2
Power Off from ENTRIP2
No Load
No Load
VOUT2
(2V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
PGOOD
(5V/Div)
VIN = 12V, TONSEL = GND,
ENTRIP2
(5V/Div)
SKIPSEL = REF, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 1.5V
ENTRIP2
(5V/Div)
Time (1ms/Div)
VOUT1 PWM Mode Load Transient Response
Time (2ms/Div)
VOUT2 PWM Mode Load Transient Response
VOUT1_AC
(50mV/Div)
VOUT2_AC
(50mV/Div)
Inductor
Current
(5A/Div)
Inductor
Current
(5A/Div)
UGATE1
(20V/Div)
UGATE2
(20V/Div)
VIN = 12V, TONSEL = GND,
LGATE1
(5V/Div)
EN = FLOATING, SKIPSEL = REF, IOUT1 = 0A to 6A
Time (20μs/Div)
DS8223L/M-04 April 2011
VIN = 12V, TONSEL = GND,
SKIPSEL = REF, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 1.5V
VIN = 12V, TONSEL = GND,
LGATE2
(5V/Div)
EN = FLOATING, SKIPSEL = REF, IOUT2 = 0A to 6A
Time (20μs/Div)
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15
RT8223L/M
OVP
UVP
No Load, VIN = 12V, TONSEL = GND,
EN = FLOATING, SKIPSEL = GND
VOUT1
(5V/Div)
VOUT1
(2V/Div)
VOUT2
(2V/Div)
PGOOD
(5V/Div)
UGATE1
(20V/Div)
PGOOD
(5V/Div)
LGATE1
(5V/Div)
Time (4ms/Div)
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16
VIN = 12V, TONSEL = GND,
EN = FLOATING,
SKIPSEL = REF
Time (100μs/Div)
DS8223L/M-04 April 2011
RT8223L/M
Application Information
The RT8223L/M is a dual, Mach ResponseTM DRVTM dual
ramp valley mode synchronous buck controller. The
controller is designed for low voltage power supplies for
notebook computers. Richtek's Mach Response TM
technology is specifically designed for providing 100ns
“instant-on” response to load steps while maintaining a
relatively constant operating frequency and inductor
operating point over a wide range of input voltages. The
topology circumvents the poor load-transient timing
problems of fixed-frequency current mode PWMs while
avoiding the problems caused by widely varying switching
frequencies in conventional constant on-time and constant
off-time PWM schemes. The DRV TM mode PWM
modulator is specifically designed to have better noise
immunity for such a dual output application. The
RT8223L/M includes 5V (VREG5) and 3.3V (VREG3) linear
regulators. VREG5 linear regulator can step down the
battery voltage to supply both internal circuitry and gate
drivers. The synchronous-switch gate drivers are directly
powered from VREG5. When VOUT1 voltage is above
4.75V, an automatic circuit will switch the power of the
device from VREG5 linear regulator to VOUT1.
PWM Operation
The Mach ResponseTM DRVTM mode controller relies on
the output filter capacitor's effective series resistance
(ESR) to act as a current sense resistor, so the output
ripple voltage provides the PWM ramp signal. Refer to the
RT8223L/M's function block diagram, the synchronous
high side MOSFET will be turned on at the beginning of
each cycle. After the internal one-shot timer expires, the
MOSFET will be turned off. The pulse width of this one
shot is determined by the converter's input voltage and
the output voltage to keep the frequency fairly constant
over the input voltage range. Another one shot sets a
minimum off-time (300ns typ.). The on-time one shot will
be triggered if the error comparator is high, the low side
switch current is below the current limit threshold, and
the minimum off-time one shot has timed out.
PWM Frequency and On-Time Control
and output voltage into the on-time one-shot timer. The
high side switch on-time is inversely proportional to the
input voltage as measured by VIN, and proportional to the
output voltage. There are two benefits of a constant
switching frequency. First, the frequency can be selected
to avoid noise-sensitive regions such as the 455kHz IF
band. Second, the inductor ripple current operating point
remains relatively constant, resulting in easy design
methodology and predictable output voltage ripple.
Frequency for the 3V SMPS is set at 1.25 times higher
than the frequency for 5V SMPS. This is done to prevent
audio-frequency “Beating” between the two sides, which
switch asynchronously for each side. The frequencies are
set by the TONSEL pin connection as shown in Table 1.
The on-time is given by :
tON = K × (VOUT / VIN )
where “K”is set by the TONSEL pin connection (Table
1). The on-time guaranteed in the Electrical Characteristics
table is influenced by switching delays in the external
high side power MOSFET. Two external factors that
influence switching frequency accuracy are resistive drops
in the two conduction loops (including inductor and PC
board resistance) and the dead time effect. These effects
are the largest contributors to the change in frequency
with changing load current. The dead-time effect increases
the effective on-time by reducing the switching frequency
. It occurs only in PWM mode (SKIPSEL= REF) when
the inductor current reverses at light or negative load
currents. With reversed inductor current, the inductor's
EMF causes PHASEx to go high earlier than normal, thus
extending the on-time by a period equal to the low-tohigh dead time. For loads above the critical conduction
point, the actual switching frequency is :
f = (VOUT + VDROP1) / (tON × (VIN + VDROP1 − VDROP2 ))
where VDROP1 is the sum of the parasitic voltage drops in
the inductor discharge path,which includes the
synchronous rectifier, inductor, and PC board resistances.
VDROP2 is the sum of the resistances in the charging path,
and tON is the on-time.
The Mach ResponseTM control architecture runs with
pseudo constant frequency by feed-forwarding the input
DS8223L/M-04 April 2011
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17
RT8223L/M
Table 1. TONSEL Connection and Switching Frequency
TONSEL
SMPS 1
K-Factor (μs)
SMPS 1
Frequency (kHz)
SMPS 2
K-Factor (μs)
SMPS 2
Frequency (kHz)
Approximate
K-Factor Error (%)
GND
5
200
4
250
±10
REF
3.33
300
2.67
375
±10
VREG5 or
VREG3
2.5
400
2
500
±10
Operation Mode Selection (SKIPSEL)
The RT8223L/M supports three operation modes : DiodeEmulation Mode, Ultrasonic Mode, and Forced-CCM
Mode. User can set operation mode via the SKIPSEL pin.
Diode-Emulation Mode (SKIPSEL=GND)
In Diode-Emulation Mode, the RT8223L/M automatically
reduces switching frequency at light-load conditions to
maintain high efficiency. This reduction of frequency is
achieved smoothly. As the output current decreases from
heavy-load condition, the inductor current is also reduced
and eventually comes to the point when its valley touches
zero current, which is the boundary between continuous
conduction and discontinuous conduction modes. By
emulating the behavior of diodes, the low side MOSFET
allows only partial negative current when the inductor freewheeling current becomes negative. As the load current
is further decreased, it takes longer and longer to discharge
the output capacitor to the level that requires the next
“ON” cycle. The on-time is kept the same as that in the
heavy-load condition. In reverse, when the output current
increases from light load to heavy-load, the switching
frequency increases to the preset value as the inductor
current reaches the continuous conduction. The transition
load point to the light-load operation is shown as follows
(Figure 1) :
IL
Slope = (VIN -VOUT) / L
IL, PEAK
ILoad = IL, PEAK / 2
0
ILOAD (SKIP) ≈
(VIN − VOUT )
× tON
2L
where tON is the On-time.
The switching waveforms may appear noisy and
asynchronous when light loading causes Diode-Emulation
Mode operation. However this is normal and results in
high efficiency. Trade-offs in PFM noise vs. light load
efficiency is made by varying the inductor value. Generally,
low inductor values produce a broader efficiency vs. load
curve, while higher values result in higher full-load efficiency
(assuming that the coil resistance remains fixed) and less
output voltage ripple.
Penalties for using higher inductor values include larger
physical size and degraded load transient response
(especially at low input-voltage levels).
Ultrasonic Mode (SKIPSEL = VREG5 or VREG3)
The RT8223L/M activates an unique Diode-Emulation Mode
with a minimum switching frequency of 25kHz, called the
Ultrasonic Mode. The Ultrasonic Mode avoids audiofrequency modulation that would otherwise be present
when a lightly loaded controller automatically skips
pulses. In Ultrasonic Mode, the high side switch gate driver
signal is OR with an internal oscillator (>25kHz). Once
the internal oscillator is triggered, the controller enters
constant off-time control. When output voltage reaches
the setting peak threshold, the controller turns on the low
side MOSFET until the controller detects that the inductor
current dropped has below the zero-crossing threshold.
The internal timer provides a constant off-time control and
it is effective to regulate the output voltage under light
load conditions.
t
TON
Figure 1. Boundary Condition of CCM/DEM
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18
DS8223L/M-04 April 2011
RT8223L/M
Forced CCM Mode (SKIPSEL = REF)
The low noise, Forced CCM mode (SKIPSEL = REF)
disables the zero-crossing comparator, which controls the
low side switch on-time. This causes the low side gatedriver waveform to become the complement of the high
side gate-driver waveform. This in turn causes the inductor
current to reverse at light loads as the PWM loop to
maintain a duty ratio of VOUT/VIN. The benefit of Forced
CCM Mode is to keep the switching frequency fairly
constant, but it comes at a cost. The no load battery
current can be from 10mA to 40mA, depending on the
external MOSFETs.
sensing algorithm. If the magnitude of the current sense
signal at PHASEx is above the current-limit threshold, the
PWM is not allowed to initiate a new cycle (Figure 2).
The actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple current.
Therefore, the exact current-limit characteristic and
maximum load capability are functions of the sense
resistance, inductor value, and battery and output voltage.
IL
IL, PEAK
ILOAD
ILIM
Reference and linear Regulators (REF, VREGx)
The 2V reference (REF) is accurate within ±1% over the
entire operating temperature range, making REF useful
as a precision system reference. Bypass REF to GND
with a minimum 0.22μF ceramic capacitor. REF can supply
up to 100μA for external loads. Loading REF reduces the
VOUTx output voltage slightly because of the reference
load-regulation error.
The RT8223L/M includes 5V (VREG5) and 3.3V (VREG3)
linear regulators. The VREG5 regulator supplies a total of
100mA for internal and external loads, including the
MOSFET gate driver and PWM controller. The VREG3
regulator supplies up to 100mA for external loads. Bypass
VREG5 and VREG3 with a minimum 4.7μF ceramic
capacitor.
When the 5V main output voltage is above the VREG5
switch over threshold (4.75V), an internal 1.5Ω P-Channel
MOSFET switch connects VOUT1 to VREG5, while
simultaneously shutting down the VREG5 linear regulator.
Similarly, when the 3.3V main output voltage is above the
VREG3 switch over threshold (3.125V), an internal 1.5Ω
P-Channel MOSFET switch connects VOUT2 to VREG3,
while simultaneously shutting down the VREG3 linear
regulator. It can decrease the power dissipation from the
same battery, because the converted efficiency of SMPS
is better than the converted efficiency of the linear
regulator.
t
0
Figure 2. “Valley” Current-Limit
The RT8223L/M uses the on-resistance of the synchronous
rectifier as the current-sense element and supports
temperature compensated MOSFET RDS(ON) sensing. The
RILIMX resistor between the ENTRIPX pin and GND sets
the current-limit threshold. The resistor RILIMX is connected
to a current source from ENTRIPx, which is 10μA typically
at room temperature. The current source has a 4700ppm/
°C temperature slope to compensate the temperature
dependency of the RDS(ON). When the voltage drop across
the sense resistor or low side MOSFET equals 1/10 the
voltage across the RILIMX resistor, positive current limit
will be activated. The high side MOSFET will not be turned
on until the voltage drop across the MOSFET falls below
1/10 the voltage across the RILIMX resistor.
Choose a current limit resistor by following equations
VILIMx = (RILIMx x10μA)/10 = IILIMx x RDS(ON)
RILIMx = (IILIMx x RDS(ON)) x 10/10μA
Carefully observe the PC board layout guidelines to ensure
that noise and DC errors do not corrupt the current-sense
signal at PHASEx and GND. Mount or place the IC close
to the low side MOSFET.
MOSFET Gate Driver (UGATEx, LGATEx)
Current-Limit Setting (ENTRIPx)
The RT8223L/M has a cycle-by-cycle current-limit control.
The current-limit circuit employs an unique “valley” current
DS8223L/M-04 April 2011
The high side driver is designed to drive high-current, low
RDS(ON) N-MOSFET(s). When configured as a floating driver,
a 5V bias voltage is delivered from the VREG5 supply.
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19
RT8223L/M
The average drive current is calculated by the gate charge
at V GS = 5V times the switching frequency. The
instantaneous drive current is supplied by the flying
capacitor between the BOOTx and PHASEx pins. A dead
time to prevent shoot through is internally generated
between high side MOSFET off to the low side MOSFET
on, and the low side MOSFET off to the high side MOSFET
on.
UVLO Protection
The low side driver is designed to drive high current, low
RDS(ON) N-MOSFET(s). The internal pull-down transist or
that drives LGATEX low is robust, with a 1.5Ω typical onresistance. A 5V bias voltage is delivered from the VREG5
supply. The instantaneous drive current is supplied by an
input capacitor connected between VREG5 and GND.
PGOOD is an open-drain type output and requires a pullup resistor. PGOOD is actively held low in soft-start,
standby, and shutdown. It is released when both output
voltages are above 91% of the nominal regulation point.
The PGOOD goes low if either output turns off or is 15%
below its nominal regulator point.
For high current applications, some combinations of high
and low side MOSFETs might be encountered that will
cause excessive gate-drain coupling, which can lead to
efficiency killing, EMI-producing shoot-through currents.
This can be remedied by adding a resistor in series with
BOOTx, which increases the turn-on time of the high side
MOSFET without degrading the turn-off time (Figure 3).
Output Over Voltage Protection (OVP)
VIN
BOOTx
RBOOT
UGATEx
PHASEx
Figure 3. Reducing the UGATEx Rise Time
Soft-Start
The RT8223L/M provides an internal soft-start function to
prevent large inrush current and output voltage overshoot
when the converter starts up. The soft-start (SS)
automatically begins once the chip is enabled. During softstart, it clamps the ramping of internal reference voltage
which is compared with FBx signal. The typical softstart duration is 2 ms. A unique PWM duty limit control
that prevents output over voltage during soft-start period
is designed specifically for FBx floating.
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20
The RT8223L/M features VREG5 under voltage lockout
protection (UVLO). When the VREG5 voltage is lower than
3.9V (typ.) and the VREG3 voltage is lower than 2.5V
(typ.), both switch power supplies are shut off. This is
non-latch protection.
Power Good Output (PGOOD)
The output voltage can be continuously monitored for over
voltage. If the output voltage exceeds 12% of its set voltage
threshold, the over voltage protection is triggered and the
LGATEx low side gate drivers are forced high. This activates
the low side MOSFET switch, which rapidly discharges
the output capacitor and pulls the input voltage downward.
The RT8223L/M is latched once OVP is triggered and can
only be released by toggling EN, ENTRIPx or cycling VIN.
There is a 5μs delay built into the over voltage protection
circuit to prevent false alarm.
Note that the LGATEx latching high causes the output
voltage to dip slightly negative when energy has been
previously stored in the LC tank circuit. For loads that
cannot tolerate a negative voltage, place a power Schottky
diode across the output to act as a reverse polarity clamp.
If the over-voltage condition is caused by a short in the
high side switch, completely turning on the low side
MOSFET can create an electrical short between the
battery and GND, which will blow the fuse and disconnect
the battery from the output.
Output Under Voltage Protection (UVP)
The output voltage can be continuously monitored for under
voltage protection. If the output is less than 52% of its set
voltage threshold, under voltage protection will be triggered,
and then both UGATEx and LGATEx gate drivers will be
forced low. The UVP will be ignored for at least 5ms (typ.)
after start-up or a rising edge on ENTRIPx. Toggle
DS8223L/M-04 April 2011
RT8223L/M
ENTRIPx or cycle VIN to reset the UVP fault latch and
restart the controller.
Thermal Protection
The RT8223L/M features thermal shutdown protection to
prevent overheat damage to the device. Thermal shutdown
occurs when the die temperature exceeds +150°C. All
internal circuitry is inactive during thermal shutdown. The
RT8223L/M triggers thermal shutdown if VREGx is not
supplied from VOUTx, while the input voltage on VIN and
the drawing current from VREGx are too high. Even if
VREGx is supplied from VOUTx, large power dissipation
on automatic switches caused by overloading VREGx,
may also result in thermal shutdown.
Discharge Mode (Soft-Discharge)
When ENTRIPx is low and a transition to standby or
shutdown mode occurs, or the output under voltage fault
latch is set, the output discharge mode will be triggered.
During discharge mode, the output capacitors' residual
charge will be discharged to GND through an internal
switch.
Shutdown Mode
The RT8223L/M SMPS1, SMPS2, VREG3 and VREG5
have independent enabling controls. Drive EN, ENTRIP1
and ENTRIP2 below the precise input falling-edge trip level
to place the RT8223L/M in its low power shutdown state.
The RT8223L/M consumes only 20μA of input current while
in shutdown. When shutdown mode is activated, the
reference turns off. The accurate 0.4V falling-edge threshold
on the EN pin can be used to detect a specific analog
voltage level as well as to shutdown the device. Once in
shutdown, the 2.4V rising-edge threshold activates,
providing sufficient hysteresis for most applications.
Power Up Sequencing and On/Off Controls (ENC)
ENTRIP1 and ENTRIP2 control the SMPS power up
sequencing. When the RT8223L/M is in single channel
mode, ENTRIP1 or ENTRIP2 enables the respective output
when ENTRIPx voltage descends below 3V. Furthermore,
the RT8223M can also be in dual channel mode. In this
mode, outputs are enabled when ENC voltage rises above
2V.
Table 2. Operation Mode Truth Table
MODE
Power UP
Condition
VREGx < UVLO threshold
EN = high, VOUT1 or VOUT2
enabled
Over Voltage Either output > 111% of the nominal
Protection level.
Under
Either output < 52% of the nominal
Voltage
level after 3ms time-out expires and
Protection output is enabled
Either SMPS output is still high in
Discharge either standby mode or shutdown
mode
ENTRIPX<startup threshold, EN
Standby
=high.
RUN
Comment
Transitions to discharge mode after a VIN POR and after
REF becomes valid. VREG5, VREG3, and REF remain
active.
Normal Operation.
LGATEx is forced high. VREG3, VREG5 and REF active.
Exited by VIN POR or by toggling EN, ENTRIPx, ENC
Both UGATEx and LGATEx are forced low and enter
discharge mode. VREG3, VREG5 and REF are active.
Exited by VIN POR or by toggling EN, ENTRIPx, ENC
During discharge mode, there is one path to discharge the
outputs capacitor residual charge. That is output capacitor
discharge to GND through an internal switch.
VREG3, VREG5 and REF are active.
Shutdown
EN =low
All circuitry off.
Thermal
Shutdown
TJ > +150°C
All circuitry off. Exit by VIN POR or by toggling EN, ENTRIPx,
ENC
DS8223L/M-04 April 2011
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RT8223L/M
Table 3. Power Up Sequencing
EN
(V)
ENC
(V)
ENTRIP1
ENTRIP2
REF
Low
Low
X
X
Off
Off
Off
Off
Off
Low
X
X
On
On
On
Off
Off
Off
Off
On
On
On
Off
Off
“>2.4V”
=> High
VREG5 VREG3
SMPS1
SMPS2
“>2.4V”
“>2V”
=> High
=> High
“>2.4V”
=> High
“>2V”
=> High
Off
On
On
On
On
Off
On
“>2.4V”
=> High
“>2V”
=> High
On
Off
On
On
On
On
Off
“>2.4V”
=> High
“>2V”
=> High
On
On
On
On
On
On
On
Output Voltage Setting (FBx)
Connect a resistor voltage-divider at the FBx pin between
VOUTx and GND to adjust the respective output voltage
between 2V and 5.5V (Figure 4). Referring to Figure 4 as
an example, choose R2 to be approximately 10kΩ, and
solve for R1 using the equation :
⎛ ⎛ R1 ⎞ ⎞
VOUTX = VFBX × ⎜ 1 + ⎜
⎟⎟
⎝ ⎝ R2 ⎠ ⎠
where VFBX is 2V.
where LIR is the ratio of the peak to peak ripple current to
the average inductor current.
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Ferrite cores
are often the best choice, although powdered iron is
inexpensive and can work well at 200kHz. The core must
be large enough not to saturate at the peak inductor current
(IPEAK) :
IPEAK = ILOAD(MAX) + ⎡⎣(LIR/2) × ILOAD(MAX) ⎤⎦
VIN
VOUTx
UGATEx
PHASEx
The calculation above shall serve as a general reference.
To further improve the transient response, the output
inductance can be reduced even further. This needs to be
considered along with the selection of the output capacitor.
LGATEx
VOUTx
FBx
R1
Output Capacitor Selection
R2
Figure 4. Setting VOUTX with a Resistor Voltage Divider
Output Inductor Selection
The switching frequency (on-time) and operating point (%
ripple or LIR) determine the inductor value as shown in
the following equation :
t × ( VIN − VOUTx )
L = ON
LIR × ILOAD(MAX)
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The capacitor value and ESR determine the amount of
output voltage ripple and load transient response. Thus,
the capacitor value must be greater than the largest value
calculated from below equations :
V
(ΔILOAD )2 × L × (K × OUTx + tOFF(MIN) )
VIN
VSAG =
⎡ ⎛ V − VOUTx ⎞ ⎤
2 × COUT × VOUTx × ⎢K × ⎜ IN
⎟ ⎥ − tOFF(MIN)
VIN
⎠⎦
⎣ ⎝
VSOAR =
(ΔILOAD )2 × L
2 × COUT × VOUTx
DS8223L/M-04 April 2011
RT8223L/M
Maximum Power Dissipation (W)1
⎛
⎞
1
VP−P = LIR × ILOAD(MAX) × ⎜ ESR +
⎟
8
C
f
×
×
OUT
⎝
⎠
where VSAG and VSOAR are the allowable amount of
undershoot voltage the and overshoot voltage in load
transient, Vp-p is the output ripple voltage, tOFF(MIN) is the
minimum off-time, and K is a factor listed in Table 1.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8223L/M, the maximum junction temperature is
125°C and TA is the ambient temperature. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-24L 4x4 packages, the thermal resistance, θJA, is
52°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
DS8223L/M-04 April 2011
Four-Layer PCB
1.8
1.5
1.2
0.9
0.6
0.3
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curve for the RT8223L/M Package
Layout Considerations
Layout is very important in high frequency switching
converter designs, the PCB could radiate excessive noise
and contribute to the converter instability with improper
layout. Certain points must be considered before starting
a layout using the RT8223L/M.
`
Place the filter capacitor close to the IC, within 12mm
(0.5 inch) if possible.
`
Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high voltage switching nodes.
`
Connections from the drivers to the respective gate of
the high side or the low side MOSFET should be as
short as possible to reduce stray inductance. Use
0.65mm (25mils) or wider trace.
`
All sensitive analog traces and components such as
VOUTx, FBx, GND, ENTRIPx, PGOOD, and TONSEL
should be placed away from high voltage switching
nodes such as PHASEx, LGATEx, UGATEx, or BOOTx
nodes to avoid coupling. Use internal layer(s) as ground
plane(s) and shield the feedback trace from power traces
and components.
`
Place the ground terminal of VIN capacitor(s), VOUTx
capacitor(s), and source of low side MOSFETs as close
as possible. The PCB trace defined as PHASEX node,
which connects to source of high side MOSFET, drain
of low side MOSFET and high voltage side of the
inductor, should be as short and wide as possible.
PD(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for
WQFN-24L 4x4 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT8223L/M package, the derating
curve in Figure 5 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
2.1
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RT8223L/M
Outline Dimension
D2
D
SEE DETAIL A
L
1
E
E2
e
b
1
1
2
2
A
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
3.950
4.050
0.156
0.159
D2
2.300
2.750
0.091
0.108
E
3.950
4.050
0.156
0.159
E2
2.300
2.750
0.091
0.108
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 24L QFN 4x4 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS8223L/M-04 April 2011