FAIRCHILD 74F37SC

Revised March 1999
74F37
Quad Two-Input NAND Buffer
General Description
This device contains four independent gates, each of which
performs the logic NAND function.
Ordering Code:
Order Number
Package Number
Package Description
74F37SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F37SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F37PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
IEEE/IEC
Function Table
Unit Loading/Fan Out
U.L.
Pin Names Description
An, Bn
Inputs
On
Outputs
Inputs
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
1.0/2.0
20 µA/−1.2 mA
600/106.6 (80) −12 mA/64 mA
(48 mA)
A
Output
B
O
L
L
H
L
H
H
H
L
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
© 1999 Fairchild Semiconductor Corporation
DS009464.prf
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74F37 Quad Two-Input NAND Buffer
April 1988
74F37
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Current Applied to Output
twice the rated IOL (mA)
in LOW State (Max)
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Input HIGH Voltage
2.0
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
VOH
Output HIGH
Voltage
VOL
Output LOW
10% VCC
2.4
10% VCC
2.0
5% VCC
2.7
VCC
Units
VIH
V
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
Min
IIN = −18 mA
IOH = −3 mA
V
Min
IOH = −15 mA
IOH = −3 mA
10% VCC
0.55
V
Min
IOL = 64 mA
5.0
µA
Max
VIN = 2.7V
7.0
µA
Max
VIN = 7.0V
50
µA
Max
VOUT = VCC
V
0.0
IID = 1.9 µA
3.75
µA
0.0
VIOD = 150 mV
−1.2
mA
Max
VIN = 0.5V
Voltage
IIH
Input HIGH
Current
IBVI
Input HIGH Current
Breakdown Test
ICEX
Output HIGH
Leakage Current
VID
Input Leakage
4.75
Test
IOD
Output Leakage
IIL
Input LOW Current
All Other Pins Grounded
Circuit Current
All Other Pins Grounded
IOS
Output Short-Circuit Current
−225
mA
Max
VOUT = 0V
ICCH
Power Supply Current
−100
3.7
6.0
mA
Max
VO = HIGH
ICCL
Power Supply Current
28.0
33.0
mA
Max
VO = LOW
AC Electrical Characteristics
Symbol
Parameter
TA = +25°C
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
2.0
3.2
5.5
1.5
6.5
tPHL
An, Bn to On
1.5
2.4
4.5
1.0
5.0
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2
Units
ns
74F37
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
3
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74F37 Quad Two-Input NAND Buffer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
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SEMICONDUCTOR CORPORATION. As used herein:
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1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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