74FR16245 74FR16245 16-Bit Transceiver 16-Bit Transceiver with 3-STATE with Outputs 3-STATE Outputs October 1989 Revised August 1999 74FR16245 © 2012 Rochester Electronics, LLC. All Rights Reserved 12172012October 1989 16-Bit Transceiver with 3-STATE Outputs Revised August 1999 General Description 74FR16245 Features 74FR16245 16-Bit Transceiver with 3-STATE Outputs The 74FR16245 contains sixteen non-inverting bidirec■ Non-inverting buffers tional buffers with 3-STATE outputs and is intended for bus■ Bidirectional data paths oriented applications. Current sinking capability is 64 mA ■ A and B output sink capability of 64 mA, source on both the A and B Ports. The device is byte controlled. capability of 15 mA Each byte has separate control inputs which can be ■ Separate control pins for each byte shorted together for full 16-bit operation. The transmit/ General Description Features receive (T/Rn) inputs determine the direction of data flow ■ Guaranteed pin-to-pin skew The 74FR16245 contains sixteen ■ Non-inverting buffers inputs through the transceiver. The outputnon-inverting enable (OEn)bidirec■ Low 3-STATE IIL tional buffers with 3-STATE outputs and is intended for bus■ Bidirectional data paths disable both A and B Ports by placing them in an high ■ 16-Bit version of the 74F245 or 74F645 oriented applications. Current sinking capability is 64 mA ■ A and B output sink capability of 64 mA, source impedance state. on both the A and B Ports. The device is byte controlled. capability of 15 mA Each byte has separate control inputs which can be ■ Separate control pins for each byte shorted together for full 16-bit operation. The transmit/ receive (T/Rn) inputs determine the direction of data flow Ordering Code: ■ Guaranteed pin-to-pin skew through the transceiver. The output enable (OEn) inputs ■ Low 3-STATE IIL Order Number Package Package Description disable both A and B PortsNumber by placing them in an high ■ Carrier 16-Bit version ofJEDEC the 74F245 or 74F645 74FR16245QC V44A 44-Lead Plastic Lead Chip (PLCC), MO-047, 0.650 Square impedance state. 74FR16245SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Ordering Code: Connection Diagrams Order Number Package Number Package Description PinJEDEC Assignment for0.650 PLCCSquare 74FR16245QC Pin Assignment V44A for SSOP 44-Lead Plastic Lead Chip Carrier (PLCC), MO-047, 74FR16245SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams Pin Assignment for SSOP Pin Assignment for PLCC Logic Symbol Logic Symbol © 1999 Fairchild Semiconductor Corporation DS010614 www.fairchildsemi.com © 1999 Fairchild Semiconductor Corporation DS010614 www.fairchildsemi.com * For complete Rochester ordering guide, please refer to page 2 * Rochester Electronics guarantees performance of its semiconductor products to the original OEM specifications. “Typical” values are for reference purposes only. Certain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. Rochester Electronics reserves the right to make changes without further notice to any specification herein. Specification Number 74FR16245-CI(F) Rev A Page 1 of 5 74FR16245 Rochester Ordering Guide Rochester Part Number OCM Part Number Package Temperature LDCC-44 0° to +70°C 74FR16245QCX LDCC-44 0° to +70°C 74FR16245SSC SSOP-48 0° to +70°C 74FR16245SSCX SSOP-48 0° to +70°C 74FR16245QC 74FR16245QC 74FR16245QCX 74FR16245SSC 74FR16245SSCX Specification Number 74FR16245-CI(F) Rev A Page 2 of 5 74FR16245 74FR16245 Pin Descriptions Pin Names Description OEn Output Enable Input T/Rn Transmit/Receive Input A0–A15 A Bus Inputs/3-STATE Outputs B0–B15 B Bus Inputs/3-STATE Outputs Truth Table Inputs Output Operating Mode Byte1 (0:7) Byte2 (8:15) OE1 T/R1 OE2 T/R2 Byte1 (0:7) Byte2 (8:15) L L H X Bus B Data to A High Z State L H H X Bus A Data to B High Z State H X L L High Z State Bus B Data to A H X L H High Z State Bus A Data to B L L L L Bus B Data to A Bus B Data to A L H L H Bus A Data to B Bus A Data to B H X H X High Z State High Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram www.fairchildsemi.com 2 Specification Number 74FR16245-CI(F) Rev A Page 3 of 5 74FR16245 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage VCC Pin Potential to Ground Pin 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA 74FR16245 Absolute Maximum Ratings(Note 1) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. Twice the Rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Min Typ Max 2.0 VCC V Diode Voltage VOH Units Output HIGH 2.4 2.8 Voltage 2.0 2.44 Conditions Recognized as a HIGH Signal 0.8 V −1.2 V Min Recognized as a LOW Signal V Min IIN = −18 mA IOH = − 3 mA IOH = − 15 mA (An, Bn) VOL Output LOW 0.45 V Min 5.0 µA Max 7.0 µA Max 0.1 mA Max Input LOW −150 µA Max VIN = 0.5V (T/Rn, An, B n) Current −100 µA Max VIN = 0.5V (OE n) −225 mA Max 0 25 µA Max −20 −150 µA Max 50 µA Max V 0.0 3.75 µA 0.0 100 µA 0.0 IIH Input HIGH Current IBVI Input HIGH Current Break-Down Test IBVIT Input HIGH Current Breakdown Test (I/O) IIL IOS Output Short-Circuit Current IIH + −100 Output Leakage IOZH Current IIL + Output Leakage IOZL Current ICEX Output HIGH Leakage Current VID Input Leakage Test IOD 4.75 Output Circuit Leakage Current IZZ IOL = 64 mA 0.55 Voltage Bus Drainage Test (An, Bn) VIN = 2.7V VIN = 7.0V (OEn, T/Rn) VIN = 5.5V (An, Bn) VOUT = 0V (An, Bn) VOUT = 2.7V (An, Bn) VOUT = 0.5V (An, Bn) VOUT = VCC (An, Bn) IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VOUT = 5.25V (An, Bn) ICCH Power Supply Current 70 105 mA Max VO = HIGH ICCL Power Supply Current 127 165 mA Max VO = LOW ICCZ Power Supply Current 71 105 mA Max VO = HIGH Z CIN Input Capacitance 8.0 pF 5.0 OE, T/R 17.0 pF 5.0 An, Bn 3 Specification Number 74FR16245-CI(F) Rev A www.fairchildsemi.com Page 4 of 5 74FR16245 74FR16245 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 1.3 2.7 4.3 1.3 4.3 tPHL An to Bn or Bn to An 1.3 2.2 4.3 1.3 4.3 tPZH Output Enable Time 3.9 6.9 13.9 3.9 13.9 3.9 9.7 13.9 3.9 13.9 1.8 3.9 6.3 1.8 6.3 1.8 4.4 6.3 1.8 6.3 tPZL tPHZ Output Disable Time tPLZ Unit ns ns ns Extended AC Characteristics Symbol Parameter TA = 0°C to +70°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 250 pF 16 Outputs Switching (Note 4) (Note 5) Min Max Min Max tPLH Propagation Delay 1.3 5.8 3.2 8.2 tPHL An to Bn or Bn to An 1.3 5.8 3.2 8.2 tPZH Output Enable Time 3.9 14.6 3.9 14.6 1.8 6.3 1.8 6.3 tPZL tPHZ Output Disable Time tPLZ tOSHL Pin-to-Pin Skew (Note 3) for HL Transitions tOSLH Pin-to-Pin Skew (Note 3) for LH Transitions tOST Pin-to-Pin Skew (Note 3) for HL/LH Transitions Unit ns ns ns 1.2 ns 2.2 ns 2.5 ns Note 3: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (tOSHL) LOW-to-HIGH (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH (tOST). Specifications guaranteed with all outputs switching in phase. Note 4: This specification is guaranteed but not tested The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 5: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. www.fairchildsemi.com 4 Rochester Electronics guarantees performance of its semiconductor products to the original OEM specifications. “Typical” values are for reference purposes only. Certain minimum or maximum ratings may be based on product characterization, design, simulation, or sample testing. Rochester Electronics reserves the right to make changes without further notice to any specification herein. Specification Number 74FR16245-CI(F) Rev A Page 5 of 5